Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SMP support for ppc. | |
3 | * | |
4 | * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great | |
5 | * deal of code from the sparc and intel versions. | |
6 | * | |
7 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
8 | * | |
9 | * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and | |
10 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #undef DEBUG | |
19 | ||
1da177e4 LT |
20 | #include <linux/kernel.h> |
21 | #include <linux/module.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/cache.h> | |
29 | #include <linux/err.h> | |
30 | #include <linux/sysdev.h> | |
31 | #include <linux/cpu.h> | |
32 | #include <linux/notifier.h> | |
4b703a23 | 33 | #include <linux/topology.h> |
1da177e4 LT |
34 | |
35 | #include <asm/ptrace.h> | |
36 | #include <asm/atomic.h> | |
37 | #include <asm/irq.h> | |
38 | #include <asm/page.h> | |
39 | #include <asm/pgtable.h> | |
40 | #include <asm/prom.h> | |
41 | #include <asm/smp.h> | |
1da177e4 LT |
42 | #include <asm/time.h> |
43 | #include <asm/machdep.h> | |
e2075f79 | 44 | #include <asm/cputhreads.h> |
1da177e4 LT |
45 | #include <asm/cputable.h> |
46 | #include <asm/system.h> | |
bbeb3f4c | 47 | #include <asm/mpic.h> |
a7f290da | 48 | #include <asm/vdso_datapage.h> |
5ad57078 PM |
49 | #ifdef CONFIG_PPC64 |
50 | #include <asm/paca.h> | |
51 | #endif | |
52 | ||
1da177e4 | 53 | #ifdef DEBUG |
f9e4ec57 | 54 | #include <asm/udbg.h> |
1da177e4 LT |
55 | #define DBG(fmt...) udbg_printf(fmt) |
56 | #else | |
57 | #define DBG(fmt...) | |
58 | #endif | |
59 | ||
f9e4ec57 ME |
60 | struct thread_info *secondary_ti; |
61 | ||
cc1ba8ea AB |
62 | DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
63 | DEFINE_PER_CPU(cpumask_var_t, cpu_core_map); | |
1da177e4 | 64 | |
d5a7430d | 65 | EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
440a0857 | 66 | EXPORT_PER_CPU_SYMBOL(cpu_core_map); |
1da177e4 | 67 | |
5ad57078 | 68 | /* SMP operations for this machine */ |
1da177e4 LT |
69 | struct smp_ops_t *smp_ops; |
70 | ||
7ccbe504 BH |
71 | /* Can't be static due to PowerMac hackery */ |
72 | volatile unsigned int cpu_callin_map[NR_CPUS]; | |
1da177e4 | 73 | |
1da177e4 LT |
74 | int smt_enabled_at_boot = 1; |
75 | ||
cc532915 ME |
76 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
77 | ||
5ad57078 | 78 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
79 | void __devinit smp_generic_kick_cpu(int nr) |
80 | { | |
81 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
82 | ||
83 | /* | |
84 | * The processor is currently spinning, waiting for the | |
85 | * cpu_start field to become non-zero After we set cpu_start, | |
86 | * the processor will continue on to secondary_start | |
87 | */ | |
88 | paca[nr].cpu_start = 1; | |
0d8d4d42 | 89 | smp_mb(); |
1da177e4 | 90 | } |
5ad57078 | 91 | #endif |
1da177e4 | 92 | |
7d12e780 | 93 | void smp_message_recv(int msg) |
1da177e4 LT |
94 | { |
95 | switch(msg) { | |
96 | case PPC_MSG_CALL_FUNCTION: | |
b7d7a240 | 97 | generic_smp_call_function_interrupt(); |
1da177e4 | 98 | break; |
5ad57078 | 99 | case PPC_MSG_RESCHEDULE: |
22d660ff | 100 | /* we notice need_resched on exit */ |
1da177e4 | 101 | break; |
b7d7a240 JA |
102 | case PPC_MSG_CALL_FUNC_SINGLE: |
103 | generic_smp_call_function_single_interrupt(); | |
104 | break; | |
1da177e4 | 105 | case PPC_MSG_DEBUGGER_BREAK: |
cc532915 | 106 | if (crash_ipi_function_ptr) { |
7d12e780 | 107 | crash_ipi_function_ptr(get_irq_regs()); |
cc532915 ME |
108 | break; |
109 | } | |
110 | #ifdef CONFIG_DEBUGGER | |
7d12e780 | 111 | debugger_ipi(get_irq_regs()); |
1da177e4 | 112 | break; |
cc532915 ME |
113 | #endif /* CONFIG_DEBUGGER */ |
114 | /* FALLTHROUGH */ | |
1da177e4 LT |
115 | default: |
116 | printk("SMP %d: smp_message_recv(): unknown msg %d\n", | |
117 | smp_processor_id(), msg); | |
118 | break; | |
119 | } | |
120 | } | |
121 | ||
25ddd738 MM |
122 | static irqreturn_t call_function_action(int irq, void *data) |
123 | { | |
124 | generic_smp_call_function_interrupt(); | |
125 | return IRQ_HANDLED; | |
126 | } | |
127 | ||
128 | static irqreturn_t reschedule_action(int irq, void *data) | |
129 | { | |
130 | /* we just need the return path side effect of checking need_resched */ | |
131 | return IRQ_HANDLED; | |
132 | } | |
133 | ||
134 | static irqreturn_t call_function_single_action(int irq, void *data) | |
135 | { | |
136 | generic_smp_call_function_single_interrupt(); | |
137 | return IRQ_HANDLED; | |
138 | } | |
139 | ||
140 | static irqreturn_t debug_ipi_action(int irq, void *data) | |
141 | { | |
142 | smp_message_recv(PPC_MSG_DEBUGGER_BREAK); | |
143 | return IRQ_HANDLED; | |
144 | } | |
145 | ||
146 | static irq_handler_t smp_ipi_action[] = { | |
147 | [PPC_MSG_CALL_FUNCTION] = call_function_action, | |
148 | [PPC_MSG_RESCHEDULE] = reschedule_action, | |
149 | [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action, | |
150 | [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action, | |
151 | }; | |
152 | ||
153 | const char *smp_ipi_name[] = { | |
154 | [PPC_MSG_CALL_FUNCTION] = "ipi call function", | |
155 | [PPC_MSG_RESCHEDULE] = "ipi reschedule", | |
156 | [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single", | |
157 | [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger", | |
158 | }; | |
159 | ||
160 | /* optional function to request ipi, for controllers with >= 4 ipis */ | |
161 | int smp_request_message_ipi(int virq, int msg) | |
162 | { | |
163 | int err; | |
164 | ||
165 | if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) { | |
166 | return -EINVAL; | |
167 | } | |
168 | #if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC) | |
169 | if (msg == PPC_MSG_DEBUGGER_BREAK) { | |
170 | return 1; | |
171 | } | |
172 | #endif | |
173 | err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU, | |
174 | smp_ipi_name[msg], 0); | |
175 | WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", | |
176 | virq, smp_ipi_name[msg], err); | |
177 | ||
178 | return err; | |
179 | } | |
180 | ||
1da177e4 LT |
181 | void smp_send_reschedule(int cpu) |
182 | { | |
8cffc6ac BH |
183 | if (likely(smp_ops)) |
184 | smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); | |
1da177e4 LT |
185 | } |
186 | ||
b7d7a240 JA |
187 | void arch_send_call_function_single_ipi(int cpu) |
188 | { | |
189 | smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); | |
190 | } | |
191 | ||
f063ea02 | 192 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
b7d7a240 JA |
193 | { |
194 | unsigned int cpu; | |
195 | ||
f063ea02 | 196 | for_each_cpu(cpu, mask) |
b7d7a240 JA |
197 | smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
198 | } | |
199 | ||
1da177e4 LT |
200 | #ifdef CONFIG_DEBUGGER |
201 | void smp_send_debugger_break(int cpu) | |
202 | { | |
8cffc6ac BH |
203 | if (likely(smp_ops)) |
204 | smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); | |
1da177e4 LT |
205 | } |
206 | #endif | |
207 | ||
cc532915 ME |
208 | #ifdef CONFIG_KEXEC |
209 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | |
210 | { | |
211 | crash_ipi_function_ptr = crash_ipi_callback; | |
8cffc6ac | 212 | if (crash_ipi_callback && smp_ops) { |
cc532915 ME |
213 | mb(); |
214 | smp_ops->message_pass(MSG_ALL_BUT_SELF, PPC_MSG_DEBUGGER_BREAK); | |
215 | } | |
216 | } | |
217 | #endif | |
218 | ||
1da177e4 LT |
219 | static void stop_this_cpu(void *dummy) |
220 | { | |
8389b37d VB |
221 | /* Remove this CPU */ |
222 | set_cpu_online(smp_processor_id(), false); | |
223 | ||
1da177e4 LT |
224 | local_irq_disable(); |
225 | while (1) | |
226 | ; | |
227 | } | |
228 | ||
8fd7675c SS |
229 | void smp_send_stop(void) |
230 | { | |
8691e5a8 | 231 | smp_call_function(stop_this_cpu, NULL, 0); |
1da177e4 LT |
232 | } |
233 | ||
1da177e4 LT |
234 | struct thread_info *current_set[NR_CPUS]; |
235 | ||
1da177e4 LT |
236 | static void __devinit smp_store_cpu_info(int id) |
237 | { | |
6b7487fc | 238 | per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); |
1da177e4 LT |
239 | } |
240 | ||
241 | static void __init smp_create_idle(unsigned int cpu) | |
242 | { | |
243 | struct task_struct *p; | |
244 | ||
245 | /* create a process for the processor */ | |
246 | p = fork_idle(cpu); | |
247 | if (IS_ERR(p)) | |
248 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
5ad57078 | 249 | #ifdef CONFIG_PPC64 |
1da177e4 | 250 | paca[cpu].__current = p; |
3b575064 PM |
251 | paca[cpu].kstack = (unsigned long) task_thread_info(p) |
252 | + THREAD_SIZE - STACK_FRAME_OVERHEAD; | |
5ad57078 | 253 | #endif |
b5e2fc1c AV |
254 | current_set[cpu] = task_thread_info(p); |
255 | task_thread_info(p)->cpu = cpu; | |
1da177e4 LT |
256 | } |
257 | ||
258 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
259 | { | |
260 | unsigned int cpu; | |
261 | ||
262 | DBG("smp_prepare_cpus\n"); | |
263 | ||
264 | /* | |
265 | * setup_cpu may need to be called on the boot cpu. We havent | |
266 | * spun any cpus up but lets be paranoid. | |
267 | */ | |
268 | BUG_ON(boot_cpuid != smp_processor_id()); | |
269 | ||
270 | /* Fixup boot cpu */ | |
271 | smp_store_cpu_info(boot_cpuid); | |
272 | cpu_callin_map[boot_cpuid] = 1; | |
273 | ||
cc1ba8ea AB |
274 | for_each_possible_cpu(cpu) { |
275 | zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu), | |
276 | GFP_KERNEL, cpu_to_node(cpu)); | |
277 | zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu), | |
278 | GFP_KERNEL, cpu_to_node(cpu)); | |
279 | } | |
280 | ||
281 | cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); | |
282 | cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); | |
283 | ||
8cffc6ac | 284 | if (smp_ops) |
757cbd46 KG |
285 | if (smp_ops->probe) |
286 | max_cpus = smp_ops->probe(); | |
287 | else | |
288 | max_cpus = NR_CPUS; | |
8cffc6ac BH |
289 | else |
290 | max_cpus = 1; | |
1da177e4 | 291 | |
0e551954 | 292 | for_each_possible_cpu(cpu) |
1da177e4 LT |
293 | if (cpu != boot_cpuid) |
294 | smp_create_idle(cpu); | |
295 | } | |
296 | ||
297 | void __devinit smp_prepare_boot_cpu(void) | |
298 | { | |
299 | BUG_ON(smp_processor_id() != boot_cpuid); | |
5ad57078 | 300 | #ifdef CONFIG_PPC64 |
1da177e4 | 301 | paca[boot_cpuid].__current = current; |
5ad57078 | 302 | #endif |
b5e2fc1c | 303 | current_set[boot_cpuid] = task_thread_info(current); |
1da177e4 LT |
304 | } |
305 | ||
306 | #ifdef CONFIG_HOTPLUG_CPU | |
307 | /* State of each CPU during hotplug phases */ | |
308 | DEFINE_PER_CPU(int, cpu_state) = { 0 }; | |
309 | ||
310 | int generic_cpu_disable(void) | |
311 | { | |
312 | unsigned int cpu = smp_processor_id(); | |
313 | ||
314 | if (cpu == boot_cpuid) | |
315 | return -EBUSY; | |
316 | ||
ea0f1cab | 317 | set_cpu_online(cpu, false); |
799d6046 | 318 | #ifdef CONFIG_PPC64 |
a7f290da | 319 | vdso_data->processorCount--; |
b6decb70 | 320 | fixup_irqs(cpu_online_mask); |
094fe2e7 | 321 | #endif |
1da177e4 LT |
322 | return 0; |
323 | } | |
324 | ||
325 | int generic_cpu_enable(unsigned int cpu) | |
326 | { | |
327 | /* Do the normal bootup if we haven't | |
328 | * already bootstrapped. */ | |
329 | if (system_state != SYSTEM_RUNNING) | |
330 | return -ENOSYS; | |
331 | ||
332 | /* get the target out of it's holding state */ | |
333 | per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; | |
0d8d4d42 | 334 | smp_wmb(); |
1da177e4 LT |
335 | |
336 | while (!cpu_online(cpu)) | |
337 | cpu_relax(); | |
338 | ||
094fe2e7 | 339 | #ifdef CONFIG_PPC64 |
b6decb70 | 340 | fixup_irqs(cpu_online_mask); |
1da177e4 LT |
341 | /* counter the irq disable in fixup_irqs */ |
342 | local_irq_enable(); | |
094fe2e7 | 343 | #endif |
1da177e4 LT |
344 | return 0; |
345 | } | |
346 | ||
347 | void generic_cpu_die(unsigned int cpu) | |
348 | { | |
349 | int i; | |
350 | ||
351 | for (i = 0; i < 100; i++) { | |
0d8d4d42 | 352 | smp_rmb(); |
1da177e4 LT |
353 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
354 | return; | |
355 | msleep(100); | |
356 | } | |
357 | printk(KERN_ERR "CPU%d didn't die...\n", cpu); | |
358 | } | |
359 | ||
360 | void generic_mach_cpu_die(void) | |
361 | { | |
362 | unsigned int cpu; | |
363 | ||
364 | local_irq_disable(); | |
365 | cpu = smp_processor_id(); | |
366 | printk(KERN_DEBUG "CPU%d offline\n", cpu); | |
367 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
0d8d4d42 | 368 | smp_wmb(); |
1da177e4 LT |
369 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) |
370 | cpu_relax(); | |
ea0f1cab | 371 | set_cpu_online(cpu, true); |
1da177e4 LT |
372 | local_irq_enable(); |
373 | } | |
374 | #endif | |
375 | ||
376 | static int __devinit cpu_enable(unsigned int cpu) | |
377 | { | |
8cffc6ac | 378 | if (smp_ops && smp_ops->cpu_enable) |
1da177e4 LT |
379 | return smp_ops->cpu_enable(cpu); |
380 | ||
381 | return -ENOSYS; | |
382 | } | |
383 | ||
b282b6f8 | 384 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 LT |
385 | { |
386 | int c; | |
387 | ||
5ad57078 | 388 | secondary_ti = current_set[cpu]; |
1da177e4 LT |
389 | if (!cpu_enable(cpu)) |
390 | return 0; | |
391 | ||
8cffc6ac BH |
392 | if (smp_ops == NULL || |
393 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | |
1da177e4 LT |
394 | return -EINVAL; |
395 | ||
1da177e4 LT |
396 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
397 | * hotplug | |
398 | */ | |
399 | cpu_callin_map[cpu] = 0; | |
400 | ||
401 | /* The information for processor bringup must | |
402 | * be written out to main store before we release | |
403 | * the processor. | |
404 | */ | |
0d8d4d42 | 405 | smp_mb(); |
1da177e4 LT |
406 | |
407 | /* wake up cpus */ | |
408 | DBG("smp: kicking cpu %d\n", cpu); | |
409 | smp_ops->kick_cpu(cpu); | |
410 | ||
411 | /* | |
412 | * wait to see if the cpu made a callin (is actually up). | |
413 | * use this value that I found through experimentation. | |
414 | * -- Cort | |
415 | */ | |
416 | if (system_state < SYSTEM_RUNNING) | |
ee0339f2 | 417 | for (c = 50000; c && !cpu_callin_map[cpu]; c--) |
1da177e4 LT |
418 | udelay(100); |
419 | #ifdef CONFIG_HOTPLUG_CPU | |
420 | else | |
421 | /* | |
422 | * CPUs can take much longer to come up in the | |
423 | * hotplug case. Wait five seconds. | |
424 | */ | |
67764263 GS |
425 | for (c = 5000; c && !cpu_callin_map[cpu]; c--) |
426 | msleep(1); | |
1da177e4 LT |
427 | #endif |
428 | ||
429 | if (!cpu_callin_map[cpu]) { | |
6685a477 | 430 | printk(KERN_ERR "Processor %u is stuck.\n", cpu); |
1da177e4 LT |
431 | return -ENOENT; |
432 | } | |
433 | ||
6685a477 | 434 | DBG("Processor %u found.\n", cpu); |
1da177e4 LT |
435 | |
436 | if (smp_ops->give_timebase) | |
437 | smp_ops->give_timebase(); | |
438 | ||
439 | /* Wait until cpu puts itself in the online map */ | |
440 | while (!cpu_online(cpu)) | |
441 | cpu_relax(); | |
442 | ||
443 | return 0; | |
444 | } | |
445 | ||
e9efed3b NL |
446 | /* Return the value of the reg property corresponding to the given |
447 | * logical cpu. | |
448 | */ | |
449 | int cpu_to_core_id(int cpu) | |
450 | { | |
451 | struct device_node *np; | |
452 | const int *reg; | |
453 | int id = -1; | |
454 | ||
455 | np = of_get_cpu_node(cpu, NULL); | |
456 | if (!np) | |
457 | goto out; | |
458 | ||
459 | reg = of_get_property(np, "reg", NULL); | |
460 | if (!reg) | |
461 | goto out; | |
462 | ||
463 | id = *reg; | |
464 | out: | |
465 | of_node_put(np); | |
466 | return id; | |
467 | } | |
468 | ||
99d86705 VS |
469 | /* Helper routines for cpu to core mapping */ |
470 | int cpu_core_index_of_thread(int cpu) | |
471 | { | |
472 | return cpu >> threads_shift; | |
473 | } | |
474 | EXPORT_SYMBOL_GPL(cpu_core_index_of_thread); | |
475 | ||
476 | int cpu_first_thread_of_core(int core) | |
477 | { | |
478 | return core << threads_shift; | |
479 | } | |
480 | EXPORT_SYMBOL_GPL(cpu_first_thread_of_core); | |
481 | ||
482 | /* Must be called when no change can occur to cpu_present_map, | |
440a0857 NL |
483 | * i.e. during cpu online or offline. |
484 | */ | |
485 | static struct device_node *cpu_to_l2cache(int cpu) | |
486 | { | |
487 | struct device_node *np; | |
b2ea25b9 | 488 | struct device_node *cache; |
440a0857 NL |
489 | |
490 | if (!cpu_present(cpu)) | |
491 | return NULL; | |
492 | ||
493 | np = of_get_cpu_node(cpu, NULL); | |
494 | if (np == NULL) | |
495 | return NULL; | |
496 | ||
b2ea25b9 NL |
497 | cache = of_find_next_cache_node(np); |
498 | ||
440a0857 NL |
499 | of_node_put(np); |
500 | ||
b2ea25b9 | 501 | return cache; |
440a0857 | 502 | } |
1da177e4 LT |
503 | |
504 | /* Activate a secondary processor. */ | |
505 | int __devinit start_secondary(void *unused) | |
506 | { | |
507 | unsigned int cpu = smp_processor_id(); | |
440a0857 | 508 | struct device_node *l2_cache; |
e2075f79 | 509 | int i, base; |
1da177e4 LT |
510 | |
511 | atomic_inc(&init_mm.mm_count); | |
512 | current->active_mm = &init_mm; | |
513 | ||
514 | smp_store_cpu_info(cpu); | |
5ad57078 | 515 | set_dec(tb_ticks_per_jiffy); |
e4d76e1c | 516 | preempt_disable(); |
1da177e4 LT |
517 | cpu_callin_map[cpu] = 1; |
518 | ||
757cbd46 KG |
519 | if (smp_ops->setup_cpu) |
520 | smp_ops->setup_cpu(cpu); | |
1da177e4 LT |
521 | if (smp_ops->take_timebase) |
522 | smp_ops->take_timebase(); | |
523 | ||
d831d0b8 TB |
524 | secondary_cpu_time_init(); |
525 | ||
b7d7a240 | 526 | ipi_call_lock(); |
e545a614 | 527 | notify_cpu_starting(cpu); |
ea0f1cab | 528 | set_cpu_online(cpu, true); |
e2075f79 | 529 | /* Update sibling maps */ |
99d86705 | 530 | base = cpu_first_thread_sibling(cpu); |
e2075f79 NL |
531 | for (i = 0; i < threads_per_core; i++) { |
532 | if (cpu_is_offline(base + i)) | |
533 | continue; | |
cc1ba8ea AB |
534 | cpumask_set_cpu(cpu, cpu_sibling_mask(base + i)); |
535 | cpumask_set_cpu(base + i, cpu_sibling_mask(cpu)); | |
440a0857 NL |
536 | |
537 | /* cpu_core_map should be a superset of | |
538 | * cpu_sibling_map even if we don't have cache | |
539 | * information, so update the former here, too. | |
540 | */ | |
cc1ba8ea AB |
541 | cpumask_set_cpu(cpu, cpu_core_mask(base + i)); |
542 | cpumask_set_cpu(base + i, cpu_core_mask(cpu)); | |
e2075f79 | 543 | } |
440a0857 NL |
544 | l2_cache = cpu_to_l2cache(cpu); |
545 | for_each_online_cpu(i) { | |
546 | struct device_node *np = cpu_to_l2cache(i); | |
547 | if (!np) | |
548 | continue; | |
549 | if (np == l2_cache) { | |
cc1ba8ea AB |
550 | cpumask_set_cpu(cpu, cpu_core_mask(i)); |
551 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
552 | } |
553 | of_node_put(np); | |
554 | } | |
555 | of_node_put(l2_cache); | |
b7d7a240 | 556 | ipi_call_unlock(); |
1da177e4 LT |
557 | |
558 | local_irq_enable(); | |
559 | ||
560 | cpu_idle(); | |
561 | return 0; | |
562 | } | |
563 | ||
564 | int setup_profiling_timer(unsigned int multiplier) | |
565 | { | |
566 | return 0; | |
567 | } | |
568 | ||
569 | void __init smp_cpus_done(unsigned int max_cpus) | |
570 | { | |
bfb9126d | 571 | cpumask_var_t old_mask; |
1da177e4 LT |
572 | |
573 | /* We want the setup_cpu() here to be called from CPU 0, but our | |
574 | * init thread may have been "borrowed" by another CPU in the meantime | |
575 | * se we pin us down to CPU 0 for a short while | |
576 | */ | |
bfb9126d AB |
577 | alloc_cpumask_var(&old_mask, GFP_NOWAIT); |
578 | cpumask_copy(old_mask, ¤t->cpus_allowed); | |
21dbeb91 | 579 | set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid)); |
1da177e4 | 580 | |
757cbd46 | 581 | if (smp_ops && smp_ops->setup_cpu) |
8cffc6ac | 582 | smp_ops->setup_cpu(boot_cpuid); |
1da177e4 | 583 | |
bfb9126d AB |
584 | set_cpus_allowed_ptr(current, old_mask); |
585 | ||
586 | free_cpumask_var(old_mask); | |
4b703a23 AB |
587 | |
588 | dump_numa_cpu_topology(); | |
1da177e4 LT |
589 | } |
590 | ||
e1f0ece1 MN |
591 | int arch_sd_sibling_asym_packing(void) |
592 | { | |
593 | if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { | |
594 | printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); | |
595 | return SD_ASYM_PACKING; | |
596 | } | |
597 | return 0; | |
598 | } | |
599 | ||
1da177e4 LT |
600 | #ifdef CONFIG_HOTPLUG_CPU |
601 | int __cpu_disable(void) | |
602 | { | |
440a0857 | 603 | struct device_node *l2_cache; |
e2075f79 NL |
604 | int cpu = smp_processor_id(); |
605 | int base, i; | |
606 | int err; | |
1da177e4 | 607 | |
e2075f79 NL |
608 | if (!smp_ops->cpu_disable) |
609 | return -ENOSYS; | |
610 | ||
611 | err = smp_ops->cpu_disable(); | |
612 | if (err) | |
613 | return err; | |
614 | ||
615 | /* Update sibling maps */ | |
99d86705 | 616 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 617 | for (i = 0; i < threads_per_core; i++) { |
cc1ba8ea AB |
618 | cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i)); |
619 | cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu)); | |
620 | cpumask_clear_cpu(cpu, cpu_core_mask(base + i)); | |
621 | cpumask_clear_cpu(base + i, cpu_core_mask(cpu)); | |
440a0857 NL |
622 | } |
623 | ||
624 | l2_cache = cpu_to_l2cache(cpu); | |
625 | for_each_present_cpu(i) { | |
626 | struct device_node *np = cpu_to_l2cache(i); | |
627 | if (!np) | |
628 | continue; | |
629 | if (np == l2_cache) { | |
cc1ba8ea AB |
630 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); |
631 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
632 | } |
633 | of_node_put(np); | |
e2075f79 | 634 | } |
440a0857 NL |
635 | of_node_put(l2_cache); |
636 | ||
e2075f79 NL |
637 | |
638 | return 0; | |
1da177e4 LT |
639 | } |
640 | ||
641 | void __cpu_die(unsigned int cpu) | |
642 | { | |
643 | if (smp_ops->cpu_die) | |
644 | smp_ops->cpu_die(cpu); | |
645 | } | |
d0174c72 NF |
646 | |
647 | static DEFINE_MUTEX(powerpc_cpu_hotplug_driver_mutex); | |
648 | ||
649 | void cpu_hotplug_driver_lock() | |
650 | { | |
651 | mutex_lock(&powerpc_cpu_hotplug_driver_mutex); | |
652 | } | |
653 | ||
654 | void cpu_hotplug_driver_unlock() | |
655 | { | |
656 | mutex_unlock(&powerpc_cpu_hotplug_driver_mutex); | |
657 | } | |
abb17f9c MM |
658 | |
659 | void cpu_die(void) | |
660 | { | |
661 | if (ppc_md.cpu_die) | |
662 | ppc_md.cpu_die(); | |
663 | } | |
1da177e4 | 664 | #endif |