powerpc/numa: Enable USE_PERCPU_NUMA_NODE_ID
[deliverable/linux.git] / arch / powerpc / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * SMP support for ppc.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
5 * deal of code from the sparc and intel versions.
6 *
7 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
8 *
9 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
10 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#undef DEBUG
19
1da177e4 20#include <linux/kernel.h>
4b16f8e2 21#include <linux/export.h>
1da177e4
LT
22#include <linux/sched.h>
23#include <linux/smp.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/spinlock.h>
28#include <linux/cache.h>
29#include <linux/err.h>
8a25a2fd 30#include <linux/device.h>
1da177e4
LT
31#include <linux/cpu.h>
32#include <linux/notifier.h>
4b703a23 33#include <linux/topology.h>
1da177e4
LT
34
35#include <asm/ptrace.h>
60063497 36#include <linux/atomic.h>
1da177e4 37#include <asm/irq.h>
1b67bee1 38#include <asm/hw_irq.h>
1da177e4
LT
39#include <asm/page.h>
40#include <asm/pgtable.h>
41#include <asm/prom.h>
42#include <asm/smp.h>
1da177e4
LT
43#include <asm/time.h>
44#include <asm/machdep.h>
e2075f79 45#include <asm/cputhreads.h>
1da177e4 46#include <asm/cputable.h>
bbeb3f4c 47#include <asm/mpic.h>
a7f290da 48#include <asm/vdso_datapage.h>
5ad57078
PM
49#ifdef CONFIG_PPC64
50#include <asm/paca.h>
51#endif
18ad51dd 52#include <asm/vdso.h>
ae3a197e 53#include <asm/debug.h>
5ad57078 54
1da177e4 55#ifdef DEBUG
f9e4ec57 56#include <asm/udbg.h>
1da177e4
LT
57#define DBG(fmt...) udbg_printf(fmt)
58#else
59#define DBG(fmt...)
60#endif
61
c56e5853 62#ifdef CONFIG_HOTPLUG_CPU
fb82b839
BH
63/* State of each CPU during hotplug phases */
64static DEFINE_PER_CPU(int, cpu_state) = { 0 };
c56e5853
BH
65#endif
66
f9e4ec57
ME
67struct thread_info *secondary_ti;
68
cc1ba8ea
AB
69DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
70DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
1da177e4 71
d5a7430d 72EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
440a0857 73EXPORT_PER_CPU_SYMBOL(cpu_core_map);
1da177e4 74
5ad57078 75/* SMP operations for this machine */
1da177e4
LT
76struct smp_ops_t *smp_ops;
77
7ccbe504
BH
78/* Can't be static due to PowerMac hackery */
79volatile unsigned int cpu_callin_map[NR_CPUS];
1da177e4 80
1da177e4
LT
81int smt_enabled_at_boot = 1;
82
cc532915
ME
83static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
84
3cd85250
AF
85/*
86 * Returns 1 if the specified cpu should be brought up during boot.
87 * Used to inhibit booting threads if they've been disabled or
88 * limited on the command line
89 */
90int smp_generic_cpu_bootable(unsigned int nr)
91{
92 /* Special case - we inhibit secondary thread startup
93 * during boot if the user requests it.
94 */
95 if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) {
96 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
97 return 0;
98 if (smt_enabled_at_boot
99 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
100 return 0;
101 }
102
103 return 1;
104}
105
106
5ad57078 107#ifdef CONFIG_PPC64
cad5cef6 108int smp_generic_kick_cpu(int nr)
1da177e4
LT
109{
110 BUG_ON(nr < 0 || nr >= NR_CPUS);
111
112 /*
113 * The processor is currently spinning, waiting for the
114 * cpu_start field to become non-zero After we set cpu_start,
115 * the processor will continue on to secondary_start
116 */
fb82b839
BH
117 if (!paca[nr].cpu_start) {
118 paca[nr].cpu_start = 1;
119 smp_mb();
120 return 0;
121 }
122
123#ifdef CONFIG_HOTPLUG_CPU
124 /*
125 * Ok it's not there, so it might be soft-unplugged, let's
126 * try to bring it back
127 */
ae5cab47 128 generic_set_cpu_up(nr);
fb82b839
BH
129 smp_wmb();
130 smp_send_reschedule(nr);
131#endif /* CONFIG_HOTPLUG_CPU */
de300974
ME
132
133 return 0;
1da177e4 134}
fb82b839 135#endif /* CONFIG_PPC64 */
1da177e4 136
25ddd738
MM
137static irqreturn_t call_function_action(int irq, void *data)
138{
139 generic_smp_call_function_interrupt();
140 return IRQ_HANDLED;
141}
142
143static irqreturn_t reschedule_action(int irq, void *data)
144{
184748cc 145 scheduler_ipi();
25ddd738
MM
146 return IRQ_HANDLED;
147}
148
1b67bee1 149static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
25ddd738 150{
1b67bee1 151 tick_broadcast_ipi_handler();
25ddd738
MM
152 return IRQ_HANDLED;
153}
154
7ef71d75 155static irqreturn_t debug_ipi_action(int irq, void *data)
25ddd738 156{
23d72bfd
MM
157 if (crash_ipi_function_ptr) {
158 crash_ipi_function_ptr(get_irq_regs());
159 return IRQ_HANDLED;
160 }
161
162#ifdef CONFIG_DEBUGGER
163 debugger_ipi(get_irq_regs());
164#endif /* CONFIG_DEBUGGER */
165
25ddd738
MM
166 return IRQ_HANDLED;
167}
168
169static irq_handler_t smp_ipi_action[] = {
170 [PPC_MSG_CALL_FUNCTION] = call_function_action,
171 [PPC_MSG_RESCHEDULE] = reschedule_action,
1b67bee1 172 [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
25ddd738
MM
173 [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action,
174};
175
176const char *smp_ipi_name[] = {
177 [PPC_MSG_CALL_FUNCTION] = "ipi call function",
178 [PPC_MSG_RESCHEDULE] = "ipi reschedule",
1b67bee1 179 [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
25ddd738
MM
180 [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger",
181};
182
183/* optional function to request ipi, for controllers with >= 4 ipis */
184int smp_request_message_ipi(int virq, int msg)
185{
186 int err;
187
188 if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) {
189 return -EINVAL;
190 }
191#if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC)
192 if (msg == PPC_MSG_DEBUGGER_BREAK) {
193 return 1;
194 }
195#endif
3b5e16d7 196 err = request_irq(virq, smp_ipi_action[msg],
e6651de9 197 IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
b0d436c7 198 smp_ipi_name[msg], NULL);
25ddd738
MM
199 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
200 virq, smp_ipi_name[msg], err);
201
202 return err;
203}
204
1ece355b 205#ifdef CONFIG_PPC_SMP_MUXED_IPI
23d72bfd 206struct cpu_messages {
71454272 207 int messages; /* current messages */
23d72bfd
MM
208 unsigned long data; /* data for cause ipi */
209};
210static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
211
212void smp_muxed_ipi_set_data(int cpu, unsigned long data)
213{
214 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
215
216 info->data = data;
217}
218
219void smp_muxed_ipi_message_pass(int cpu, int msg)
220{
221 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
71454272 222 char *message = (char *)&info->messages;
23d72bfd 223
9fb1b36c
PM
224 /*
225 * Order previous accesses before accesses in the IPI handler.
226 */
227 smp_mb();
71454272 228 message[msg] = 1;
9fb1b36c
PM
229 /*
230 * cause_ipi functions are required to include a full barrier
231 * before doing whatever causes the IPI.
232 */
23d72bfd
MM
233 smp_ops->cause_ipi(cpu, info->data);
234}
235
0654de1c
AB
236#ifdef __BIG_ENDIAN__
237#define IPI_MESSAGE(A) (1 << (24 - 8 * (A)))
238#else
239#define IPI_MESSAGE(A) (1 << (8 * (A)))
240#endif
241
23d72bfd
MM
242irqreturn_t smp_ipi_demux(void)
243{
244 struct cpu_messages *info = &__get_cpu_var(ipi_message);
71454272 245 unsigned int all;
23d72bfd
MM
246
247 mb(); /* order any irq clear */
71454272
MM
248
249 do {
9fb1b36c 250 all = xchg(&info->messages, 0);
0654de1c 251 if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
23d72bfd 252 generic_smp_call_function_interrupt();
0654de1c 253 if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
880102e7 254 scheduler_ipi();
1b67bee1
SB
255 if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
256 tick_broadcast_ipi_handler();
0654de1c 257 if (all & IPI_MESSAGE(PPC_MSG_DEBUGGER_BREAK))
23d72bfd 258 debug_ipi_action(0, NULL);
71454272
MM
259 } while (info->messages);
260
23d72bfd
MM
261 return IRQ_HANDLED;
262}
1ece355b 263#endif /* CONFIG_PPC_SMP_MUXED_IPI */
23d72bfd 264
9ca980dc
PM
265static inline void do_message_pass(int cpu, int msg)
266{
267 if (smp_ops->message_pass)
268 smp_ops->message_pass(cpu, msg);
269#ifdef CONFIG_PPC_SMP_MUXED_IPI
270 else
271 smp_muxed_ipi_message_pass(cpu, msg);
272#endif
273}
274
1da177e4
LT
275void smp_send_reschedule(int cpu)
276{
8cffc6ac 277 if (likely(smp_ops))
9ca980dc 278 do_message_pass(cpu, PPC_MSG_RESCHEDULE);
1da177e4 279}
de56a948 280EXPORT_SYMBOL_GPL(smp_send_reschedule);
1da177e4 281
b7d7a240
JA
282void arch_send_call_function_single_ipi(int cpu)
283{
402d9a1e 284 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
b7d7a240
JA
285}
286
f063ea02 287void arch_send_call_function_ipi_mask(const struct cpumask *mask)
b7d7a240
JA
288{
289 unsigned int cpu;
290
f063ea02 291 for_each_cpu(cpu, mask)
9ca980dc 292 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
b7d7a240
JA
293}
294
1b67bee1
SB
295#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
296void tick_broadcast(const struct cpumask *mask)
297{
298 unsigned int cpu;
299
300 for_each_cpu(cpu, mask)
301 do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
302}
303#endif
304
e0476371
MM
305#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
306void smp_send_debugger_break(void)
1da177e4 307{
e0476371
MM
308 int cpu;
309 int me = raw_smp_processor_id();
310
311 if (unlikely(!smp_ops))
312 return;
313
314 for_each_online_cpu(cpu)
315 if (cpu != me)
9ca980dc 316 do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK);
1da177e4
LT
317}
318#endif
319
cc532915
ME
320#ifdef CONFIG_KEXEC
321void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
322{
323 crash_ipi_function_ptr = crash_ipi_callback;
e0476371 324 if (crash_ipi_callback) {
cc532915 325 mb();
e0476371 326 smp_send_debugger_break();
cc532915
ME
327 }
328}
329#endif
330
1da177e4
LT
331static void stop_this_cpu(void *dummy)
332{
8389b37d
VB
333 /* Remove this CPU */
334 set_cpu_online(smp_processor_id(), false);
335
1da177e4
LT
336 local_irq_disable();
337 while (1)
338 ;
339}
340
8fd7675c
SS
341void smp_send_stop(void)
342{
8691e5a8 343 smp_call_function(stop_this_cpu, NULL, 0);
1da177e4
LT
344}
345
1da177e4
LT
346struct thread_info *current_set[NR_CPUS];
347
cad5cef6 348static void smp_store_cpu_info(int id)
1da177e4 349{
6b7487fc 350 per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
3160b097
BB
351#ifdef CONFIG_PPC_FSL_BOOK3E
352 per_cpu(next_tlbcam_idx, id)
353 = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
354#endif
1da177e4
LT
355}
356
1da177e4
LT
357void __init smp_prepare_cpus(unsigned int max_cpus)
358{
359 unsigned int cpu;
360
361 DBG("smp_prepare_cpus\n");
362
363 /*
364 * setup_cpu may need to be called on the boot cpu. We havent
365 * spun any cpus up but lets be paranoid.
366 */
367 BUG_ON(boot_cpuid != smp_processor_id());
368
369 /* Fixup boot cpu */
370 smp_store_cpu_info(boot_cpuid);
371 cpu_callin_map[boot_cpuid] = 1;
372
cc1ba8ea
AB
373 for_each_possible_cpu(cpu) {
374 zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
375 GFP_KERNEL, cpu_to_node(cpu));
376 zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
377 GFP_KERNEL, cpu_to_node(cpu));
378 }
379
380 cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
381 cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
382
dfee0efe
CG
383 if (smp_ops && smp_ops->probe)
384 smp_ops->probe();
1da177e4
LT
385}
386
cad5cef6 387void smp_prepare_boot_cpu(void)
1da177e4
LT
388{
389 BUG_ON(smp_processor_id() != boot_cpuid);
5ad57078 390#ifdef CONFIG_PPC64
1da177e4 391 paca[boot_cpuid].__current = current;
5ad57078 392#endif
8c272261 393 set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
b5e2fc1c 394 current_set[boot_cpuid] = task_thread_info(current);
1da177e4
LT
395}
396
397#ifdef CONFIG_HOTPLUG_CPU
1da177e4
LT
398
399int generic_cpu_disable(void)
400{
401 unsigned int cpu = smp_processor_id();
402
403 if (cpu == boot_cpuid)
404 return -EBUSY;
405
ea0f1cab 406 set_cpu_online(cpu, false);
799d6046 407#ifdef CONFIG_PPC64
a7f290da 408 vdso_data->processorCount--;
094fe2e7 409#endif
1c91cc57 410 migrate_irqs();
1da177e4
LT
411 return 0;
412}
413
1da177e4
LT
414void generic_cpu_die(unsigned int cpu)
415{
416 int i;
417
418 for (i = 0; i < 100; i++) {
0d8d4d42 419 smp_rmb();
1da177e4
LT
420 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
421 return;
422 msleep(100);
423 }
424 printk(KERN_ERR "CPU%d didn't die...\n", cpu);
425}
426
427void generic_mach_cpu_die(void)
428{
429 unsigned int cpu;
430
431 local_irq_disable();
4fcb8833 432 idle_task_exit();
1da177e4
LT
433 cpu = smp_processor_id();
434 printk(KERN_DEBUG "CPU%d offline\n", cpu);
435 __get_cpu_var(cpu_state) = CPU_DEAD;
0d8d4d42 436 smp_wmb();
1da177e4
LT
437 while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE)
438 cpu_relax();
1da177e4 439}
105765f4
BH
440
441void generic_set_cpu_dead(unsigned int cpu)
442{
443 per_cpu(cpu_state, cpu) = CPU_DEAD;
444}
fb82b839 445
ae5cab47
ZC
446/*
447 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
448 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
449 * which makes the delay in generic_cpu_die() not happen.
450 */
451void generic_set_cpu_up(unsigned int cpu)
452{
453 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
454}
455
fb82b839
BH
456int generic_check_cpu_restart(unsigned int cpu)
457{
458 return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
459}
512691d4
PM
460
461static atomic_t secondary_inhibit_count;
462
463/*
464 * Don't allow secondary CPU threads to come online
465 */
466void inhibit_secondary_onlining(void)
467{
468 /*
469 * This makes secondary_inhibit_count stable during cpu
470 * online/offline operations.
471 */
472 get_online_cpus();
473
474 atomic_inc(&secondary_inhibit_count);
475 put_online_cpus();
476}
477EXPORT_SYMBOL_GPL(inhibit_secondary_onlining);
478
479/*
480 * Allow secondary CPU threads to come online again
481 */
482void uninhibit_secondary_onlining(void)
483{
484 get_online_cpus();
485 atomic_dec(&secondary_inhibit_count);
486 put_online_cpus();
487}
488EXPORT_SYMBOL_GPL(uninhibit_secondary_onlining);
489
490static int secondaries_inhibited(void)
491{
492 return atomic_read(&secondary_inhibit_count);
493}
494
495#else /* HOTPLUG_CPU */
496
497#define secondaries_inhibited() 0
498
1da177e4
LT
499#endif
500
17e32eac 501static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
c56e5853 502{
17e32eac 503 struct thread_info *ti = task_thread_info(idle);
c56e5853
BH
504
505#ifdef CONFIG_PPC64
17e32eac 506 paca[cpu].__current = idle;
c56e5853
BH
507 paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD;
508#endif
509 ti->cpu = cpu;
17e32eac 510 secondary_ti = current_set[cpu] = ti;
c56e5853
BH
511}
512
061d19f2 513int __cpu_up(unsigned int cpu, struct task_struct *tidle)
1da177e4 514{
c56e5853 515 int rc, c;
1da177e4 516
512691d4
PM
517 /*
518 * Don't allow secondary threads to come online if inhibited
519 */
520 if (threads_per_core > 1 && secondaries_inhibited() &&
521 cpu % threads_per_core != 0)
522 return -EBUSY;
523
8cffc6ac
BH
524 if (smp_ops == NULL ||
525 (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
1da177e4
LT
526 return -EINVAL;
527
17e32eac 528 cpu_idle_thread_init(cpu, tidle);
c560bbce 529
1da177e4
LT
530 /* Make sure callin-map entry is 0 (can be leftover a CPU
531 * hotplug
532 */
533 cpu_callin_map[cpu] = 0;
534
535 /* The information for processor bringup must
536 * be written out to main store before we release
537 * the processor.
538 */
0d8d4d42 539 smp_mb();
1da177e4
LT
540
541 /* wake up cpus */
542 DBG("smp: kicking cpu %d\n", cpu);
de300974
ME
543 rc = smp_ops->kick_cpu(cpu);
544 if (rc) {
545 pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
546 return rc;
547 }
1da177e4
LT
548
549 /*
550 * wait to see if the cpu made a callin (is actually up).
551 * use this value that I found through experimentation.
552 * -- Cort
553 */
554 if (system_state < SYSTEM_RUNNING)
ee0339f2 555 for (c = 50000; c && !cpu_callin_map[cpu]; c--)
1da177e4
LT
556 udelay(100);
557#ifdef CONFIG_HOTPLUG_CPU
558 else
559 /*
560 * CPUs can take much longer to come up in the
561 * hotplug case. Wait five seconds.
562 */
67764263
GS
563 for (c = 5000; c && !cpu_callin_map[cpu]; c--)
564 msleep(1);
1da177e4
LT
565#endif
566
567 if (!cpu_callin_map[cpu]) {
6685a477 568 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
1da177e4
LT
569 return -ENOENT;
570 }
571
6685a477 572 DBG("Processor %u found.\n", cpu);
1da177e4
LT
573
574 if (smp_ops->give_timebase)
575 smp_ops->give_timebase();
576
577 /* Wait until cpu puts itself in the online map */
578 while (!cpu_online(cpu))
579 cpu_relax();
580
581 return 0;
582}
583
e9efed3b
NL
584/* Return the value of the reg property corresponding to the given
585 * logical cpu.
586 */
587int cpu_to_core_id(int cpu)
588{
589 struct device_node *np;
f8a1883a 590 const __be32 *reg;
e9efed3b
NL
591 int id = -1;
592
593 np = of_get_cpu_node(cpu, NULL);
594 if (!np)
595 goto out;
596
597 reg = of_get_property(np, "reg", NULL);
598 if (!reg)
599 goto out;
600
f8a1883a 601 id = be32_to_cpup(reg);
e9efed3b
NL
602out:
603 of_node_put(np);
604 return id;
605}
606
99d86705
VS
607/* Helper routines for cpu to core mapping */
608int cpu_core_index_of_thread(int cpu)
609{
610 return cpu >> threads_shift;
611}
612EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
613
614int cpu_first_thread_of_core(int core)
615{
616 return core << threads_shift;
617}
618EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
619
256f2d4b
PM
620static void traverse_siblings_chip_id(int cpu, bool add, int chipid)
621{
622 const struct cpumask *mask;
623 struct device_node *np;
624 int i, plen;
625 const __be32 *prop;
626
627 mask = add ? cpu_online_mask : cpu_present_mask;
628 for_each_cpu(i, mask) {
629 np = of_get_cpu_node(i, NULL);
630 if (!np)
631 continue;
632 prop = of_get_property(np, "ibm,chip-id", &plen);
633 if (prop && plen == sizeof(int) &&
634 of_read_number(prop, 1) == chipid) {
635 if (add) {
636 cpumask_set_cpu(cpu, cpu_core_mask(i));
637 cpumask_set_cpu(i, cpu_core_mask(cpu));
638 } else {
639 cpumask_clear_cpu(cpu, cpu_core_mask(i));
640 cpumask_clear_cpu(i, cpu_core_mask(cpu));
641 }
642 }
643 of_node_put(np);
644 }
645}
646
104699c0 647/* Must be called when no change can occur to cpu_present_mask,
440a0857
NL
648 * i.e. during cpu online or offline.
649 */
650static struct device_node *cpu_to_l2cache(int cpu)
651{
652 struct device_node *np;
b2ea25b9 653 struct device_node *cache;
440a0857
NL
654
655 if (!cpu_present(cpu))
656 return NULL;
657
658 np = of_get_cpu_node(cpu, NULL);
659 if (np == NULL)
660 return NULL;
661
b2ea25b9
NL
662 cache = of_find_next_cache_node(np);
663
440a0857
NL
664 of_node_put(np);
665
b2ea25b9 666 return cache;
440a0857 667}
1da177e4 668
a8a5356c
PM
669static void traverse_core_siblings(int cpu, bool add)
670{
256f2d4b 671 struct device_node *l2_cache, *np;
a8a5356c 672 const struct cpumask *mask;
256f2d4b
PM
673 int i, chip, plen;
674 const __be32 *prop;
675
676 /* First see if we have ibm,chip-id properties in cpu nodes */
677 np = of_get_cpu_node(cpu, NULL);
678 if (np) {
679 chip = -1;
680 prop = of_get_property(np, "ibm,chip-id", &plen);
681 if (prop && plen == sizeof(int))
682 chip = of_read_number(prop, 1);
683 of_node_put(np);
684 if (chip >= 0) {
685 traverse_siblings_chip_id(cpu, add, chip);
686 return;
687 }
688 }
a8a5356c
PM
689
690 l2_cache = cpu_to_l2cache(cpu);
691 mask = add ? cpu_online_mask : cpu_present_mask;
692 for_each_cpu(i, mask) {
256f2d4b 693 np = cpu_to_l2cache(i);
a8a5356c
PM
694 if (!np)
695 continue;
696 if (np == l2_cache) {
697 if (add) {
698 cpumask_set_cpu(cpu, cpu_core_mask(i));
699 cpumask_set_cpu(i, cpu_core_mask(cpu));
700 } else {
701 cpumask_clear_cpu(cpu, cpu_core_mask(i));
702 cpumask_clear_cpu(i, cpu_core_mask(cpu));
703 }
704 }
705 of_node_put(np);
706 }
707 of_node_put(l2_cache);
708}
709
1da177e4 710/* Activate a secondary processor. */
061d19f2 711void start_secondary(void *unused)
1da177e4
LT
712{
713 unsigned int cpu = smp_processor_id();
e2075f79 714 int i, base;
1da177e4
LT
715
716 atomic_inc(&init_mm.mm_count);
717 current->active_mm = &init_mm;
718
719 smp_store_cpu_info(cpu);
5ad57078 720 set_dec(tb_ticks_per_jiffy);
e4d76e1c 721 preempt_disable();
1da177e4
LT
722 cpu_callin_map[cpu] = 1;
723
757cbd46
KG
724 if (smp_ops->setup_cpu)
725 smp_ops->setup_cpu(cpu);
1da177e4
LT
726 if (smp_ops->take_timebase)
727 smp_ops->take_timebase();
728
d831d0b8
TB
729 secondary_cpu_time_init();
730
aeeafbfa
BH
731#ifdef CONFIG_PPC64
732 if (system_state == SYSTEM_RUNNING)
733 vdso_data->processorCount++;
18ad51dd
AB
734
735 vdso_getcpu_init();
aeeafbfa 736#endif
e2075f79 737 /* Update sibling maps */
99d86705 738 base = cpu_first_thread_sibling(cpu);
e2075f79 739 for (i = 0; i < threads_per_core; i++) {
cce606fe 740 if (cpu_is_offline(base + i) && (cpu != base + i))
e2075f79 741 continue;
cc1ba8ea
AB
742 cpumask_set_cpu(cpu, cpu_sibling_mask(base + i));
743 cpumask_set_cpu(base + i, cpu_sibling_mask(cpu));
440a0857
NL
744
745 /* cpu_core_map should be a superset of
746 * cpu_sibling_map even if we don't have cache
747 * information, so update the former here, too.
748 */
cc1ba8ea
AB
749 cpumask_set_cpu(cpu, cpu_core_mask(base + i));
750 cpumask_set_cpu(base + i, cpu_core_mask(cpu));
e2075f79 751 }
a8a5356c 752 traverse_core_siblings(cpu, true);
1da177e4 753
8c272261
NA
754 /*
755 * numa_node_id() works after this.
756 */
757 set_numa_node(numa_cpu_lookup_table[cpu]);
758
cce606fe
LZ
759 smp_wmb();
760 notify_cpu_starting(cpu);
761 set_cpu_online(cpu, true);
762
1da177e4
LT
763 local_irq_enable();
764
799fef06 765 cpu_startup_entry(CPUHP_ONLINE);
fa3f82c8
BH
766
767 BUG();
1da177e4
LT
768}
769
770int setup_profiling_timer(unsigned int multiplier)
771{
772 return 0;
773}
774
775void __init smp_cpus_done(unsigned int max_cpus)
776{
bfb9126d 777 cpumask_var_t old_mask;
1da177e4
LT
778
779 /* We want the setup_cpu() here to be called from CPU 0, but our
780 * init thread may have been "borrowed" by another CPU in the meantime
781 * se we pin us down to CPU 0 for a short while
782 */
bfb9126d 783 alloc_cpumask_var(&old_mask, GFP_NOWAIT);
104699c0 784 cpumask_copy(old_mask, tsk_cpus_allowed(current));
21dbeb91 785 set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid));
1da177e4 786
757cbd46 787 if (smp_ops && smp_ops->setup_cpu)
8cffc6ac 788 smp_ops->setup_cpu(boot_cpuid);
1da177e4 789
bfb9126d
AB
790 set_cpus_allowed_ptr(current, old_mask);
791
792 free_cpumask_var(old_mask);
4b703a23 793
d7294445
BH
794 if (smp_ops && smp_ops->bringup_done)
795 smp_ops->bringup_done();
796
4b703a23 797 dump_numa_cpu_topology();
d7294445 798
1da177e4
LT
799}
800
e1f0ece1
MN
801int arch_sd_sibling_asym_packing(void)
802{
803 if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
804 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
805 return SD_ASYM_PACKING;
806 }
807 return 0;
808}
809
1da177e4
LT
810#ifdef CONFIG_HOTPLUG_CPU
811int __cpu_disable(void)
812{
e2075f79
NL
813 int cpu = smp_processor_id();
814 int base, i;
815 int err;
1da177e4 816
e2075f79
NL
817 if (!smp_ops->cpu_disable)
818 return -ENOSYS;
819
820 err = smp_ops->cpu_disable();
821 if (err)
822 return err;
823
824 /* Update sibling maps */
99d86705 825 base = cpu_first_thread_sibling(cpu);
e2075f79 826 for (i = 0; i < threads_per_core; i++) {
cc1ba8ea
AB
827 cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i));
828 cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu));
829 cpumask_clear_cpu(cpu, cpu_core_mask(base + i));
830 cpumask_clear_cpu(base + i, cpu_core_mask(cpu));
440a0857 831 }
a8a5356c 832 traverse_core_siblings(cpu, false);
e2075f79
NL
833
834 return 0;
1da177e4
LT
835}
836
837void __cpu_die(unsigned int cpu)
838{
839 if (smp_ops->cpu_die)
840 smp_ops->cpu_die(cpu);
841}
d0174c72 842
abb17f9c
MM
843void cpu_die(void)
844{
845 if (ppc_md.cpu_die)
846 ppc_md.cpu_die();
fa3f82c8
BH
847
848 /* If we return, we re-enter start_secondary */
849 start_secondary_resume();
abb17f9c 850}
fa3f82c8 851
1da177e4 852#endif
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