Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SMP support for ppc. | |
3 | * | |
4 | * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great | |
5 | * deal of code from the sparc and intel versions. | |
6 | * | |
7 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
8 | * | |
9 | * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and | |
10 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #undef DEBUG | |
19 | ||
1da177e4 | 20 | #include <linux/kernel.h> |
4b16f8e2 | 21 | #include <linux/export.h> |
1da177e4 LT |
22 | #include <linux/sched.h> |
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/cache.h> | |
29 | #include <linux/err.h> | |
8a25a2fd | 30 | #include <linux/device.h> |
1da177e4 LT |
31 | #include <linux/cpu.h> |
32 | #include <linux/notifier.h> | |
4b703a23 | 33 | #include <linux/topology.h> |
1da177e4 LT |
34 | |
35 | #include <asm/ptrace.h> | |
60063497 | 36 | #include <linux/atomic.h> |
1da177e4 LT |
37 | #include <asm/irq.h> |
38 | #include <asm/page.h> | |
39 | #include <asm/pgtable.h> | |
40 | #include <asm/prom.h> | |
41 | #include <asm/smp.h> | |
1da177e4 LT |
42 | #include <asm/time.h> |
43 | #include <asm/machdep.h> | |
e2075f79 | 44 | #include <asm/cputhreads.h> |
1da177e4 | 45 | #include <asm/cputable.h> |
bbeb3f4c | 46 | #include <asm/mpic.h> |
a7f290da | 47 | #include <asm/vdso_datapage.h> |
5ad57078 PM |
48 | #ifdef CONFIG_PPC64 |
49 | #include <asm/paca.h> | |
50 | #endif | |
18ad51dd | 51 | #include <asm/vdso.h> |
ae3a197e | 52 | #include <asm/debug.h> |
5ad57078 | 53 | |
1da177e4 | 54 | #ifdef DEBUG |
f9e4ec57 | 55 | #include <asm/udbg.h> |
1da177e4 LT |
56 | #define DBG(fmt...) udbg_printf(fmt) |
57 | #else | |
58 | #define DBG(fmt...) | |
59 | #endif | |
60 | ||
c56e5853 | 61 | #ifdef CONFIG_HOTPLUG_CPU |
fb82b839 BH |
62 | /* State of each CPU during hotplug phases */ |
63 | static DEFINE_PER_CPU(int, cpu_state) = { 0 }; | |
c56e5853 BH |
64 | #endif |
65 | ||
f9e4ec57 ME |
66 | struct thread_info *secondary_ti; |
67 | ||
cc1ba8ea AB |
68 | DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
69 | DEFINE_PER_CPU(cpumask_var_t, cpu_core_map); | |
1da177e4 | 70 | |
d5a7430d | 71 | EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
440a0857 | 72 | EXPORT_PER_CPU_SYMBOL(cpu_core_map); |
1da177e4 | 73 | |
5ad57078 | 74 | /* SMP operations for this machine */ |
1da177e4 LT |
75 | struct smp_ops_t *smp_ops; |
76 | ||
7ccbe504 BH |
77 | /* Can't be static due to PowerMac hackery */ |
78 | volatile unsigned int cpu_callin_map[NR_CPUS]; | |
1da177e4 | 79 | |
1da177e4 LT |
80 | int smt_enabled_at_boot = 1; |
81 | ||
cc532915 ME |
82 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
83 | ||
3cd85250 AF |
84 | /* |
85 | * Returns 1 if the specified cpu should be brought up during boot. | |
86 | * Used to inhibit booting threads if they've been disabled or | |
87 | * limited on the command line | |
88 | */ | |
89 | int smp_generic_cpu_bootable(unsigned int nr) | |
90 | { | |
91 | /* Special case - we inhibit secondary thread startup | |
92 | * during boot if the user requests it. | |
93 | */ | |
94 | if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) { | |
95 | if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) | |
96 | return 0; | |
97 | if (smt_enabled_at_boot | |
98 | && cpu_thread_in_core(nr) >= smt_enabled_at_boot) | |
99 | return 0; | |
100 | } | |
101 | ||
102 | return 1; | |
103 | } | |
104 | ||
105 | ||
5ad57078 | 106 | #ifdef CONFIG_PPC64 |
cad5cef6 | 107 | int smp_generic_kick_cpu(int nr) |
1da177e4 LT |
108 | { |
109 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
110 | ||
111 | /* | |
112 | * The processor is currently spinning, waiting for the | |
113 | * cpu_start field to become non-zero After we set cpu_start, | |
114 | * the processor will continue on to secondary_start | |
115 | */ | |
fb82b839 BH |
116 | if (!paca[nr].cpu_start) { |
117 | paca[nr].cpu_start = 1; | |
118 | smp_mb(); | |
119 | return 0; | |
120 | } | |
121 | ||
122 | #ifdef CONFIG_HOTPLUG_CPU | |
123 | /* | |
124 | * Ok it's not there, so it might be soft-unplugged, let's | |
125 | * try to bring it back | |
126 | */ | |
ae5cab47 | 127 | generic_set_cpu_up(nr); |
fb82b839 BH |
128 | smp_wmb(); |
129 | smp_send_reschedule(nr); | |
130 | #endif /* CONFIG_HOTPLUG_CPU */ | |
de300974 ME |
131 | |
132 | return 0; | |
1da177e4 | 133 | } |
fb82b839 | 134 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 135 | |
25ddd738 MM |
136 | static irqreturn_t call_function_action(int irq, void *data) |
137 | { | |
138 | generic_smp_call_function_interrupt(); | |
139 | return IRQ_HANDLED; | |
140 | } | |
141 | ||
142 | static irqreturn_t reschedule_action(int irq, void *data) | |
143 | { | |
184748cc | 144 | scheduler_ipi(); |
25ddd738 MM |
145 | return IRQ_HANDLED; |
146 | } | |
147 | ||
148 | static irqreturn_t call_function_single_action(int irq, void *data) | |
149 | { | |
150 | generic_smp_call_function_single_interrupt(); | |
151 | return IRQ_HANDLED; | |
152 | } | |
153 | ||
7ef71d75 | 154 | static irqreturn_t debug_ipi_action(int irq, void *data) |
25ddd738 | 155 | { |
23d72bfd MM |
156 | if (crash_ipi_function_ptr) { |
157 | crash_ipi_function_ptr(get_irq_regs()); | |
158 | return IRQ_HANDLED; | |
159 | } | |
160 | ||
161 | #ifdef CONFIG_DEBUGGER | |
162 | debugger_ipi(get_irq_regs()); | |
163 | #endif /* CONFIG_DEBUGGER */ | |
164 | ||
25ddd738 MM |
165 | return IRQ_HANDLED; |
166 | } | |
167 | ||
168 | static irq_handler_t smp_ipi_action[] = { | |
169 | [PPC_MSG_CALL_FUNCTION] = call_function_action, | |
170 | [PPC_MSG_RESCHEDULE] = reschedule_action, | |
171 | [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action, | |
172 | [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action, | |
173 | }; | |
174 | ||
175 | const char *smp_ipi_name[] = { | |
176 | [PPC_MSG_CALL_FUNCTION] = "ipi call function", | |
177 | [PPC_MSG_RESCHEDULE] = "ipi reschedule", | |
178 | [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single", | |
179 | [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger", | |
180 | }; | |
181 | ||
182 | /* optional function to request ipi, for controllers with >= 4 ipis */ | |
183 | int smp_request_message_ipi(int virq, int msg) | |
184 | { | |
185 | int err; | |
186 | ||
187 | if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) { | |
188 | return -EINVAL; | |
189 | } | |
190 | #if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC) | |
191 | if (msg == PPC_MSG_DEBUGGER_BREAK) { | |
192 | return 1; | |
193 | } | |
194 | #endif | |
3b5e16d7 | 195 | err = request_irq(virq, smp_ipi_action[msg], |
e6651de9 | 196 | IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND, |
b0d436c7 | 197 | smp_ipi_name[msg], NULL); |
25ddd738 MM |
198 | WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", |
199 | virq, smp_ipi_name[msg], err); | |
200 | ||
201 | return err; | |
202 | } | |
203 | ||
1ece355b | 204 | #ifdef CONFIG_PPC_SMP_MUXED_IPI |
23d72bfd | 205 | struct cpu_messages { |
71454272 | 206 | int messages; /* current messages */ |
23d72bfd MM |
207 | unsigned long data; /* data for cause ipi */ |
208 | }; | |
209 | static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message); | |
210 | ||
211 | void smp_muxed_ipi_set_data(int cpu, unsigned long data) | |
212 | { | |
213 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
214 | ||
215 | info->data = data; | |
216 | } | |
217 | ||
218 | void smp_muxed_ipi_message_pass(int cpu, int msg) | |
219 | { | |
220 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
71454272 | 221 | char *message = (char *)&info->messages; |
23d72bfd | 222 | |
9fb1b36c PM |
223 | /* |
224 | * Order previous accesses before accesses in the IPI handler. | |
225 | */ | |
226 | smp_mb(); | |
71454272 | 227 | message[msg] = 1; |
9fb1b36c PM |
228 | /* |
229 | * cause_ipi functions are required to include a full barrier | |
230 | * before doing whatever causes the IPI. | |
231 | */ | |
23d72bfd MM |
232 | smp_ops->cause_ipi(cpu, info->data); |
233 | } | |
234 | ||
23d72bfd MM |
235 | irqreturn_t smp_ipi_demux(void) |
236 | { | |
237 | struct cpu_messages *info = &__get_cpu_var(ipi_message); | |
71454272 | 238 | unsigned int all; |
23d72bfd MM |
239 | |
240 | mb(); /* order any irq clear */ | |
71454272 MM |
241 | |
242 | do { | |
9fb1b36c | 243 | all = xchg(&info->messages, 0); |
71454272 MM |
244 | |
245 | #ifdef __BIG_ENDIAN | |
246 | if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION))) | |
23d72bfd | 247 | generic_smp_call_function_interrupt(); |
71454272 | 248 | if (all & (1 << (24 - 8 * PPC_MSG_RESCHEDULE))) |
880102e7 | 249 | scheduler_ipi(); |
71454272 | 250 | if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNC_SINGLE))) |
23d72bfd | 251 | generic_smp_call_function_single_interrupt(); |
71454272 | 252 | if (all & (1 << (24 - 8 * PPC_MSG_DEBUGGER_BREAK))) |
23d72bfd | 253 | debug_ipi_action(0, NULL); |
71454272 MM |
254 | #else |
255 | #error Unsupported ENDIAN | |
23d72bfd | 256 | #endif |
71454272 MM |
257 | } while (info->messages); |
258 | ||
23d72bfd MM |
259 | return IRQ_HANDLED; |
260 | } | |
1ece355b | 261 | #endif /* CONFIG_PPC_SMP_MUXED_IPI */ |
23d72bfd | 262 | |
9ca980dc PM |
263 | static inline void do_message_pass(int cpu, int msg) |
264 | { | |
265 | if (smp_ops->message_pass) | |
266 | smp_ops->message_pass(cpu, msg); | |
267 | #ifdef CONFIG_PPC_SMP_MUXED_IPI | |
268 | else | |
269 | smp_muxed_ipi_message_pass(cpu, msg); | |
270 | #endif | |
271 | } | |
272 | ||
1da177e4 LT |
273 | void smp_send_reschedule(int cpu) |
274 | { | |
8cffc6ac | 275 | if (likely(smp_ops)) |
9ca980dc | 276 | do_message_pass(cpu, PPC_MSG_RESCHEDULE); |
1da177e4 | 277 | } |
de56a948 | 278 | EXPORT_SYMBOL_GPL(smp_send_reschedule); |
1da177e4 | 279 | |
b7d7a240 JA |
280 | void arch_send_call_function_single_ipi(int cpu) |
281 | { | |
9ca980dc | 282 | do_message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); |
b7d7a240 JA |
283 | } |
284 | ||
f063ea02 | 285 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
b7d7a240 JA |
286 | { |
287 | unsigned int cpu; | |
288 | ||
f063ea02 | 289 | for_each_cpu(cpu, mask) |
9ca980dc | 290 | do_message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
b7d7a240 JA |
291 | } |
292 | ||
e0476371 MM |
293 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
294 | void smp_send_debugger_break(void) | |
1da177e4 | 295 | { |
e0476371 MM |
296 | int cpu; |
297 | int me = raw_smp_processor_id(); | |
298 | ||
299 | if (unlikely(!smp_ops)) | |
300 | return; | |
301 | ||
302 | for_each_online_cpu(cpu) | |
303 | if (cpu != me) | |
9ca980dc | 304 | do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); |
1da177e4 LT |
305 | } |
306 | #endif | |
307 | ||
cc532915 ME |
308 | #ifdef CONFIG_KEXEC |
309 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | |
310 | { | |
311 | crash_ipi_function_ptr = crash_ipi_callback; | |
e0476371 | 312 | if (crash_ipi_callback) { |
cc532915 | 313 | mb(); |
e0476371 | 314 | smp_send_debugger_break(); |
cc532915 ME |
315 | } |
316 | } | |
317 | #endif | |
318 | ||
1da177e4 LT |
319 | static void stop_this_cpu(void *dummy) |
320 | { | |
8389b37d VB |
321 | /* Remove this CPU */ |
322 | set_cpu_online(smp_processor_id(), false); | |
323 | ||
1da177e4 LT |
324 | local_irq_disable(); |
325 | while (1) | |
326 | ; | |
327 | } | |
328 | ||
8fd7675c SS |
329 | void smp_send_stop(void) |
330 | { | |
8691e5a8 | 331 | smp_call_function(stop_this_cpu, NULL, 0); |
1da177e4 LT |
332 | } |
333 | ||
1da177e4 LT |
334 | struct thread_info *current_set[NR_CPUS]; |
335 | ||
cad5cef6 | 336 | static void smp_store_cpu_info(int id) |
1da177e4 | 337 | { |
6b7487fc | 338 | per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); |
3160b097 BB |
339 | #ifdef CONFIG_PPC_FSL_BOOK3E |
340 | per_cpu(next_tlbcam_idx, id) | |
341 | = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1; | |
342 | #endif | |
1da177e4 LT |
343 | } |
344 | ||
1da177e4 LT |
345 | void __init smp_prepare_cpus(unsigned int max_cpus) |
346 | { | |
347 | unsigned int cpu; | |
348 | ||
349 | DBG("smp_prepare_cpus\n"); | |
350 | ||
351 | /* | |
352 | * setup_cpu may need to be called on the boot cpu. We havent | |
353 | * spun any cpus up but lets be paranoid. | |
354 | */ | |
355 | BUG_ON(boot_cpuid != smp_processor_id()); | |
356 | ||
357 | /* Fixup boot cpu */ | |
358 | smp_store_cpu_info(boot_cpuid); | |
359 | cpu_callin_map[boot_cpuid] = 1; | |
360 | ||
cc1ba8ea AB |
361 | for_each_possible_cpu(cpu) { |
362 | zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu), | |
363 | GFP_KERNEL, cpu_to_node(cpu)); | |
364 | zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu), | |
365 | GFP_KERNEL, cpu_to_node(cpu)); | |
366 | } | |
367 | ||
368 | cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); | |
369 | cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); | |
370 | ||
8cffc6ac | 371 | if (smp_ops) |
757cbd46 KG |
372 | if (smp_ops->probe) |
373 | max_cpus = smp_ops->probe(); | |
374 | else | |
375 | max_cpus = NR_CPUS; | |
8cffc6ac BH |
376 | else |
377 | max_cpus = 1; | |
1da177e4 LT |
378 | } |
379 | ||
cad5cef6 | 380 | void smp_prepare_boot_cpu(void) |
1da177e4 LT |
381 | { |
382 | BUG_ON(smp_processor_id() != boot_cpuid); | |
5ad57078 | 383 | #ifdef CONFIG_PPC64 |
1da177e4 | 384 | paca[boot_cpuid].__current = current; |
5ad57078 | 385 | #endif |
b5e2fc1c | 386 | current_set[boot_cpuid] = task_thread_info(current); |
1da177e4 LT |
387 | } |
388 | ||
389 | #ifdef CONFIG_HOTPLUG_CPU | |
1da177e4 LT |
390 | |
391 | int generic_cpu_disable(void) | |
392 | { | |
393 | unsigned int cpu = smp_processor_id(); | |
394 | ||
395 | if (cpu == boot_cpuid) | |
396 | return -EBUSY; | |
397 | ||
ea0f1cab | 398 | set_cpu_online(cpu, false); |
799d6046 | 399 | #ifdef CONFIG_PPC64 |
a7f290da | 400 | vdso_data->processorCount--; |
094fe2e7 | 401 | #endif |
1c91cc57 | 402 | migrate_irqs(); |
1da177e4 LT |
403 | return 0; |
404 | } | |
405 | ||
1da177e4 LT |
406 | void generic_cpu_die(unsigned int cpu) |
407 | { | |
408 | int i; | |
409 | ||
410 | for (i = 0; i < 100; i++) { | |
0d8d4d42 | 411 | smp_rmb(); |
1da177e4 LT |
412 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
413 | return; | |
414 | msleep(100); | |
415 | } | |
416 | printk(KERN_ERR "CPU%d didn't die...\n", cpu); | |
417 | } | |
418 | ||
419 | void generic_mach_cpu_die(void) | |
420 | { | |
421 | unsigned int cpu; | |
422 | ||
423 | local_irq_disable(); | |
4fcb8833 | 424 | idle_task_exit(); |
1da177e4 LT |
425 | cpu = smp_processor_id(); |
426 | printk(KERN_DEBUG "CPU%d offline\n", cpu); | |
427 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
0d8d4d42 | 428 | smp_wmb(); |
1da177e4 LT |
429 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) |
430 | cpu_relax(); | |
1da177e4 | 431 | } |
105765f4 BH |
432 | |
433 | void generic_set_cpu_dead(unsigned int cpu) | |
434 | { | |
435 | per_cpu(cpu_state, cpu) = CPU_DEAD; | |
436 | } | |
fb82b839 | 437 | |
ae5cab47 ZC |
438 | /* |
439 | * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise | |
440 | * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(), | |
441 | * which makes the delay in generic_cpu_die() not happen. | |
442 | */ | |
443 | void generic_set_cpu_up(unsigned int cpu) | |
444 | { | |
445 | per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; | |
446 | } | |
447 | ||
fb82b839 BH |
448 | int generic_check_cpu_restart(unsigned int cpu) |
449 | { | |
450 | return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE; | |
451 | } | |
512691d4 PM |
452 | |
453 | static atomic_t secondary_inhibit_count; | |
454 | ||
455 | /* | |
456 | * Don't allow secondary CPU threads to come online | |
457 | */ | |
458 | void inhibit_secondary_onlining(void) | |
459 | { | |
460 | /* | |
461 | * This makes secondary_inhibit_count stable during cpu | |
462 | * online/offline operations. | |
463 | */ | |
464 | get_online_cpus(); | |
465 | ||
466 | atomic_inc(&secondary_inhibit_count); | |
467 | put_online_cpus(); | |
468 | } | |
469 | EXPORT_SYMBOL_GPL(inhibit_secondary_onlining); | |
470 | ||
471 | /* | |
472 | * Allow secondary CPU threads to come online again | |
473 | */ | |
474 | void uninhibit_secondary_onlining(void) | |
475 | { | |
476 | get_online_cpus(); | |
477 | atomic_dec(&secondary_inhibit_count); | |
478 | put_online_cpus(); | |
479 | } | |
480 | EXPORT_SYMBOL_GPL(uninhibit_secondary_onlining); | |
481 | ||
482 | static int secondaries_inhibited(void) | |
483 | { | |
484 | return atomic_read(&secondary_inhibit_count); | |
485 | } | |
486 | ||
487 | #else /* HOTPLUG_CPU */ | |
488 | ||
489 | #define secondaries_inhibited() 0 | |
490 | ||
1da177e4 LT |
491 | #endif |
492 | ||
17e32eac | 493 | static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle) |
c56e5853 | 494 | { |
17e32eac | 495 | struct thread_info *ti = task_thread_info(idle); |
c56e5853 BH |
496 | |
497 | #ifdef CONFIG_PPC64 | |
17e32eac | 498 | paca[cpu].__current = idle; |
c56e5853 BH |
499 | paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD; |
500 | #endif | |
501 | ti->cpu = cpu; | |
17e32eac | 502 | secondary_ti = current_set[cpu] = ti; |
c56e5853 BH |
503 | } |
504 | ||
061d19f2 | 505 | int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 506 | { |
c56e5853 | 507 | int rc, c; |
1da177e4 | 508 | |
512691d4 PM |
509 | /* |
510 | * Don't allow secondary threads to come online if inhibited | |
511 | */ | |
512 | if (threads_per_core > 1 && secondaries_inhibited() && | |
513 | cpu % threads_per_core != 0) | |
514 | return -EBUSY; | |
515 | ||
8cffc6ac BH |
516 | if (smp_ops == NULL || |
517 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | |
1da177e4 LT |
518 | return -EINVAL; |
519 | ||
17e32eac | 520 | cpu_idle_thread_init(cpu, tidle); |
c560bbce | 521 | |
1da177e4 LT |
522 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
523 | * hotplug | |
524 | */ | |
525 | cpu_callin_map[cpu] = 0; | |
526 | ||
527 | /* The information for processor bringup must | |
528 | * be written out to main store before we release | |
529 | * the processor. | |
530 | */ | |
0d8d4d42 | 531 | smp_mb(); |
1da177e4 LT |
532 | |
533 | /* wake up cpus */ | |
534 | DBG("smp: kicking cpu %d\n", cpu); | |
de300974 ME |
535 | rc = smp_ops->kick_cpu(cpu); |
536 | if (rc) { | |
537 | pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc); | |
538 | return rc; | |
539 | } | |
1da177e4 LT |
540 | |
541 | /* | |
542 | * wait to see if the cpu made a callin (is actually up). | |
543 | * use this value that I found through experimentation. | |
544 | * -- Cort | |
545 | */ | |
546 | if (system_state < SYSTEM_RUNNING) | |
ee0339f2 | 547 | for (c = 50000; c && !cpu_callin_map[cpu]; c--) |
1da177e4 LT |
548 | udelay(100); |
549 | #ifdef CONFIG_HOTPLUG_CPU | |
550 | else | |
551 | /* | |
552 | * CPUs can take much longer to come up in the | |
553 | * hotplug case. Wait five seconds. | |
554 | */ | |
67764263 GS |
555 | for (c = 5000; c && !cpu_callin_map[cpu]; c--) |
556 | msleep(1); | |
1da177e4 LT |
557 | #endif |
558 | ||
559 | if (!cpu_callin_map[cpu]) { | |
6685a477 | 560 | printk(KERN_ERR "Processor %u is stuck.\n", cpu); |
1da177e4 LT |
561 | return -ENOENT; |
562 | } | |
563 | ||
6685a477 | 564 | DBG("Processor %u found.\n", cpu); |
1da177e4 LT |
565 | |
566 | if (smp_ops->give_timebase) | |
567 | smp_ops->give_timebase(); | |
568 | ||
569 | /* Wait until cpu puts itself in the online map */ | |
570 | while (!cpu_online(cpu)) | |
571 | cpu_relax(); | |
572 | ||
573 | return 0; | |
574 | } | |
575 | ||
e9efed3b NL |
576 | /* Return the value of the reg property corresponding to the given |
577 | * logical cpu. | |
578 | */ | |
579 | int cpu_to_core_id(int cpu) | |
580 | { | |
581 | struct device_node *np; | |
582 | const int *reg; | |
583 | int id = -1; | |
584 | ||
585 | np = of_get_cpu_node(cpu, NULL); | |
586 | if (!np) | |
587 | goto out; | |
588 | ||
589 | reg = of_get_property(np, "reg", NULL); | |
590 | if (!reg) | |
591 | goto out; | |
592 | ||
593 | id = *reg; | |
594 | out: | |
595 | of_node_put(np); | |
596 | return id; | |
597 | } | |
598 | ||
99d86705 VS |
599 | /* Helper routines for cpu to core mapping */ |
600 | int cpu_core_index_of_thread(int cpu) | |
601 | { | |
602 | return cpu >> threads_shift; | |
603 | } | |
604 | EXPORT_SYMBOL_GPL(cpu_core_index_of_thread); | |
605 | ||
606 | int cpu_first_thread_of_core(int core) | |
607 | { | |
608 | return core << threads_shift; | |
609 | } | |
610 | EXPORT_SYMBOL_GPL(cpu_first_thread_of_core); | |
611 | ||
104699c0 | 612 | /* Must be called when no change can occur to cpu_present_mask, |
440a0857 NL |
613 | * i.e. during cpu online or offline. |
614 | */ | |
615 | static struct device_node *cpu_to_l2cache(int cpu) | |
616 | { | |
617 | struct device_node *np; | |
b2ea25b9 | 618 | struct device_node *cache; |
440a0857 NL |
619 | |
620 | if (!cpu_present(cpu)) | |
621 | return NULL; | |
622 | ||
623 | np = of_get_cpu_node(cpu, NULL); | |
624 | if (np == NULL) | |
625 | return NULL; | |
626 | ||
b2ea25b9 NL |
627 | cache = of_find_next_cache_node(np); |
628 | ||
440a0857 NL |
629 | of_node_put(np); |
630 | ||
b2ea25b9 | 631 | return cache; |
440a0857 | 632 | } |
1da177e4 | 633 | |
a8a5356c PM |
634 | static void traverse_core_siblings(int cpu, bool add) |
635 | { | |
636 | struct device_node *l2_cache; | |
637 | const struct cpumask *mask; | |
638 | int i; | |
639 | ||
640 | l2_cache = cpu_to_l2cache(cpu); | |
641 | mask = add ? cpu_online_mask : cpu_present_mask; | |
642 | for_each_cpu(i, mask) { | |
643 | struct device_node *np = cpu_to_l2cache(i); | |
644 | if (!np) | |
645 | continue; | |
646 | if (np == l2_cache) { | |
647 | if (add) { | |
648 | cpumask_set_cpu(cpu, cpu_core_mask(i)); | |
649 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
650 | } else { | |
651 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); | |
652 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
653 | } | |
654 | } | |
655 | of_node_put(np); | |
656 | } | |
657 | of_node_put(l2_cache); | |
658 | } | |
659 | ||
1da177e4 | 660 | /* Activate a secondary processor. */ |
061d19f2 | 661 | void start_secondary(void *unused) |
1da177e4 LT |
662 | { |
663 | unsigned int cpu = smp_processor_id(); | |
e2075f79 | 664 | int i, base; |
1da177e4 LT |
665 | |
666 | atomic_inc(&init_mm.mm_count); | |
667 | current->active_mm = &init_mm; | |
668 | ||
669 | smp_store_cpu_info(cpu); | |
5ad57078 | 670 | set_dec(tb_ticks_per_jiffy); |
e4d76e1c | 671 | preempt_disable(); |
1da177e4 LT |
672 | cpu_callin_map[cpu] = 1; |
673 | ||
757cbd46 KG |
674 | if (smp_ops->setup_cpu) |
675 | smp_ops->setup_cpu(cpu); | |
1da177e4 LT |
676 | if (smp_ops->take_timebase) |
677 | smp_ops->take_timebase(); | |
678 | ||
d831d0b8 TB |
679 | secondary_cpu_time_init(); |
680 | ||
aeeafbfa BH |
681 | #ifdef CONFIG_PPC64 |
682 | if (system_state == SYSTEM_RUNNING) | |
683 | vdso_data->processorCount++; | |
18ad51dd AB |
684 | |
685 | vdso_getcpu_init(); | |
aeeafbfa | 686 | #endif |
e2075f79 | 687 | /* Update sibling maps */ |
99d86705 | 688 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 689 | for (i = 0; i < threads_per_core; i++) { |
cce606fe | 690 | if (cpu_is_offline(base + i) && (cpu != base + i)) |
e2075f79 | 691 | continue; |
cc1ba8ea AB |
692 | cpumask_set_cpu(cpu, cpu_sibling_mask(base + i)); |
693 | cpumask_set_cpu(base + i, cpu_sibling_mask(cpu)); | |
440a0857 NL |
694 | |
695 | /* cpu_core_map should be a superset of | |
696 | * cpu_sibling_map even if we don't have cache | |
697 | * information, so update the former here, too. | |
698 | */ | |
cc1ba8ea AB |
699 | cpumask_set_cpu(cpu, cpu_core_mask(base + i)); |
700 | cpumask_set_cpu(base + i, cpu_core_mask(cpu)); | |
e2075f79 | 701 | } |
a8a5356c | 702 | traverse_core_siblings(cpu, true); |
1da177e4 | 703 | |
cce606fe LZ |
704 | smp_wmb(); |
705 | notify_cpu_starting(cpu); | |
706 | set_cpu_online(cpu, true); | |
707 | ||
1da177e4 LT |
708 | local_irq_enable(); |
709 | ||
799fef06 | 710 | cpu_startup_entry(CPUHP_ONLINE); |
fa3f82c8 BH |
711 | |
712 | BUG(); | |
1da177e4 LT |
713 | } |
714 | ||
715 | int setup_profiling_timer(unsigned int multiplier) | |
716 | { | |
717 | return 0; | |
718 | } | |
719 | ||
720 | void __init smp_cpus_done(unsigned int max_cpus) | |
721 | { | |
bfb9126d | 722 | cpumask_var_t old_mask; |
1da177e4 LT |
723 | |
724 | /* We want the setup_cpu() here to be called from CPU 0, but our | |
725 | * init thread may have been "borrowed" by another CPU in the meantime | |
726 | * se we pin us down to CPU 0 for a short while | |
727 | */ | |
bfb9126d | 728 | alloc_cpumask_var(&old_mask, GFP_NOWAIT); |
104699c0 | 729 | cpumask_copy(old_mask, tsk_cpus_allowed(current)); |
21dbeb91 | 730 | set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid)); |
1da177e4 | 731 | |
757cbd46 | 732 | if (smp_ops && smp_ops->setup_cpu) |
8cffc6ac | 733 | smp_ops->setup_cpu(boot_cpuid); |
1da177e4 | 734 | |
bfb9126d AB |
735 | set_cpus_allowed_ptr(current, old_mask); |
736 | ||
737 | free_cpumask_var(old_mask); | |
4b703a23 | 738 | |
d7294445 BH |
739 | if (smp_ops && smp_ops->bringup_done) |
740 | smp_ops->bringup_done(); | |
741 | ||
4b703a23 | 742 | dump_numa_cpu_topology(); |
d7294445 | 743 | |
1da177e4 LT |
744 | } |
745 | ||
e1f0ece1 MN |
746 | int arch_sd_sibling_asym_packing(void) |
747 | { | |
748 | if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { | |
749 | printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); | |
750 | return SD_ASYM_PACKING; | |
751 | } | |
752 | return 0; | |
753 | } | |
754 | ||
1da177e4 LT |
755 | #ifdef CONFIG_HOTPLUG_CPU |
756 | int __cpu_disable(void) | |
757 | { | |
e2075f79 NL |
758 | int cpu = smp_processor_id(); |
759 | int base, i; | |
760 | int err; | |
1da177e4 | 761 | |
e2075f79 NL |
762 | if (!smp_ops->cpu_disable) |
763 | return -ENOSYS; | |
764 | ||
765 | err = smp_ops->cpu_disable(); | |
766 | if (err) | |
767 | return err; | |
768 | ||
769 | /* Update sibling maps */ | |
99d86705 | 770 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 771 | for (i = 0; i < threads_per_core; i++) { |
cc1ba8ea AB |
772 | cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i)); |
773 | cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu)); | |
774 | cpumask_clear_cpu(cpu, cpu_core_mask(base + i)); | |
775 | cpumask_clear_cpu(base + i, cpu_core_mask(cpu)); | |
440a0857 | 776 | } |
a8a5356c | 777 | traverse_core_siblings(cpu, false); |
e2075f79 NL |
778 | |
779 | return 0; | |
1da177e4 LT |
780 | } |
781 | ||
782 | void __cpu_die(unsigned int cpu) | |
783 | { | |
784 | if (smp_ops->cpu_die) | |
785 | smp_ops->cpu_die(cpu); | |
786 | } | |
d0174c72 NF |
787 | |
788 | static DEFINE_MUTEX(powerpc_cpu_hotplug_driver_mutex); | |
789 | ||
790 | void cpu_hotplug_driver_lock() | |
791 | { | |
792 | mutex_lock(&powerpc_cpu_hotplug_driver_mutex); | |
793 | } | |
794 | ||
795 | void cpu_hotplug_driver_unlock() | |
796 | { | |
797 | mutex_unlock(&powerpc_cpu_hotplug_driver_mutex); | |
798 | } | |
abb17f9c MM |
799 | |
800 | void cpu_die(void) | |
801 | { | |
802 | if (ppc_md.cpu_die) | |
803 | ppc_md.cpu_die(); | |
fa3f82c8 BH |
804 | |
805 | /* If we return, we re-enter start_secondary */ | |
806 | start_secondary_resume(); | |
abb17f9c | 807 | } |
fa3f82c8 | 808 | |
1da177e4 | 809 | #endif |