tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable
[deliverable/linux.git] / arch / powerpc / kernel / sysfs.c
CommitLineData
8a25a2fd 1#include <linux/device.h>
1da177e4
LT
2#include <linux/cpu.h>
3#include <linux/smp.h>
4#include <linux/percpu.h>
5#include <linux/init.h>
6#include <linux/sched.h>
4b16f8e2 7#include <linux/export.h>
1da177e4
LT
8#include <linux/nodemask.h>
9#include <linux/cpumask.h>
10#include <linux/notifier.h>
11
12#include <asm/current.h>
13#include <asm/processor.h>
14#include <asm/cputable.h>
1ababe11 15#include <asm/firmware.h>
1da177e4
LT
16#include <asm/hvcall.h>
17#include <asm/prom.h>
1da177e4 18#include <asm/machdep.h>
2249ca9d 19#include <asm/smp.h>
a6dbf93a 20#include <asm/pmc.h>
707827f3 21#include <asm/system.h>
1da177e4 22
93197a36
NL
23#include "cacheinfo.h"
24
b950bdd0
BH
25#ifdef CONFIG_PPC64
26#include <asm/paca.h>
27#include <asm/lppaca.h>
28#endif
29
1da177e4
LT
30static DEFINE_PER_CPU(struct cpu, cpu_devices);
31
b950bdd0
BH
32/*
33 * SMT snooze delay stuff, 64-bit only for now
34 */
35
36#ifdef CONFIG_PPC64
1da177e4 37
0ddd3e7d 38/* Time in microseconds we delay before sleeping in the idle loop */
b878dc00 39DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
1da177e4 40
8a25a2fd
KS
41static ssize_t store_smt_snooze_delay(struct device *dev,
42 struct device_attribute *attr,
4a0b2b4d 43 const char *buf,
1da177e4
LT
44 size_t count)
45{
8a25a2fd 46 struct cpu *cpu = container_of(dev, struct cpu, dev);
1da177e4 47 ssize_t ret;
b878dc00 48 long snooze;
1da177e4 49
b878dc00 50 ret = sscanf(buf, "%ld", &snooze);
1da177e4
LT
51 if (ret != 1)
52 return -EINVAL;
53
8a25a2fd 54 per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
707827f3 55 update_smt_snooze_delay(snooze);
1da177e4
LT
56
57 return count;
58}
59
8a25a2fd
KS
60static ssize_t show_smt_snooze_delay(struct device *dev,
61 struct device_attribute *attr,
4a0b2b4d 62 char *buf)
1da177e4 63{
8a25a2fd 64 struct cpu *cpu = container_of(dev, struct cpu, dev);
1da177e4 65
8a25a2fd 66 return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
1da177e4
LT
67}
68
8a25a2fd 69static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
1da177e4
LT
70 store_smt_snooze_delay);
71
1da177e4
LT
72static int __init setup_smt_snooze_delay(char *str)
73{
74 unsigned int cpu;
b878dc00 75 long snooze;
1da177e4
LT
76
77 if (!cpu_has_feature(CPU_FTR_SMT))
78 return 1;
79
b878dc00
AB
80 snooze = simple_strtol(str, NULL, 10);
81 for_each_possible_cpu(cpu)
82 per_cpu(smt_snooze_delay, cpu) = snooze;
1da177e4
LT
83
84 return 1;
85}
86__setup("smt-snooze-delay=", setup_smt_snooze_delay);
87
b950bdd0 88#endif /* CONFIG_PPC64 */
180a3362 89
1da177e4
LT
90/*
91 * Enabling PMCs will slow partition context switch times so we only do
92 * it the first time we write to the PMCs.
93 */
94
95static DEFINE_PER_CPU(char, pmcs_enabled);
96
b950bdd0 97void ppc_enable_pmcs(void)
1da177e4 98{
a6dbf93a
PM
99 ppc_set_pmu_inuse(1);
100
1da177e4
LT
101 /* Only need to enable them once */
102 if (__get_cpu_var(pmcs_enabled))
103 return;
104
105 __get_cpu_var(pmcs_enabled) = 1;
106
180a3362
ME
107 if (ppc_md.enable_pmcs)
108 ppc_md.enable_pmcs();
1da177e4 109}
b950bdd0 110EXPORT_SYMBOL(ppc_enable_pmcs);
1da177e4 111
1da177e4 112#define SYSFS_PMCSETUP(NAME, ADDRESS) \
9a371934 113static void read_##NAME(void *val) \
1da177e4 114{ \
ec78c8ac 115 *(unsigned long *)val = mfspr(ADDRESS); \
1da177e4 116} \
ec78c8ac 117static void write_##NAME(void *val) \
1da177e4 118{ \
b950bdd0 119 ppc_enable_pmcs(); \
9a371934 120 mtspr(ADDRESS, *(unsigned long *)val); \
1da177e4 121} \
8a25a2fd
KS
122static ssize_t show_##NAME(struct device *dev, \
123 struct device_attribute *attr, \
4a0b2b4d 124 char *buf) \
1da177e4 125{ \
8a25a2fd 126 struct cpu *cpu = container_of(dev, struct cpu, dev); \
9a371934 127 unsigned long val; \
8a25a2fd 128 smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
1da177e4
LT
129 return sprintf(buf, "%lx\n", val); \
130} \
3ff6eecc 131static ssize_t __used \
8a25a2fd 132 store_##NAME(struct device *dev, struct device_attribute *attr, \
4a0b2b4d 133 const char *buf, size_t count) \
1da177e4 134{ \
8a25a2fd 135 struct cpu *cpu = container_of(dev, struct cpu, dev); \
1da177e4
LT
136 unsigned long val; \
137 int ret = sscanf(buf, "%lx", &val); \
138 if (ret != 1) \
139 return -EINVAL; \
8a25a2fd 140 smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
1da177e4
LT
141 return count; \
142}
143
6529c13d
OJ
144
145/* Let's define all possible registers, we'll only hook up the ones
146 * that are implemented on the current processor
147 */
148
33a7f122 149#if defined(CONFIG_PPC64)
b950bdd0
BH
150#define HAS_PPC_PMC_CLASSIC 1
151#define HAS_PPC_PMC_IBM 1
152#define HAS_PPC_PMC_PA6T 1
33a7f122 153#elif defined(CONFIG_6xx)
b950bdd0
BH
154#define HAS_PPC_PMC_CLASSIC 1
155#define HAS_PPC_PMC_IBM 1
156#define HAS_PPC_PMC_G4 1
157#endif
158
159
160#ifdef HAS_PPC_PMC_CLASSIC
1da177e4
LT
161SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
162SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
1da177e4
LT
163SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
164SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
165SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
166SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
167SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
168SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
b950bdd0
BH
169
170#ifdef HAS_PPC_PMC_G4
171SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
172#endif
173
174#ifdef CONFIG_PPC64
1da177e4
LT
175SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
176SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
b950bdd0
BH
177
178SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
1da177e4 179SYSFS_PMCSETUP(purr, SPRN_PURR);
f050982a 180SYSFS_PMCSETUP(spurr, SPRN_SPURR);
4c198557 181SYSFS_PMCSETUP(dscr, SPRN_DSCR);
595fe914 182SYSFS_PMCSETUP(pir, SPRN_PIR);
1da177e4 183
8a25a2fd
KS
184static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
185static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
186static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
187static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
7affca35 188static DEVICE_ATTR(pir, 0400, show_pir, NULL);
efcac658
AK
189
190unsigned long dscr_default = 0;
191EXPORT_SYMBOL(dscr_default);
192
8a25a2fd
KS
193static ssize_t show_dscr_default(struct device *dev,
194 struct device_attribute *attr, char *buf)
efcac658
AK
195{
196 return sprintf(buf, "%lx\n", dscr_default);
197}
198
8a25a2fd
KS
199static ssize_t __used store_dscr_default(struct device *dev,
200 struct device_attribute *attr, const char *buf,
efcac658
AK
201 size_t count)
202{
203 unsigned long val;
204 int ret = 0;
205
206 ret = sscanf(buf, "%lx", &val);
207 if (ret != 1)
208 return -EINVAL;
209 dscr_default = val;
210
211 return count;
212}
213
8a25a2fd 214static DEVICE_ATTR(dscr_default, 0600,
efcac658
AK
215 show_dscr_default, store_dscr_default);
216
217static void sysfs_create_dscr_default(void)
218{
219 int err = 0;
220 if (cpu_has_feature(CPU_FTR_DSCR))
8a25a2fd 221 err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
efcac658 222}
b950bdd0
BH
223#endif /* CONFIG_PPC64 */
224
225#ifdef HAS_PPC_PMC_PA6T
25fc530e
OJ
226SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
227SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
228SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
229SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
230SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
231SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
2e1957fd
OJ
232#ifdef CONFIG_DEBUG_KERNEL
233SYSFS_PMCSETUP(hid0, SPRN_HID0);
234SYSFS_PMCSETUP(hid1, SPRN_HID1);
235SYSFS_PMCSETUP(hid4, SPRN_HID4);
236SYSFS_PMCSETUP(hid5, SPRN_HID5);
237SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
238SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
239SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
240SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
241SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
242SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
243SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
244SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
245SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
246SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
247SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
248SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
249SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
250SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
251SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
252SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
253SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
254SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
255SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
256SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
257SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
258SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
259SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
260SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
261#endif /* CONFIG_DEBUG_KERNEL */
b950bdd0 262#endif /* HAS_PPC_PMC_PA6T */
6529c13d 263
b950bdd0 264#ifdef HAS_PPC_PMC_IBM
8a25a2fd
KS
265static struct device_attribute ibm_common_attrs[] = {
266 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
267 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
6529c13d 268};
b950bdd0
BH
269#endif /* HAS_PPC_PMC_G4 */
270
271#ifdef HAS_PPC_PMC_G4
8a25a2fd
KS
272static struct device_attribute g4_common_attrs[] = {
273 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
274 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
275 __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
b950bdd0
BH
276};
277#endif /* HAS_PPC_PMC_G4 */
6529c13d 278
8a25a2fd
KS
279static struct device_attribute classic_pmc_attrs[] = {
280 __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
281 __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
282 __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
283 __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
284 __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
285 __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
b950bdd0 286#ifdef CONFIG_PPC64
8a25a2fd
KS
287 __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
288 __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
b950bdd0 289#endif
6529c13d
OJ
290};
291
b950bdd0 292#ifdef HAS_PPC_PMC_PA6T
8a25a2fd
KS
293static struct device_attribute pa6t_attrs[] = {
294 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
295 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
296 __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
297 __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
298 __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
299 __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
300 __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
301 __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
2e1957fd 302#ifdef CONFIG_DEBUG_KERNEL
8a25a2fd
KS
303 __ATTR(hid0, 0600, show_hid0, store_hid0),
304 __ATTR(hid1, 0600, show_hid1, store_hid1),
305 __ATTR(hid4, 0600, show_hid4, store_hid4),
306 __ATTR(hid5, 0600, show_hid5, store_hid5),
307 __ATTR(ima0, 0600, show_ima0, store_ima0),
308 __ATTR(ima1, 0600, show_ima1, store_ima1),
309 __ATTR(ima2, 0600, show_ima2, store_ima2),
310 __ATTR(ima3, 0600, show_ima3, store_ima3),
311 __ATTR(ima4, 0600, show_ima4, store_ima4),
312 __ATTR(ima5, 0600, show_ima5, store_ima5),
313 __ATTR(ima6, 0600, show_ima6, store_ima6),
314 __ATTR(ima7, 0600, show_ima7, store_ima7),
315 __ATTR(ima8, 0600, show_ima8, store_ima8),
316 __ATTR(ima9, 0600, show_ima9, store_ima9),
317 __ATTR(imaat, 0600, show_imaat, store_imaat),
318 __ATTR(btcr, 0600, show_btcr, store_btcr),
319 __ATTR(pccr, 0600, show_pccr, store_pccr),
320 __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
321 __ATTR(der, 0600, show_der, store_der),
322 __ATTR(mer, 0600, show_mer, store_mer),
323 __ATTR(ber, 0600, show_ber, store_ber),
324 __ATTR(ier, 0600, show_ier, store_ier),
325 __ATTR(sier, 0600, show_sier, store_sier),
326 __ATTR(siar, 0600, show_siar, store_siar),
327 __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
328 __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
329 __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
330 __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
2e1957fd 331#endif /* CONFIG_DEBUG_KERNEL */
6529c13d 332};
b950bdd0
BH
333#endif /* HAS_PPC_PMC_PA6T */
334#endif /* HAS_PPC_PMC_CLASSIC */
6529c13d 335
9ba1984e 336static void __cpuinit register_cpu_online(unsigned int cpu)
1da177e4
LT
337{
338 struct cpu *c = &per_cpu(cpu_devices, cpu);
8a25a2fd
KS
339 struct device *s = &c->dev;
340 struct device_attribute *attrs, *pmc_attrs;
6529c13d 341 int i, nattrs;
1da177e4 342
b950bdd0 343#ifdef CONFIG_PPC64
ad5cb17f
SR
344 if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
345 cpu_has_feature(CPU_FTR_SMT))
8a25a2fd 346 device_create_file(s, &dev_attr_smt_snooze_delay);
b950bdd0 347#endif
1da177e4
LT
348
349 /* PMC stuff */
6529c13d 350 switch (cur_cpu_spec->pmc_type) {
b950bdd0 351#ifdef HAS_PPC_PMC_IBM
6529c13d
OJ
352 case PPC_PMC_IBM:
353 attrs = ibm_common_attrs;
8a25a2fd 354 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
b950bdd0 355 pmc_attrs = classic_pmc_attrs;
6529c13d 356 break;
b950bdd0
BH
357#endif /* HAS_PPC_PMC_IBM */
358#ifdef HAS_PPC_PMC_G4
359 case PPC_PMC_G4:
360 attrs = g4_common_attrs;
8a25a2fd 361 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
b950bdd0
BH
362 pmc_attrs = classic_pmc_attrs;
363 break;
364#endif /* HAS_PPC_PMC_G4 */
365#ifdef HAS_PPC_PMC_PA6T
6529c13d
OJ
366 case PPC_PMC_PA6T:
367 /* PA Semi starts counting at PMC0 */
368 attrs = pa6t_attrs;
8a25a2fd 369 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
6529c13d
OJ
370 pmc_attrs = NULL;
371 break;
b950bdd0 372#endif /* HAS_PPC_PMC_PA6T */
6529c13d
OJ
373 default:
374 attrs = NULL;
375 nattrs = 0;
376 pmc_attrs = NULL;
377 }
378
379 for (i = 0; i < nattrs; i++)
8a25a2fd 380 device_create_file(s, &attrs[i]);
1da177e4 381
6529c13d
OJ
382 if (pmc_attrs)
383 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
8a25a2fd 384 device_create_file(s, &pmc_attrs[i]);
1da177e4 385
b950bdd0 386#ifdef CONFIG_PPC64
1da177e4 387 if (cpu_has_feature(CPU_FTR_MMCRA))
8a25a2fd 388 device_create_file(s, &dev_attr_mmcra);
1da177e4 389
afd05423 390 if (cpu_has_feature(CPU_FTR_PURR))
8a25a2fd 391 device_create_file(s, &dev_attr_purr);
4c198557 392
f050982a 393 if (cpu_has_feature(CPU_FTR_SPURR))
8a25a2fd 394 device_create_file(s, &dev_attr_spurr);
f050982a 395
4c198557 396 if (cpu_has_feature(CPU_FTR_DSCR))
8a25a2fd 397 device_create_file(s, &dev_attr_dscr);
595fe914
AM
398
399 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
7affca35 400 device_create_file(s, &dev_attr_pir);
b950bdd0 401#endif /* CONFIG_PPC64 */
124c27d3 402
93197a36 403 cacheinfo_cpu_online(cpu);
1da177e4
LT
404}
405
406#ifdef CONFIG_HOTPLUG_CPU
407static void unregister_cpu_online(unsigned int cpu)
408{
409 struct cpu *c = &per_cpu(cpu_devices, cpu);
8a25a2fd
KS
410 struct device *s = &c->dev;
411 struct device_attribute *attrs, *pmc_attrs;
6529c13d 412 int i, nattrs;
1da177e4 413
72486f1f 414 BUG_ON(!c->hotpluggable);
1da177e4 415
a1e0eb10 416#ifdef CONFIG_PPC64
ad5cb17f
SR
417 if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
418 cpu_has_feature(CPU_FTR_SMT))
8a25a2fd 419 device_remove_file(s, &dev_attr_smt_snooze_delay);
a1e0eb10 420#endif
1da177e4
LT
421
422 /* PMC stuff */
6529c13d 423 switch (cur_cpu_spec->pmc_type) {
b950bdd0 424#ifdef HAS_PPC_PMC_IBM
6529c13d
OJ
425 case PPC_PMC_IBM:
426 attrs = ibm_common_attrs;
8a25a2fd 427 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
b950bdd0
BH
428 pmc_attrs = classic_pmc_attrs;
429 break;
430#endif /* HAS_PPC_PMC_IBM */
431#ifdef HAS_PPC_PMC_G4
432 case PPC_PMC_G4:
433 attrs = g4_common_attrs;
8a25a2fd 434 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
b950bdd0 435 pmc_attrs = classic_pmc_attrs;
6529c13d 436 break;
b950bdd0
BH
437#endif /* HAS_PPC_PMC_G4 */
438#ifdef HAS_PPC_PMC_PA6T
6529c13d
OJ
439 case PPC_PMC_PA6T:
440 /* PA Semi starts counting at PMC0 */
441 attrs = pa6t_attrs;
8a25a2fd 442 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
6529c13d
OJ
443 pmc_attrs = NULL;
444 break;
b950bdd0 445#endif /* HAS_PPC_PMC_PA6T */
6529c13d
OJ
446 default:
447 attrs = NULL;
448 nattrs = 0;
449 pmc_attrs = NULL;
450 }
1da177e4 451
6529c13d 452 for (i = 0; i < nattrs; i++)
8a25a2fd 453 device_remove_file(s, &attrs[i]);
6529c13d
OJ
454
455 if (pmc_attrs)
456 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
8a25a2fd 457 device_remove_file(s, &pmc_attrs[i]);
1da177e4 458
b950bdd0 459#ifdef CONFIG_PPC64
1da177e4 460 if (cpu_has_feature(CPU_FTR_MMCRA))
8a25a2fd 461 device_remove_file(s, &dev_attr_mmcra);
1da177e4 462
afd05423 463 if (cpu_has_feature(CPU_FTR_PURR))
8a25a2fd 464 device_remove_file(s, &dev_attr_purr);
4c198557 465
f050982a 466 if (cpu_has_feature(CPU_FTR_SPURR))
8a25a2fd 467 device_remove_file(s, &dev_attr_spurr);
f050982a 468
4c198557 469 if (cpu_has_feature(CPU_FTR_DSCR))
8a25a2fd 470 device_remove_file(s, &dev_attr_dscr);
595fe914
AM
471
472 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
7affca35 473 device_remove_file(s, &dev_attr_pir);
b950bdd0 474#endif /* CONFIG_PPC64 */
124c27d3 475
93197a36 476 cacheinfo_cpu_offline(cpu);
1da177e4 477}
12633e80
NF
478
479#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
480ssize_t arch_cpu_probe(const char *buf, size_t count)
481{
482 if (ppc_md.cpu_probe)
483 return ppc_md.cpu_probe(buf, count);
484
485 return -EINVAL;
486}
487
488ssize_t arch_cpu_release(const char *buf, size_t count)
489{
490 if (ppc_md.cpu_release)
491 return ppc_md.cpu_release(buf, count);
492
493 return -EINVAL;
494}
495#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
496
1da177e4
LT
497#endif /* CONFIG_HOTPLUG_CPU */
498
8c78f307 499static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
1da177e4
LT
500 unsigned long action, void *hcpu)
501{
502 unsigned int cpu = (unsigned int)(long)hcpu;
503
504 switch (action) {
505 case CPU_ONLINE:
8bb78442 506 case CPU_ONLINE_FROZEN:
1da177e4
LT
507 register_cpu_online(cpu);
508 break;
509#ifdef CONFIG_HOTPLUG_CPU
510 case CPU_DEAD:
8bb78442 511 case CPU_DEAD_FROZEN:
1da177e4
LT
512 unregister_cpu_online(cpu);
513 break;
514#endif
515 }
516 return NOTIFY_OK;
517}
518
8c78f307 519static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
1da177e4
LT
520 .notifier_call = sysfs_cpu_notify,
521};
522
0344c6c5
CK
523static DEFINE_MUTEX(cpu_mutex);
524
8a25a2fd 525int cpu_add_dev_attr(struct device_attribute *attr)
0344c6c5
CK
526{
527 int cpu;
528
529 mutex_lock(&cpu_mutex);
530
531 for_each_possible_cpu(cpu) {
8a25a2fd 532 device_create_file(get_cpu_device(cpu), attr);
0344c6c5
CK
533 }
534
535 mutex_unlock(&cpu_mutex);
536 return 0;
537}
8a25a2fd 538EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
0344c6c5 539
8a25a2fd 540int cpu_add_dev_attr_group(struct attribute_group *attrs)
0344c6c5
CK
541{
542 int cpu;
8a25a2fd 543 struct device *dev;
6bcc4c01 544 int ret;
0344c6c5
CK
545
546 mutex_lock(&cpu_mutex);
547
548 for_each_possible_cpu(cpu) {
8a25a2fd
KS
549 dev = get_cpu_device(cpu);
550 ret = sysfs_create_group(&dev->kobj, attrs);
6bcc4c01 551 WARN_ON(ret != 0);
0344c6c5
CK
552 }
553
554 mutex_unlock(&cpu_mutex);
555 return 0;
556}
8a25a2fd 557EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
0344c6c5
CK
558
559
8a25a2fd 560void cpu_remove_dev_attr(struct device_attribute *attr)
0344c6c5
CK
561{
562 int cpu;
563
564 mutex_lock(&cpu_mutex);
565
566 for_each_possible_cpu(cpu) {
8a25a2fd 567 device_remove_file(get_cpu_device(cpu), attr);
0344c6c5
CK
568 }
569
570 mutex_unlock(&cpu_mutex);
571}
8a25a2fd 572EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
0344c6c5 573
8a25a2fd 574void cpu_remove_dev_attr_group(struct attribute_group *attrs)
0344c6c5
CK
575{
576 int cpu;
8a25a2fd 577 struct device *dev;
0344c6c5
CK
578
579 mutex_lock(&cpu_mutex);
580
581 for_each_possible_cpu(cpu) {
8a25a2fd
KS
582 dev = get_cpu_device(cpu);
583 sysfs_remove_group(&dev->kobj, attrs);
0344c6c5
CK
584 }
585
586 mutex_unlock(&cpu_mutex);
587}
8a25a2fd 588EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
0344c6c5
CK
589
590
1da177e4
LT
591/* NUMA stuff */
592
593#ifdef CONFIG_NUMA
1da177e4
LT
594static void register_nodes(void)
595{
596 int i;
597
0fc44159
YG
598 for (i = 0; i < MAX_NUMNODES; i++)
599 register_one_node(i);
1da177e4 600}
953039c8 601
8a25a2fd 602int sysfs_add_device_to_node(struct device *dev, int nid)
953039c8
JK
603{
604 struct node *node = &node_devices[nid];
10fbcf4c 605 return sysfs_create_link(&node->dev.kobj, &dev->kobj,
953039c8
JK
606 kobject_name(&dev->kobj));
607}
12654f77 608EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
953039c8 609
8a25a2fd 610void sysfs_remove_device_from_node(struct device *dev, int nid)
953039c8
JK
611{
612 struct node *node = &node_devices[nid];
10fbcf4c 613 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
953039c8 614}
12654f77 615EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
953039c8 616
1da177e4
LT
617#else
618static void register_nodes(void)
619{
620 return;
621}
953039c8 622
1da177e4
LT
623#endif
624
625/* Only valid if CPU is present. */
8a25a2fd
KS
626static ssize_t show_physical_id(struct device *dev,
627 struct device_attribute *attr, char *buf)
1da177e4 628{
8a25a2fd 629 struct cpu *cpu = container_of(dev, struct cpu, dev);
1da177e4 630
8a25a2fd 631 return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
1da177e4 632}
8a25a2fd 633static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
1da177e4
LT
634
635static int __init topology_init(void)
636{
637 int cpu;
1da177e4
LT
638
639 register_nodes();
1da177e4
LT
640 register_cpu_notifier(&sysfs_cpu_nb);
641
0e551954 642 for_each_possible_cpu(cpu) {
1da177e4
LT
643 struct cpu *c = &per_cpu(cpu_devices, cpu);
644
1da177e4
LT
645 /*
646 * For now, we just see if the system supports making
647 * the RTAS calls for CPU hotplug. But, there may be a
648 * more comprehensive way to do this for an individual
649 * CPU. For instance, the boot cpu might never be valid
650 * for hotplugging.
651 */
72486f1f
SS
652 if (ppc_md.cpu_die)
653 c->hotpluggable = 1;
1da177e4 654
72486f1f 655 if (cpu_online(cpu) || c->hotpluggable) {
76b67ed9 656 register_cpu(c, cpu);
1da177e4 657
8a25a2fd 658 device_create_file(&c->dev, &dev_attr_physical_id);
1da177e4
LT
659 }
660
661 if (cpu_online(cpu))
662 register_cpu_online(cpu);
663 }
efcac658
AK
664#ifdef CONFIG_PPC64
665 sysfs_create_dscr_default();
666#endif /* CONFIG_PPC64 */
1da177e4
LT
667
668 return 0;
669}
e9e77ce8 670subsys_initcall(topology_init);
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