[deliverable/linux.git] / arch / powerpc / kvm / book3s_64_mmu.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/tlbflush.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>
#include <asm/mmu-hash64.h>

/* #define DEBUG_MMU */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, vcpu->arch.intr_msr);
}

static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
				struct kvm_vcpu *vcpu,
				gva_t eaddr)
{
	int i;
	u64 esid = GET_ESID(eaddr);
	u64 esid_1t = GET_ESID_1T(eaddr);

	for (i = 0; i < vcpu->arch.slb_nr; i++) {
		u64 cmp_esid = esid;

		if (!vcpu->arch.slb[i].valid)
			continue;

		if (vcpu->arch.slb[i].tb)
			cmp_esid = esid_1t;

		if (vcpu->arch.slb[i].esid == cmp_esid)
			return &vcpu->arch.slb[i];
	}

	dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
		eaddr, esid, esid_1t);
	for (i = 0; i < vcpu->arch.slb_nr; i++) {
	    if (vcpu->arch.slb[i].vsid)
		dprintk("  %d: %c%c%c %llx %llx\n", i,
			vcpu->arch.slb[i].valid ? 'v' : ' ',
			vcpu->arch.slb[i].large ? 'l' : ' ',
			vcpu->arch.slb[i].tb    ? 't' : ' ',
			vcpu->arch.slb[i].esid,
			vcpu->arch.slb[i].vsid);
	}

	return NULL;
}

static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
{
	return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
}

static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
{
	return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
}

static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
{
	eaddr &= kvmppc_slb_offset_mask(slb);

	return (eaddr >> VPN_SHIFT) |
		((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
}

static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	struct kvmppc_slb *slb;

	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
	if (!slb)
		return 0;

	return kvmppc_slb_calc_vpn(slb, eaddr);
}

static int mmu_pagesize(int mmu_pg)
{
	switch (mmu_pg) {
	case MMU_PAGE_64K:
		return 16;
	case MMU_PAGE_16M:
		return 24;
	}
	return 12;
}

static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
{
	return mmu_pagesize(slbe->base_page_size);
}

static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);

	return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
}

static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu,
				struct kvmppc_slb *slbe, gva_t eaddr,
				bool second)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	u64 hash, pteg, htabsize;
	u32 ssize;
	hva_t r;
	u64 vpn;

	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);

	vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
	ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
	hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
	if (second)
		hash = ~hash;
	hash &= ((1ULL << 39ULL) - 1ULL);
	hash &= htabsize;
	hash <<= 7ULL;

	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	pteg |= hash;

	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
		page, vcpu_book3s->sdr1, pteg, slbe->vsid);

	/* When running a PAPR guest, SDR1 contains a HVA address instead
           of a GPA */
	if (vcpu->arch.papr_enabled)
		r = pteg;
	else
		r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);

	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	u64 avpn;

	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);

	if (p < 16)
		avpn >>= ((80 - p) - 56) - 8;	/* 16 - p */
	else
		avpn <<= p - 16;

	return avpn;
}

/*
 * Return page size encoded in the second word of a HPTE, or
 * -1 for an invalid encoding for the base page size indicated by
 * the SLB entry.  This doesn't handle mixed pagesize segments yet.
 */
static int decode_pagesize(struct kvmppc_slb *slbe, u64 r)
{
	switch (slbe->base_page_size) {
	case MMU_PAGE_64K:
		if ((r & 0xf000) == 0x1000)
			return MMU_PAGE_64K;
		break;
	case MMU_PAGE_16M:
		if ((r & 0xff000) == 0)
			return MMU_PAGE_16M;
		break;
	}
	return -1;
}

static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				      struct kvmppc_pte *gpte, bool data,
				      bool iswrite)
{
	struct kvmppc_slb *slbe;
	hva_t ptegp;
	u64 pteg[16];
	u64 avpn = 0;
	u64 v, r;
	u64 v_val, v_mask;
	u64 eaddr_mask;
	int i;
	u8 pp, key = 0;
	bool found = false;
	bool second = false;
	int pgsize;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	/* Magic page override */
	if (unlikely(mp_ea) &&
	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
		gpte->eaddr = eaddr;
		gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
		gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
		gpte->raddr &= KVM_PAM;
		gpte->may_execute = true;
		gpte->may_read = true;
		gpte->may_write = true;
		gpte->page_size = MMU_PAGE_4K;

		return 0;
	}

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
	if (!slbe)
		goto no_seg_found;

	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
	v_val = avpn & HPTE_V_AVPN;

	if (slbe->tb)
		v_val |= SLB_VSID_B_1T;
	if (slbe->large)
		v_val |= HPTE_V_LARGE;
	v_val |= HPTE_V_VALID;

	v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID |
		HPTE_V_SECONDARY;

	pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K;

	mutex_lock(&vcpu->kvm->arch.hpt_mutex);

do_second:
	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second);
	if (kvm_is_error_hva(ptegp))
		goto no_page_found;

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp)
		key = 4;
	else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks)
		key = 4;

	for (i=0; i<16; i+=2) {
		u64 pte0 = be64_to_cpu(pteg[i]);
		u64 pte1 = be64_to_cpu(pteg[i + 1]);

		/* Check all relevant fields of 1st dword */
		if ((pte0 & v_mask) == v_val) {
			/* If large page bit is set, check pgsize encoding */
			if (slbe->large &&
			    (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
				pgsize = decode_pagesize(slbe, pte1);
				if (pgsize < 0)
					continue;
			}
			found = true;
			break;
		}
	}

	if (!found) {
		if (second)
			goto no_page_found;
		v_val |= HPTE_V_SECONDARY;
		second = true;
		goto do_second;
	}

	v = be64_to_cpu(pteg[i]);
	r = be64_to_cpu(pteg[i+1]);
	pp = (r & HPTE_R_PP) | key;
	if (r & HPTE_R_PP0)
		pp |= 8;

	gpte->eaddr = eaddr;
	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);

	eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1;
	gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask);
	gpte->page_size = pgsize;
	gpte->may_execute = ((r & HPTE_R_N) ? false : true);
	if (unlikely(vcpu->arch.disable_kernel_nx) &&
	    !(kvmppc_get_msr(vcpu) & MSR_PR))
		gpte->may_execute = true;
	gpte->may_read = false;
	gpte->may_write = false;

	switch (pp) {
	case 0:
	case 1:
	case 2:
	case 6:
		gpte->may_write = true;
		/* fall through */
	case 3:
	case 5:
	case 7:
	case 10:
		gpte->may_read = true;
		break;
	}

	dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
		"-> 0x%lx\n",
		eaddr, avpn, gpte->vpage, gpte->raddr);

	/* Update PTE R and C bits, so the guest's swapper knows we used the
	 * page */
	if (gpte->may_read && !(r & HPTE_R_R)) {
		/*
		 * Set the accessed flag.
		 * We have to write this back with a single byte write
		 * because another vcpu may be accessing this on
		 * non-PAPR platforms such as mac99, and this is
		 * what real hardware does.
		 */
                char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
		r |= HPTE_R_R;
		put_user(r >> 8, addr + 6);
	}
	if (iswrite && gpte->may_write && !(r & HPTE_R_C)) {
		/* Set the dirty flag */
		/* Use a single byte write */
                char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
		r |= HPTE_R_C;
		put_user(r, addr + 7);
	}

	mutex_unlock(&vcpu->kvm->arch.hpt_mutex);

	if (!gpte->may_read || (iswrite && !gpte->may_write))
		return -EPERM;
	return 0;

no_page_found:
	mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
	return -ENOENT;

no_seg_found:
	dprintk("KVM MMU: Trigger segment fault\n");
	return -EINVAL;
}

static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	u64 esid, esid_1t;
	int slb_nr;
	struct kvmppc_slb *slbe;

	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);

	vcpu_book3s = to_book3s(vcpu);

	esid = GET_ESID(rb);
	esid_1t = GET_ESID_1T(rb);
	slb_nr = rb & 0xfff;

	if (slb_nr > vcpu->arch.slb_nr)
		return;

	slbe = &vcpu->arch.slb[slb_nr];

	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
	slbe->tb    = (rs & SLB_VSID_B_1T) ? 1 : 0;
	slbe->esid  = slbe->tb ? esid_1t : esid;
	slbe->vsid  = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	slbe->Ks    = (rs & SLB_VSID_KS) ? 1 : 0;
	slbe->Kp    = (rs & SLB_VSID_KP) ? 1 : 0;
	slbe->nx    = (rs & SLB_VSID_N) ? 1 : 0;
	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;

	slbe->base_page_size = MMU_PAGE_4K;
	if (slbe->large) {
		if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) {
			switch (rs & SLB_VSID_LP) {
			case SLB_VSID_LP_00:
				slbe->base_page_size = MMU_PAGE_16M;
				break;
			case SLB_VSID_LP_01:
				slbe->base_page_size = MMU_PAGE_64K;
				break;
			}
		} else
			slbe->base_page_size = MMU_PAGE_16M;
	}

	slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
	slbe->origv = rs;

	/* Map the new segment */
	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
}

static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu->arch.slb_nr)
		return 0;

	slbe = &vcpu->arch.slb[slb_nr];

	return slbe->orige;
}

static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu->arch.slb_nr)
		return 0;

	slbe = &vcpu->arch.slb[slb_nr];

	return slbe->origv;
}

static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
{
	struct kvmppc_slb *slbe;
	u64 seg_size;

	dprintk("KVM MMU: slbie(0x%llx)\n", ea);

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);

	if (!slbe)
		return;

	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);

	slbe->valid = false;
	slbe->orige = 0;
	slbe->origv = 0;

	seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
	kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
}

static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
{
	int i;

	dprintk("KVM MMU: slbia()\n");

	for (i = 1; i < vcpu->arch.slb_nr; i++) {
		vcpu->arch.slb[i].valid = false;
		vcpu->arch.slb[i].orige = 0;
		vcpu->arch.slb[i].origv = 0;
	}

	if (kvmppc_get_msr(vcpu) & MSR_IR) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
	}
}

static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	u64 rb = 0, rs = 0;

	/*
	 * According to Book3 2.01 mtsrin is implemented as:
	 *
	 * The SLB entry specified by (RB)32:35 is loaded from register
	 * RS, as follows.
	 *
	 * SLBE Bit	Source			SLB Field
	 *
	 * 0:31		0x0000_0000		ESID-0:31
	 * 32:35	(RB)32:35		ESID-32:35
	 * 36		0b1			V
	 * 37:61	0x00_0000|| 0b0		VSID-0:24
	 * 62:88	(RS)37:63		VSID-25:51
	 * 89:91	(RS)33:35		Ks Kp N
	 * 92		(RS)36			L ((RS)36 must be 0b0)
	 * 93		0b0			C
	 */

	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);

	/* ESID = srnum */
	rb |= (srnum & 0xf) << 28;
	/* Set the valid bit */
	rb |= 1 << 27;
	/* Index = ESID */
	rb |= srnum;

	/* VSID = VSID */
	rs |= (value & 0xfffffff) << 12;
	/* flags = flags */
	rs |= ((value >> 28) & 0x7) << 9;

	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
}

static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
				       bool large)
{
	u64 mask = 0xFFFFFFFFFULL;
	long i;
	struct kvm_vcpu *v;

	dprintk("KVM MMU: tlbie(0x%lx)\n", va);

	/*
	 * The tlbie instruction changed behaviour starting with
	 * POWER6.  POWER6 and later don't have the large page flag
	 * in the instruction but in the RB value, along with bits
	 * indicating page and segment sizes.
	 */
	if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) {
		/* POWER6 or later */
		if (va & 1) {		/* L bit */
			if ((va & 0xf000) == 0x1000)
				mask = 0xFFFFFFFF0ULL;	/* 64k page */
			else
				mask = 0xFFFFFF000ULL;	/* 16M page */
		}
	} else {
		/* older processors, e.g. PPC970 */
		if (large)
			mask = 0xFFFFFF000ULL;
	}
	/* flush this VA on all vcpus */
	kvm_for_each_vcpu(i, v, vcpu->kvm)
		kvmppc_mmu_pte_vflush(v, va >> 12, mask);
}

#ifdef CONFIG_PPC_64K_PAGES
static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
{
	ulong mp_ea = vcpu->arch.magic_page_ea;

	return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) &&
		(mp_ea >> SID_SHIFT) == esid;
}
#endif

static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid)
{
	ulong ea = esid << SID_SHIFT;
	struct kvmppc_slb *slb;
	u64 gvsid = esid;
	ulong mp_ea = vcpu->arch.magic_page_ea;
	int pagesize = MMU_PAGE_64K;
	u64 msr = kvmppc_get_msr(vcpu);

	if (msr & (MSR_DR|MSR_IR)) {
		slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
		if (slb) {
			gvsid = slb->vsid;
			pagesize = slb->base_page_size;
			if (slb->tb) {
				gvsid <<= SID_SHIFT_1T - SID_SHIFT;
				gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
				gvsid |= VSID_1T;
			}
		}
	}

	switch (msr & (MSR_DR|MSR_IR)) {
	case 0:
		gvsid = VSID_REAL | esid;
		break;
	case MSR_IR:
		gvsid |= VSID_REAL_IR;
		break;
	case MSR_DR:
		gvsid |= VSID_REAL_DR;
		break;
	case MSR_DR|MSR_IR:
		if (!slb)
			goto no_slb;

		break;
	default:
		BUG();
		break;
	}

#ifdef CONFIG_PPC_64K_PAGES
	/*
	 * Mark this as a 64k segment if the host is using
	 * 64k pages, the host MMU supports 64k pages and
	 * the guest segment page size is >= 64k,
	 * but not if this segment contains the magic page.
	 */
	if (pagesize >= MMU_PAGE_64K &&
	    mmu_psize_defs[MMU_PAGE_64K].shift &&
	    !segment_contains_magic_page(vcpu, esid))
		gvsid |= VSID_64K;
#endif

	if (kvmppc_get_msr(vcpu) & MSR_PR)
		gvsid |= VSID_PR;

	*vsid = gvsid;
	return 0;

no_slb:
	/* Catch magic page case */
	if (unlikely(mp_ea) &&
	    unlikely(esid == (mp_ea >> SID_SHIFT)) &&
	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
		*vsid = VSID_REAL | esid;
		return 0;
	}

	return -EINVAL;
}

static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return (to_book3s(vcpu)->hid[5] & 0x80);
}

void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mfsrin = NULL;
	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
}
Commit	Line	Data
e71b2a39 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <linux/types.h>
	21	#include <linux/string.h>
	22	#include <linux/kvm.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/highmem.h>
	25
	26	#include <asm/tlbflush.h>
	27	#include <asm/kvm_ppc.h>
	28	#include <asm/kvm_book3s.h>
0f296829	29	#include <asm/mmu-hash64.h>
e71b2a39 AG	30
	31	/* #define DEBUG_MMU */
	32
	33	#ifdef DEBUG_MMU
	34	#define dprintk(X...) printk(KERN_INFO X)
	35	#else
	36	#define dprintk(X...) do { } while(0)
	37	#endif
	38
	39	static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
	40	{
e5ee5422	41	kvmppc_set_msr(vcpu, vcpu->arch.intr_msr);
e71b2a39 AG	42	}
	43
	44	static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
c4befc58	45	struct kvm_vcpu *vcpu,
e71b2a39 AG	46	gva_t eaddr)
	47	{
	48	int i;
	49	u64 esid = GET_ESID(eaddr);
	50	u64 esid_1t = GET_ESID_1T(eaddr);
	51
c4befc58	52	for (i = 0; i < vcpu->arch.slb_nr; i++) {
e71b2a39 AG	53	u64 cmp_esid = esid;
e71b2a39 AG	54
c4befc58	55	if (!vcpu->arch.slb[i].valid)
e71b2a39 AG	56	continue;
e71b2a39 AG	57
c4befc58	58	if (vcpu->arch.slb[i].tb)
e71b2a39 AG	59	cmp_esid = esid_1t;
e71b2a39 AG	60
c4befc58 PM	61	if (vcpu->arch.slb[i].esid == cmp_esid)
c4befc58 PM	62	return &vcpu->arch.slb[i];
e71b2a39 AG	63	}
	64
	65	dprintk("KVM: No SLB entry found for 0x%lx [%llx \| %llx]\n",
	66	eaddr, esid, esid_1t);
c4befc58 PM	67	for (i = 0; i < vcpu->arch.slb_nr; i++) {
c4befc58 PM	68	if (vcpu->arch.slb[i].vsid)
4b5c9b7f	69	dprintk(" %d: %c%c%c %llx %llx\n", i,
c4befc58 PM	70	vcpu->arch.slb[i].valid ? 'v' : ' ',
	71	vcpu->arch.slb[i].large ? 'l' : ' ',
	72	vcpu->arch.slb[i].tb ? 't' : ' ',
	73	vcpu->arch.slb[i].esid,
	74	vcpu->arch.slb[i].vsid);
e71b2a39 AG	75	}
	76
	77	return NULL;
	78	}
	79
0f296829 PM	80	static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
	81	{
	82	return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
	83	}
	84
	85	static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
	86	{
	87	return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
	88	}
	89
	90	static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
	91	{
	92	eaddr &= kvmppc_slb_offset_mask(slb);
	93
	94	return (eaddr >> VPN_SHIFT) \|
	95	((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
	96	}
	97
e71b2a39 AG	98	static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	99	bool data)
	100	{
	101	struct kvmppc_slb *slb;
	102
c4befc58	103	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
e71b2a39 AG	104	if (!slb)
	105	return 0;
	106
0f296829	107	return kvmppc_slb_calc_vpn(slb, eaddr);
e71b2a39 AG	108	}
e71b2a39 AG	109
a4a0f252 PM	110	static int mmu_pagesize(int mmu_pg)
	111	{
	112	switch (mmu_pg) {
	113	case MMU_PAGE_64K:
	114	return 16;
	115	case MMU_PAGE_16M:
	116	return 24;
	117	}
	118	return 12;
	119	}
	120
e71b2a39 AG	121	static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
e71b2a39 AG	122	{
a4a0f252	123	return mmu_pagesize(slbe->base_page_size);
e71b2a39 AG	124	}
	125
	126	static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
	127	{
	128	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
0f296829 PM	129
0f296829 PM	130	return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
e71b2a39 AG	131	}
e71b2a39 AG	132
3ff95502	133	static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu,
e71b2a39 AG	134	struct kvmppc_slb *slbe, gva_t eaddr,
	135	bool second)
	136	{
3ff95502	137	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
e71b2a39	138	u64 hash, pteg, htabsize;
0f296829	139	u32 ssize;
e71b2a39	140	hva_t r;
0f296829	141	u64 vpn;
e71b2a39	142
e71b2a39 AG	143	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
e71b2a39 AG	144
0f296829 PM	145	vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
	146	ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
	147	hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
e71b2a39 AG	148	if (second)
	149	hash = ~hash;
	150	hash &= ((1ULL << 39ULL) - 1ULL);
	151	hash &= htabsize;
	152	hash <<= 7ULL;
	153
	154	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	155	pteg \|= hash;
	156
	157	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
	158	page, vcpu_book3s->sdr1, pteg, slbe->vsid);
	159
04fcc11b AG	160	/* When running a PAPR guest, SDR1 contains a HVA address instead
04fcc11b AG	161	of a GPA */
3ff95502	162	if (vcpu->arch.papr_enabled)
04fcc11b AG	163	r = pteg;
04fcc11b AG	164	else
3ff95502	165	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
04fcc11b	166
e71b2a39 AG	167	if (kvm_is_error_hva(r))
	168	return r;
	169	return r \| (pteg & ~PAGE_MASK);
	170	}
	171
	172	static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
	173	{
	174	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	175	u64 avpn;
	176
	177	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
0f296829	178	avpn \|= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);
e71b2a39	179
a4a0f252 PM	180	if (p < 16)
a4a0f252 PM	181	avpn >>= ((80 - p) - 56) - 8; /* 16 - p */
e71b2a39	182	else
a4a0f252	183	avpn <<= p - 16;
e71b2a39 AG	184
	185	return avpn;
	186	}
	187
a4a0f252 PM	188	/*
	189	* Return page size encoded in the second word of a HPTE, or
	190	* -1 for an invalid encoding for the base page size indicated by
	191	* the SLB entry. This doesn't handle mixed pagesize segments yet.
	192	*/
	193	static int decode_pagesize(struct kvmppc_slb *slbe, u64 r)
	194	{
	195	switch (slbe->base_page_size) {
	196	case MMU_PAGE_64K:
	197	if ((r & 0xf000) == 0x1000)
	198	return MMU_PAGE_64K;
	199	break;
	200	case MMU_PAGE_16M:
	201	if ((r & 0xff000) == 0)
	202	return MMU_PAGE_16M;
	203	break;
	204	}
	205	return -1;
	206	}
	207
e71b2a39	208	static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	209	struct kvmppc_pte *gpte, bool data,
93b159b4 PM	210	bool iswrite)
e71b2a39	211	{
e71b2a39 AG	212	struct kvmppc_slb *slbe;
	213	hva_t ptegp;
	214	u64 pteg[16];
	215	u64 avpn = 0;
7e48c101 PM	216	u64 v, r;
	217	u64 v_val, v_mask;
	218	u64 eaddr_mask;
e71b2a39	219	int i;
7e48c101	220	u8 pp, key = 0;
e71b2a39	221	bool found = false;
7e48c101	222	bool second = false;
a4a0f252	223	int pgsize;
e8508940 AG	224	ulong mp_ea = vcpu->arch.magic_page_ea;
	225
	226	/* Magic page override */
	227	if (unlikely(mp_ea) &&
	228	unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
5deb8e7a	229	!(kvmppc_get_msr(vcpu) & MSR_PR)) {
e8508940 AG	230	gpte->eaddr = eaddr;
	231	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
	232	gpte->raddr = vcpu->arch.magic_page_pa \| (gpte->raddr & 0xfff);
	233	gpte->raddr &= KVM_PAM;
	234	gpte->may_execute = true;
	235	gpte->may_read = true;
	236	gpte->may_write = true;
a4a0f252	237	gpte->page_size = MMU_PAGE_4K;
e8508940 AG	238
	239	return 0;
	240	}
e71b2a39	241
c4befc58	242	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
e71b2a39 AG	243	if (!slbe)
	244	goto no_seg_found;
	245
0f296829	246	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
7e48c101 PM	247	v_val = avpn & HPTE_V_AVPN;
7e48c101 PM	248
0f296829	249	if (slbe->tb)
7e48c101 PM	250	v_val \|= SLB_VSID_B_1T;
	251	if (slbe->large)
	252	v_val \|= HPTE_V_LARGE;
	253	v_val \|= HPTE_V_VALID;
	254
	255	v_mask = SLB_VSID_B \| HPTE_V_AVPN \| HPTE_V_LARGE \| HPTE_V_VALID \|
	256	HPTE_V_SECONDARY;
0f296829	257
a4a0f252 PM	258	pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K;
a4a0f252 PM	259
9308ab8e PM	260	mutex_lock(&vcpu->kvm->arch.hpt_mutex);
9308ab8e PM	261
e71b2a39	262	do_second:
3ff95502	263	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second);
e71b2a39 AG	264	if (kvm_is_error_hva(ptegp))
	265	goto no_page_found;
	266
e71b2a39 AG	267	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
	268	printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
	269	goto no_page_found;
	270	}
	271
5deb8e7a	272	if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp)
e71b2a39	273	key = 4;
5deb8e7a	274	else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks)
e71b2a39 AG	275	key = 4;
	276
	277	for (i=0; i<16; i+=2) {
4e509af9 AG	278	u64 pte0 = be64_to_cpu(pteg[i]);
	279	u64 pte1 = be64_to_cpu(pteg[i + 1]);
	280
7e48c101	281	/* Check all relevant fields of 1st dword */
4e509af9	282	if ((pte0 & v_mask) == v_val) {
a4a0f252 PM	283	/* If large page bit is set, check pgsize encoding */
	284	if (slbe->large &&
	285	(vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
4e509af9	286	pgsize = decode_pagesize(slbe, pte1);
a4a0f252 PM	287	if (pgsize < 0)
	288	continue;
	289	}
e71b2a39 AG	290	found = true;
	291	break;
	292	}
	293	}
	294
7e48c101 PM	295	if (!found) {
	296	if (second)
	297	goto no_page_found;
	298	v_val \|= HPTE_V_SECONDARY;
	299	second = true;
	300	goto do_second;
	301	}
e71b2a39	302
4e509af9 AG	303	v = be64_to_cpu(pteg[i]);
4e509af9 AG	304	r = be64_to_cpu(pteg[i+1]);
7e48c101	305	pp = (r & HPTE_R_PP) \| key;
03a9c903 PM	306	if (r & HPTE_R_PP0)
03a9c903 PM	307	pp \|= 8;
7e48c101 PM	308
	309	gpte->eaddr = eaddr;
	310	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
a4a0f252 PM	311
a4a0f252 PM	312	eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1;
7e48c101	313	gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) \| (eaddr & eaddr_mask);
a4a0f252	314	gpte->page_size = pgsize;
7e48c101	315	gpte->may_execute = ((r & HPTE_R_N) ? false : true);
f3383cf8 AG	316	if (unlikely(vcpu->arch.disable_kernel_nx) &&
	317	!(kvmppc_get_msr(vcpu) & MSR_PR))
	318	gpte->may_execute = true;
7e48c101 PM	319	gpte->may_read = false;
	320	gpte->may_write = false;
	321
	322	switch (pp) {
	323	case 0:
	324	case 1:
	325	case 2:
	326	case 6:
	327	gpte->may_write = true;
	328	/* fall through */
	329	case 3:
	330	case 5:
	331	case 7:
03a9c903	332	case 10:
7e48c101 PM	333	gpte->may_read = true;
	334	break;
	335	}
e71b2a39	336
7e48c101 PM	337	dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
	338	"-> 0x%lx\n",
	339	eaddr, avpn, gpte->vpage, gpte->raddr);
e71b2a39	340
7e48c101 PM	341	/* Update PTE R and C bits, so the guest's swapper knows we used the
7e48c101 PM	342	* page */
9308ab8e PM	343	if (gpte->may_read && !(r & HPTE_R_R)) {
	344	/*
	345	* Set the accessed flag.
	346	* We have to write this back with a single byte write
	347	* because another vcpu may be accessing this on
	348	* non-PAPR platforms such as mac99, and this is
	349	* what real hardware does.
	350	*/
740f834e	351	char __user addr = (char __user ) (ptegp + (i + 1) * sizeof(u64));
7e48c101	352	r \|= HPTE_R_R;
9308ab8e	353	put_user(r >> 8, addr + 6);
7e48c101	354	}
93b159b4 PM	355	if (iswrite && gpte->may_write && !(r & HPTE_R_C)) {
93b159b4 PM	356	/* Set the dirty flag */
9308ab8e	357	/* Use a single byte write */
740f834e	358	char __user addr = (char __user ) (ptegp + (i + 1) * sizeof(u64));
7e48c101	359	r \|= HPTE_R_C;
9308ab8e	360	put_user(r, addr + 7);
e71b2a39 AG	361	}
e71b2a39 AG	362
9308ab8e	363	mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
7e48c101	364
93b159b4	365	if (!gpte->may_read \|\| (iswrite && !gpte->may_write))
7e48c101 PM	366	return -EPERM;
	367	return 0;
	368
e71b2a39	369	no_page_found:
9308ab8e	370	mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
e71b2a39 AG	371	return -ENOENT;
	372
	373	no_seg_found:
e71b2a39 AG	374	dprintk("KVM MMU: Trigger segment fault\n");
	375	return -EINVAL;
	376	}
	377
	378	static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
	379	{
	380	struct kvmppc_vcpu_book3s *vcpu_book3s;
	381	u64 esid, esid_1t;
	382	int slb_nr;
	383	struct kvmppc_slb *slbe;
	384
	385	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
	386
	387	vcpu_book3s = to_book3s(vcpu);
	388
	389	esid = GET_ESID(rb);
	390	esid_1t = GET_ESID_1T(rb);
	391	slb_nr = rb & 0xfff;
	392
c4befc58	393	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	394	return;
e71b2a39 AG	395
c4befc58	396	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	397
e71b2a39 AG	398	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
4b5c9b7f AG	399	slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
4b5c9b7f AG	400	slbe->esid = slbe->tb ? esid_1t : esid;
0f296829	401	slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
e71b2a39 AG	402	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	403	slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
	404	slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
	405	slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
	406	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
	407
a4a0f252 PM	408	slbe->base_page_size = MMU_PAGE_4K;
	409	if (slbe->large) {
	410	if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) {
	411	switch (rs & SLB_VSID_LP) {
	412	case SLB_VSID_LP_00:
	413	slbe->base_page_size = MMU_PAGE_16M;
	414	break;
	415	case SLB_VSID_LP_01:
	416	slbe->base_page_size = MMU_PAGE_64K;
	417	break;
	418	}
	419	} else
	420	slbe->base_page_size = MMU_PAGE_16M;
	421	}
	422
e71b2a39 AG	423	slbe->orige = rb & (ESID_MASK \| SLB_ESID_V);
	424	slbe->origv = rs;
	425
	426	/* Map the new segment */
	427	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
	428	}
	429
	430	static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
	431	{
e71b2a39 AG	432	struct kvmppc_slb *slbe;
e71b2a39 AG	433
c4befc58	434	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	435	return 0;
e71b2a39 AG	436
c4befc58	437	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	438
	439	return slbe->orige;
	440	}
	441
	442	static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
	443	{
e71b2a39 AG	444	struct kvmppc_slb *slbe;
e71b2a39 AG	445
c4befc58	446	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	447	return 0;
e71b2a39 AG	448
c4befc58	449	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	450
	451	return slbe->origv;
	452	}
	453
	454	static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
	455	{
e71b2a39	456	struct kvmppc_slb *slbe;
0f296829	457	u64 seg_size;
e71b2a39 AG	458
	459	dprintk("KVM MMU: slbie(0x%llx)\n", ea);
	460
c4befc58	461	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
e71b2a39 AG	462
	463	if (!slbe)
	464	return;
	465
	466	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
	467
	468	slbe->valid = false;
681562cd PM	469	slbe->orige = 0;
681562cd PM	470	slbe->origv = 0;
e71b2a39	471
0f296829 PM	472	seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
0f296829 PM	473	kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
e71b2a39 AG	474	}
	475
	476	static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
	477	{
e71b2a39 AG	478	int i;
	479
	480	dprintk("KVM MMU: slbia()\n");
	481
681562cd	482	for (i = 1; i < vcpu->arch.slb_nr; i++) {
c4befc58	483	vcpu->arch.slb[i].valid = false;
681562cd PM	484	vcpu->arch.slb[i].orige = 0;
	485	vcpu->arch.slb[i].origv = 0;
	486	}
e71b2a39	487
5deb8e7a	488	if (kvmppc_get_msr(vcpu) & MSR_IR) {
e71b2a39	489	kvmppc_mmu_flush_segments(vcpu);
c7f38f46	490	kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
e71b2a39 AG	491	}
	492	}
	493
	494	static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	495	ulong value)
	496	{
	497	u64 rb = 0, rs = 0;
	498
5279aeb4 AG	499	/*
	500	* According to Book3 2.01 mtsrin is implemented as:
	501	*
	502	* The SLB entry specified by (RB)32:35 is loaded from register
	503	* RS, as follows.
	504	*
	505	* SLBE Bit Source SLB Field
	506	*
	507	* 0:31 0x0000_0000 ESID-0:31
	508	* 32:35 (RB)32:35 ESID-32:35
	509	* 36 0b1 V
	510	* 37:61 0x00_0000\|\| 0b0 VSID-0:24
	511	* 62:88 (RS)37:63 VSID-25:51
	512	* 89:91 (RS)33:35 Ks Kp N
	513	* 92 (RS)36 L ((RS)36 must be 0b0)
	514	* 93 0b0 C
	515	*/
	516
	517	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
	518
e71b2a39 AG	519	/* ESID = srnum */
	520	rb \|= (srnum & 0xf) << 28;
	521	/* Set the valid bit */
	522	rb \|= 1 << 27;
	523	/* Index = ESID */
	524	rb \|= srnum;
	525
	526	/* VSID = VSID */
	527	rs \|= (value & 0xfffffff) << 12;
	528	/* flags = flags */
5279aeb4	529	rs \|= ((value >> 28) & 0x7) << 9;
e71b2a39 AG	530
	531	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
	532	}
	533
	534	static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
	535	bool large)
	536	{
	537	u64 mask = 0xFFFFFFFFFULL;
9308ab8e PM	538	long i;
9308ab8e PM	539	struct kvm_vcpu *v;
e71b2a39 AG	540
	541	dprintk("KVM MMU: tlbie(0x%lx)\n", va);
	542
a4a0f252 PM	543	/*
	544	* The tlbie instruction changed behaviour starting with
	545	* POWER6. POWER6 and later don't have the large page flag
	546	* in the instruction but in the RB value, along with bits
	547	* indicating page and segment sizes.
	548	*/
	549	if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) {
	550	/* POWER6 or later */
	551	if (va & 1) { /* L bit */
	552	if ((va & 0xf000) == 0x1000)
	553	mask = 0xFFFFFFFF0ULL; /* 64k page */
	554	else
	555	mask = 0xFFFFFF000ULL; /* 16M page */
	556	}
	557	} else {
	558	/* older processors, e.g. PPC970 */
	559	if (large)
	560	mask = 0xFFFFFF000ULL;
	561	}
9308ab8e PM	562	/* flush this VA on all vcpus */
	563	kvm_for_each_vcpu(i, v, vcpu->kvm)
	564	kvmppc_mmu_pte_vflush(v, va >> 12, mask);
e71b2a39 AG	565	}
e71b2a39 AG	566
c9029c34 PM	567	#ifdef CONFIG_PPC_64K_PAGES
	568	static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
	569	{
	570	ulong mp_ea = vcpu->arch.magic_page_ea;
	571
5deb8e7a	572	return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) &&
c9029c34 PM	573	(mp_ea >> SID_SHIFT) == esid;
	574	}
	575	#endif
	576
af7b4d10	577	static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
e71b2a39 AG	578	u64 *vsid)
e71b2a39 AG	579	{
f7bc74e1 AG	580	ulong ea = esid << SID_SHIFT;
	581	struct kvmppc_slb *slb;
	582	u64 gvsid = esid;
e8508940	583	ulong mp_ea = vcpu->arch.magic_page_ea;
c9029c34	584	int pagesize = MMU_PAGE_64K;
5deb8e7a	585	u64 msr = kvmppc_get_msr(vcpu);
f7bc74e1	586
5deb8e7a	587	if (msr & (MSR_DR\|MSR_IR)) {
c4befc58	588	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
0f296829	589	if (slb) {
f7bc74e1	590	gvsid = slb->vsid;
c9029c34	591	pagesize = slb->base_page_size;
0f296829 PM	592	if (slb->tb) {
	593	gvsid <<= SID_SHIFT_1T - SID_SHIFT;
	594	gvsid \|= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
	595	gvsid \|= VSID_1T;
	596	}
	597	}
f7bc74e1 AG	598	}
f7bc74e1 AG	599
5deb8e7a	600	switch (msr & (MSR_DR\|MSR_IR)) {
e71b2a39	601	case 0:
c9029c34	602	gvsid = VSID_REAL \| esid;
e71b2a39 AG	603	break;
e71b2a39 AG	604	case MSR_IR:
c9029c34	605	gvsid \|= VSID_REAL_IR;
e71b2a39 AG	606	break;
e71b2a39 AG	607	case MSR_DR:
c9029c34	608	gvsid \|= VSID_REAL_DR;
e71b2a39 AG	609	break;
e71b2a39 AG	610	case MSR_DR\|MSR_IR:
f7bc74e1	611	if (!slb)
e8508940	612	goto no_slb;
e71b2a39 AG	613
e71b2a39 AG	614	break;
e71b2a39 AG	615	default:
	616	BUG();
	617	break;
	618	}
	619
c9029c34 PM	620	#ifdef CONFIG_PPC_64K_PAGES
	621	/*
	622	* Mark this as a 64k segment if the host is using
	623	* 64k pages, the host MMU supports 64k pages and
	624	* the guest segment page size is >= 64k,
	625	* but not if this segment contains the magic page.
	626	*/
	627	if (pagesize >= MMU_PAGE_64K &&
	628	mmu_psize_defs[MMU_PAGE_64K].shift &&
	629	!segment_contains_magic_page(vcpu, esid))
	630	gvsid \|= VSID_64K;
	631	#endif
	632
5deb8e7a	633	if (kvmppc_get_msr(vcpu) & MSR_PR)
c9029c34	634	gvsid \|= VSID_PR;
63556441	635
c9029c34	636	*vsid = gvsid;
e71b2a39	637	return 0;
e8508940 AG	638
	639	no_slb:
	640	/* Catch magic page case */
	641	if (unlikely(mp_ea) &&
	642	unlikely(esid == (mp_ea >> SID_SHIFT)) &&
5deb8e7a	643	!(kvmppc_get_msr(vcpu) & MSR_PR)) {
e8508940 AG	644	*vsid = VSID_REAL \| esid;
	645	return 0;
	646	}
	647
	648	return -EINVAL;
e71b2a39 AG	649	}
	650
	651	static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
	652	{
	653	return (to_book3s(vcpu)->hid[5] & 0x80);
	654	}
	655
	656	void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
	657	{
	658	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	659
	660	mmu->mfsrin = NULL;
	661	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	662	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	663	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	664	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	665	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	666	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	667	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	668	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	669	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	670	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	671	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	672	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
e15a1137 AG	673
e15a1137 AG	674	vcpu->arch.hflags \|= BOOK3S_HFLAG_SLB;
e71b2a39	675	}