[deliverable/linux.git] / arch / powerpc / kvm / book3s_64_mmu.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/tlbflush.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>
#include <asm/mmu-hash64.h>

/* #define DEBUG_MMU */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, MSR_SF);
}

static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
				struct kvm_vcpu *vcpu,
				gva_t eaddr)
{
	int i;
	u64 esid = GET_ESID(eaddr);
	u64 esid_1t = GET_ESID_1T(eaddr);

	for (i = 0; i < vcpu->arch.slb_nr; i++) {
		u64 cmp_esid = esid;

		if (!vcpu->arch.slb[i].valid)
			continue;

		if (vcpu->arch.slb[i].tb)
			cmp_esid = esid_1t;

		if (vcpu->arch.slb[i].esid == cmp_esid)
			return &vcpu->arch.slb[i];
	}

	dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
		eaddr, esid, esid_1t);
	for (i = 0; i < vcpu->arch.slb_nr; i++) {
	    if (vcpu->arch.slb[i].vsid)
		dprintk("  %d: %c%c%c %llx %llx\n", i,
			vcpu->arch.slb[i].valid ? 'v' : ' ',
			vcpu->arch.slb[i].large ? 'l' : ' ',
			vcpu->arch.slb[i].tb    ? 't' : ' ',
			vcpu->arch.slb[i].esid,
			vcpu->arch.slb[i].vsid);
	}

	return NULL;
}

static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
{
	return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
}

static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
{
	return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
}

static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
{
	eaddr &= kvmppc_slb_offset_mask(slb);

	return (eaddr >> VPN_SHIFT) |
		((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
}

static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	struct kvmppc_slb *slb;

	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
	if (!slb)
		return 0;

	return kvmppc_slb_calc_vpn(slb, eaddr);
}

static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
{
	return slbe->large ? 24 : 12;
}

static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);

	return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
}

static hva_t kvmppc_mmu_book3s_64_get_pteg(
				struct kvmppc_vcpu_book3s *vcpu_book3s,
				struct kvmppc_slb *slbe, gva_t eaddr,
				bool second)
{
	u64 hash, pteg, htabsize;
	u32 ssize;
	hva_t r;
	u64 vpn;

	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);

	vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
	ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
	hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
	if (second)
		hash = ~hash;
	hash &= ((1ULL << 39ULL) - 1ULL);
	hash &= htabsize;
	hash <<= 7ULL;

	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	pteg |= hash;

	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
		page, vcpu_book3s->sdr1, pteg, slbe->vsid);

	/* When running a PAPR guest, SDR1 contains a HVA address instead
           of a GPA */
	if (vcpu_book3s->vcpu.arch.papr_enabled)
		r = pteg;
	else
		r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);

	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	u64 avpn;

	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);

	if (p < 24)
		avpn >>= ((80 - p) - 56) - 8;
	else
		avpn <<= 8;

	return avpn;
}

static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				struct kvmppc_pte *gpte, bool data)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_slb *slbe;
	hva_t ptegp;
	u64 pteg[16];
	u64 avpn = 0;
	int i;
	u8 key = 0;
	bool found = false;
	int second = 0;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	/* Magic page override */
	if (unlikely(mp_ea) &&
	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	    !(vcpu->arch.shared->msr & MSR_PR)) {
		gpte->eaddr = eaddr;
		gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
		gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
		gpte->raddr &= KVM_PAM;
		gpte->may_execute = true;
		gpte->may_read = true;
		gpte->may_write = true;

		return 0;
	}

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
	if (!slbe)
		goto no_seg_found;

	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
	if (slbe->tb)
		avpn |= SLB_VSID_B_1T;

do_second:
	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
	if (kvm_is_error_hva(ptegp))
		goto no_page_found;

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	if ((vcpu->arch.shared->msr & MSR_PR) && slbe->Kp)
		key = 4;
	else if (!(vcpu->arch.shared->msr & MSR_PR) && slbe->Ks)
		key = 4;

	for (i=0; i<16; i+=2) {
		u64 v = pteg[i];
		u64 r = pteg[i+1];

		/* Valid check */
		if (!(v & HPTE_V_VALID))
			continue;
		/* Hash check */
		if ((v & HPTE_V_SECONDARY) != second)
			continue;

		/* AVPN compare */
		if (HPTE_V_COMPARE(avpn, v)) {
			u8 pp = (r & HPTE_R_PP) | key;
			int eaddr_mask = 0xFFF;

			gpte->eaddr = eaddr;
			gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
								    eaddr,
								    data);
			if (slbe->large)
				eaddr_mask = 0xFFFFFF;
			gpte->raddr = (r & HPTE_R_RPN) | (eaddr & eaddr_mask);
			gpte->may_execute = ((r & HPTE_R_N) ? false : true);
			gpte->may_read = false;
			gpte->may_write = false;

			switch (pp) {
			case 0:
			case 1:
			case 2:
			case 6:
				gpte->may_write = true;
				/* fall through */
			case 3:
			case 5:
			case 7:
				gpte->may_read = true;
				break;
			}

			dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
				"-> 0x%lx\n",
				eaddr, avpn, gpte->vpage, gpte->raddr);
			found = true;
			break;
		}
	}

	/* Update PTE R and C bits, so the guest's swapper knows we used the
	 * page */
	if (found) {
		u32 oldr = pteg[i+1];

		if (gpte->may_read) {
			/* Set the accessed flag */
			pteg[i+1] |= HPTE_R_R;
		}
		if (gpte->may_write) {
			/* Set the dirty flag */
			pteg[i+1] |= HPTE_R_C;
		} else {
			dprintk("KVM: Mapping read-only page!\n");
		}

		/* Write back into the PTEG */
		if (pteg[i+1] != oldr)
			copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));

		if (!gpte->may_read)
			return -EPERM;
		return 0;
	} else {
		dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
			"ptegp=0x%lx)\n",
			eaddr, to_book3s(vcpu)->sdr1, ptegp);
		for (i = 0; i < 16; i += 2)
			dprintk("   %02d: 0x%llx - 0x%llx (0x%llx)\n",
				i, pteg[i], pteg[i+1], avpn);

		if (!second) {
			second = HPTE_V_SECONDARY;
			goto do_second;
		}
	}

no_page_found:
	return -ENOENT;

no_seg_found:

	dprintk("KVM MMU: Trigger segment fault\n");
	return -EINVAL;
}

static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	u64 esid, esid_1t;
	int slb_nr;
	struct kvmppc_slb *slbe;

	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);

	vcpu_book3s = to_book3s(vcpu);

	esid = GET_ESID(rb);
	esid_1t = GET_ESID_1T(rb);
	slb_nr = rb & 0xfff;

	if (slb_nr > vcpu->arch.slb_nr)
		return;

	slbe = &vcpu->arch.slb[slb_nr];

	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
	slbe->tb    = (rs & SLB_VSID_B_1T) ? 1 : 0;
	slbe->esid  = slbe->tb ? esid_1t : esid;
	slbe->vsid  = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	slbe->Ks    = (rs & SLB_VSID_KS) ? 1 : 0;
	slbe->Kp    = (rs & SLB_VSID_KP) ? 1 : 0;
	slbe->nx    = (rs & SLB_VSID_N) ? 1 : 0;
	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;

	slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
	slbe->origv = rs;

	/* Map the new segment */
	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
}

static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu->arch.slb_nr)
		return 0;

	slbe = &vcpu->arch.slb[slb_nr];

	return slbe->orige;
}

static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu->arch.slb_nr)
		return 0;

	slbe = &vcpu->arch.slb[slb_nr];

	return slbe->origv;
}

static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
{
	struct kvmppc_slb *slbe;
	u64 seg_size;

	dprintk("KVM MMU: slbie(0x%llx)\n", ea);

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);

	if (!slbe)
		return;

	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);

	slbe->valid = false;
	slbe->orige = 0;
	slbe->origv = 0;

	seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
	kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
}

static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
{
	int i;

	dprintk("KVM MMU: slbia()\n");

	for (i = 1; i < vcpu->arch.slb_nr; i++) {
		vcpu->arch.slb[i].valid = false;
		vcpu->arch.slb[i].orige = 0;
		vcpu->arch.slb[i].origv = 0;
	}

	if (vcpu->arch.shared->msr & MSR_IR) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
	}
}

static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	u64 rb = 0, rs = 0;

	/*
	 * According to Book3 2.01 mtsrin is implemented as:
	 *
	 * The SLB entry specified by (RB)32:35 is loaded from register
	 * RS, as follows.
	 *
	 * SLBE Bit	Source			SLB Field
	 *
	 * 0:31		0x0000_0000		ESID-0:31
	 * 32:35	(RB)32:35		ESID-32:35
	 * 36		0b1			V
	 * 37:61	0x00_0000|| 0b0		VSID-0:24
	 * 62:88	(RS)37:63		VSID-25:51
	 * 89:91	(RS)33:35		Ks Kp N
	 * 92		(RS)36			L ((RS)36 must be 0b0)
	 * 93		0b0			C
	 */

	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);

	/* ESID = srnum */
	rb |= (srnum & 0xf) << 28;
	/* Set the valid bit */
	rb |= 1 << 27;
	/* Index = ESID */
	rb |= srnum;

	/* VSID = VSID */
	rs |= (value & 0xfffffff) << 12;
	/* flags = flags */
	rs |= ((value >> 28) & 0x7) << 9;

	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
}

static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
				       bool large)
{
	u64 mask = 0xFFFFFFFFFULL;

	dprintk("KVM MMU: tlbie(0x%lx)\n", va);

	if (large)
		mask = 0xFFFFFF000ULL;
	kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
}

static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid)
{
	ulong ea = esid << SID_SHIFT;
	struct kvmppc_slb *slb;
	u64 gvsid = esid;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
		slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
		if (slb) {
			gvsid = slb->vsid;
			if (slb->tb) {
				gvsid <<= SID_SHIFT_1T - SID_SHIFT;
				gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
				gvsid |= VSID_1T;
			}
		}
	}

	switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
	case 0:
		*vsid = VSID_REAL | esid;
		break;
	case MSR_IR:
		*vsid = VSID_REAL_IR | gvsid;
		break;
	case MSR_DR:
		*vsid = VSID_REAL_DR | gvsid;
		break;
	case MSR_DR|MSR_IR:
		if (!slb)
			goto no_slb;

		*vsid = gvsid;
		break;
	default:
		BUG();
		break;
	}

	if (vcpu->arch.shared->msr & MSR_PR)
		*vsid |= VSID_PR;

	return 0;

no_slb:
	/* Catch magic page case */
	if (unlikely(mp_ea) &&
	    unlikely(esid == (mp_ea >> SID_SHIFT)) &&
	    !(vcpu->arch.shared->msr & MSR_PR)) {
		*vsid = VSID_REAL | esid;
		return 0;
	}

	return -EINVAL;
}

static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return (to_book3s(vcpu)->hid[5] & 0x80);
}

void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mfsrin = NULL;
	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
}
Commit	Line	Data
e71b2a39 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <linux/types.h>
	21	#include <linux/string.h>
	22	#include <linux/kvm.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/highmem.h>
	25
	26	#include <asm/tlbflush.h>
	27	#include <asm/kvm_ppc.h>
	28	#include <asm/kvm_book3s.h>
0f296829	29	#include <asm/mmu-hash64.h>
e71b2a39 AG	30
	31	/* #define DEBUG_MMU */
	32
	33	#ifdef DEBUG_MMU
	34	#define dprintk(X...) printk(KERN_INFO X)
	35	#else
	36	#define dprintk(X...) do { } while(0)
	37	#endif
	38
	39	static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
	40	{
	41	kvmppc_set_msr(vcpu, MSR_SF);
	42	}
	43
	44	static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
c4befc58	45	struct kvm_vcpu *vcpu,
e71b2a39 AG	46	gva_t eaddr)
	47	{
	48	int i;
	49	u64 esid = GET_ESID(eaddr);
	50	u64 esid_1t = GET_ESID_1T(eaddr);
	51
c4befc58	52	for (i = 0; i < vcpu->arch.slb_nr; i++) {
e71b2a39 AG	53	u64 cmp_esid = esid;
e71b2a39 AG	54
c4befc58	55	if (!vcpu->arch.slb[i].valid)
e71b2a39 AG	56	continue;
e71b2a39 AG	57
c4befc58	58	if (vcpu->arch.slb[i].tb)
e71b2a39 AG	59	cmp_esid = esid_1t;
e71b2a39 AG	60
c4befc58 PM	61	if (vcpu->arch.slb[i].esid == cmp_esid)
c4befc58 PM	62	return &vcpu->arch.slb[i];
e71b2a39 AG	63	}
	64
	65	dprintk("KVM: No SLB entry found for 0x%lx [%llx \| %llx]\n",
	66	eaddr, esid, esid_1t);
c4befc58 PM	67	for (i = 0; i < vcpu->arch.slb_nr; i++) {
c4befc58 PM	68	if (vcpu->arch.slb[i].vsid)
4b5c9b7f	69	dprintk(" %d: %c%c%c %llx %llx\n", i,
c4befc58 PM	70	vcpu->arch.slb[i].valid ? 'v' : ' ',
	71	vcpu->arch.slb[i].large ? 'l' : ' ',
	72	vcpu->arch.slb[i].tb ? 't' : ' ',
	73	vcpu->arch.slb[i].esid,
	74	vcpu->arch.slb[i].vsid);
e71b2a39 AG	75	}
	76
	77	return NULL;
	78	}
	79
0f296829 PM	80	static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
	81	{
	82	return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
	83	}
	84
	85	static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
	86	{
	87	return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
	88	}
	89
	90	static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
	91	{
	92	eaddr &= kvmppc_slb_offset_mask(slb);
	93
	94	return (eaddr >> VPN_SHIFT) \|
	95	((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
	96	}
	97
e71b2a39 AG	98	static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	99	bool data)
	100	{
	101	struct kvmppc_slb *slb;
	102
c4befc58	103	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
e71b2a39 AG	104	if (!slb)
	105	return 0;
	106
0f296829	107	return kvmppc_slb_calc_vpn(slb, eaddr);
e71b2a39 AG	108	}
	109
	110	static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
	111	{
	112	return slbe->large ? 24 : 12;
	113	}
	114
	115	static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
	116	{
	117	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
0f296829 PM	118
0f296829 PM	119	return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
e71b2a39 AG	120	}
	121
	122	static hva_t kvmppc_mmu_book3s_64_get_pteg(
	123	struct kvmppc_vcpu_book3s *vcpu_book3s,
	124	struct kvmppc_slb *slbe, gva_t eaddr,
	125	bool second)
	126	{
	127	u64 hash, pteg, htabsize;
0f296829	128	u32 ssize;
e71b2a39	129	hva_t r;
0f296829	130	u64 vpn;
e71b2a39	131
e71b2a39 AG	132	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
e71b2a39 AG	133
0f296829 PM	134	vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
	135	ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
	136	hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
e71b2a39 AG	137	if (second)
	138	hash = ~hash;
	139	hash &= ((1ULL << 39ULL) - 1ULL);
	140	hash &= htabsize;
	141	hash <<= 7ULL;
	142
	143	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	144	pteg \|= hash;
	145
	146	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
	147	page, vcpu_book3s->sdr1, pteg, slbe->vsid);
	148
04fcc11b AG	149	/* When running a PAPR guest, SDR1 contains a HVA address instead
	150	of a GPA */
	151	if (vcpu_book3s->vcpu.arch.papr_enabled)
	152	r = pteg;
	153	else
	154	r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
	155
e71b2a39 AG	156	if (kvm_is_error_hva(r))
	157	return r;
	158	return r \| (pteg & ~PAGE_MASK);
	159	}
	160
	161	static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
	162	{
	163	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	164	u64 avpn;
	165
	166	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
0f296829	167	avpn \|= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);
e71b2a39 AG	168
	169	if (p < 24)
	170	avpn >>= ((80 - p) - 56) - 8;
	171	else
	172	avpn <<= 8;
	173
	174	return avpn;
	175	}
	176
	177	static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
	178	struct kvmppc_pte *gpte, bool data)
	179	{
	180	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	181	struct kvmppc_slb *slbe;
	182	hva_t ptegp;
	183	u64 pteg[16];
	184	u64 avpn = 0;
	185	int i;
	186	u8 key = 0;
	187	bool found = false;
e71b2a39	188	int second = 0;
e8508940 AG	189	ulong mp_ea = vcpu->arch.magic_page_ea;
	190
	191	/* Magic page override */
	192	if (unlikely(mp_ea) &&
	193	unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	194	!(vcpu->arch.shared->msr & MSR_PR)) {
	195	gpte->eaddr = eaddr;
	196	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
	197	gpte->raddr = vcpu->arch.magic_page_pa \| (gpte->raddr & 0xfff);
	198	gpte->raddr &= KVM_PAM;
	199	gpte->may_execute = true;
	200	gpte->may_read = true;
	201	gpte->may_write = true;
	202
	203	return 0;
	204	}
e71b2a39	205
c4befc58	206	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
e71b2a39 AG	207	if (!slbe)
	208	goto no_seg_found;
	209
0f296829 PM	210	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
	211	if (slbe->tb)
	212	avpn \|= SLB_VSID_B_1T;
	213
e71b2a39 AG	214	do_second:
	215	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
	216	if (kvm_is_error_hva(ptegp))
	217	goto no_page_found;
	218
e71b2a39 AG	219	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
	220	printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
	221	goto no_page_found;
	222	}
	223
666e7252	224	if ((vcpu->arch.shared->msr & MSR_PR) && slbe->Kp)
e71b2a39	225	key = 4;
666e7252	226	else if (!(vcpu->arch.shared->msr & MSR_PR) && slbe->Ks)
e71b2a39 AG	227	key = 4;
	228
	229	for (i=0; i<16; i+=2) {
	230	u64 v = pteg[i];
	231	u64 r = pteg[i+1];
	232
	233	/* Valid check */
	234	if (!(v & HPTE_V_VALID))
	235	continue;
	236	/* Hash check */
	237	if ((v & HPTE_V_SECONDARY) != second)
	238	continue;
	239
	240	/* AVPN compare */
0f296829	241	if (HPTE_V_COMPARE(avpn, v)) {
e71b2a39 AG	242	u8 pp = (r & HPTE_R_PP) \| key;
	243	int eaddr_mask = 0xFFF;
	244
	245	gpte->eaddr = eaddr;
	246	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
	247	eaddr,
	248	data);
	249	if (slbe->large)
	250	eaddr_mask = 0xFFFFFF;
	251	gpte->raddr = (r & HPTE_R_RPN) \| (eaddr & eaddr_mask);
	252	gpte->may_execute = ((r & HPTE_R_N) ? false : true);
	253	gpte->may_read = false;
	254	gpte->may_write = false;
	255
	256	switch (pp) {
	257	case 0:
	258	case 1:
	259	case 2:
	260	case 6:
	261	gpte->may_write = true;
	262	/* fall through */
	263	case 3:
	264	case 5:
	265	case 7:
	266	gpte->may_read = true;
	267	break;
	268	}
	269
e71b2a39	270	dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
af7b4d10	271	"-> 0x%lx\n",
e71b2a39 AG	272	eaddr, avpn, gpte->vpage, gpte->raddr);
	273	found = true;
	274	break;
	275	}
	276	}
	277
	278	/* Update PTE R and C bits, so the guest's swapper knows we used the
	279	* page */
	280	if (found) {
	281	u32 oldr = pteg[i+1];
	282
	283	if (gpte->may_read) {
	284	/* Set the accessed flag */
	285	pteg[i+1] \|= HPTE_R_R;
	286	}
	287	if (gpte->may_write) {
	288	/* Set the dirty flag */
	289	pteg[i+1] \|= HPTE_R_C;
	290	} else {
	291	dprintk("KVM: Mapping read-only page!\n");
	292	}
	293
	294	/* Write back into the PTEG */
	295	if (pteg[i+1] != oldr)
	296	copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));
	297
6ed1485f PM	298	if (!gpte->may_read)
6ed1485f PM	299	return -EPERM;
e71b2a39 AG	300	return 0;
	301	} else {
	302	dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
	303	"ptegp=0x%lx)\n",
	304	eaddr, to_book3s(vcpu)->sdr1, ptegp);
	305	for (i = 0; i < 16; i += 2)
	306	dprintk(" %02d: 0x%llx - 0x%llx (0x%llx)\n",
	307	i, pteg[i], pteg[i+1], avpn);
	308
	309	if (!second) {
	310	second = HPTE_V_SECONDARY;
	311	goto do_second;
	312	}
	313	}
	314
e71b2a39	315	no_page_found:
e71b2a39 AG	316	return -ENOENT;
	317
	318	no_seg_found:
	319
	320	dprintk("KVM MMU: Trigger segment fault\n");
	321	return -EINVAL;
	322	}
	323
	324	static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
	325	{
	326	struct kvmppc_vcpu_book3s *vcpu_book3s;
	327	u64 esid, esid_1t;
	328	int slb_nr;
	329	struct kvmppc_slb *slbe;
	330
	331	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
	332
	333	vcpu_book3s = to_book3s(vcpu);
	334
	335	esid = GET_ESID(rb);
	336	esid_1t = GET_ESID_1T(rb);
	337	slb_nr = rb & 0xfff;
	338
c4befc58	339	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	340	return;
e71b2a39 AG	341
c4befc58	342	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	343
e71b2a39 AG	344	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
4b5c9b7f AG	345	slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
4b5c9b7f AG	346	slbe->esid = slbe->tb ? esid_1t : esid;
0f296829	347	slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
e71b2a39 AG	348	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	349	slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
	350	slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
	351	slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
	352	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
	353
	354	slbe->orige = rb & (ESID_MASK \| SLB_ESID_V);
	355	slbe->origv = rs;
	356
	357	/* Map the new segment */
	358	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
	359	}
	360
	361	static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
	362	{
e71b2a39 AG	363	struct kvmppc_slb *slbe;
e71b2a39 AG	364
c4befc58	365	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	366	return 0;
e71b2a39 AG	367
c4befc58	368	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	369
	370	return slbe->orige;
	371	}
	372
	373	static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
	374	{
e71b2a39 AG	375	struct kvmppc_slb *slbe;
e71b2a39 AG	376
c4befc58	377	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	378	return 0;
e71b2a39 AG	379
c4befc58	380	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	381
	382	return slbe->origv;
	383	}
	384
	385	static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
	386	{
e71b2a39	387	struct kvmppc_slb *slbe;
0f296829	388	u64 seg_size;
e71b2a39 AG	389
	390	dprintk("KVM MMU: slbie(0x%llx)\n", ea);
	391
c4befc58	392	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
e71b2a39 AG	393
	394	if (!slbe)
	395	return;
	396
	397	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
	398
	399	slbe->valid = false;
681562cd PM	400	slbe->orige = 0;
681562cd PM	401	slbe->origv = 0;
e71b2a39	402
0f296829 PM	403	seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
0f296829 PM	404	kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
e71b2a39 AG	405	}
	406
	407	static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
	408	{
e71b2a39 AG	409	int i;
	410
	411	dprintk("KVM MMU: slbia()\n");
	412
681562cd	413	for (i = 1; i < vcpu->arch.slb_nr; i++) {
c4befc58	414	vcpu->arch.slb[i].valid = false;
681562cd PM	415	vcpu->arch.slb[i].orige = 0;
	416	vcpu->arch.slb[i].origv = 0;
	417	}
e71b2a39	418
666e7252	419	if (vcpu->arch.shared->msr & MSR_IR) {
e71b2a39	420	kvmppc_mmu_flush_segments(vcpu);
c7f38f46	421	kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
e71b2a39 AG	422	}
	423	}
	424
	425	static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	426	ulong value)
	427	{
	428	u64 rb = 0, rs = 0;
	429
5279aeb4 AG	430	/*
	431	* According to Book3 2.01 mtsrin is implemented as:
	432	*
	433	* The SLB entry specified by (RB)32:35 is loaded from register
	434	* RS, as follows.
	435	*
	436	* SLBE Bit Source SLB Field
	437	*
	438	* 0:31 0x0000_0000 ESID-0:31
	439	* 32:35 (RB)32:35 ESID-32:35
	440	* 36 0b1 V
	441	* 37:61 0x00_0000\|\| 0b0 VSID-0:24
	442	* 62:88 (RS)37:63 VSID-25:51
	443	* 89:91 (RS)33:35 Ks Kp N
	444	* 92 (RS)36 L ((RS)36 must be 0b0)
	445	* 93 0b0 C
	446	*/
	447
	448	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
	449
e71b2a39 AG	450	/* ESID = srnum */
	451	rb \|= (srnum & 0xf) << 28;
	452	/* Set the valid bit */
	453	rb \|= 1 << 27;
	454	/* Index = ESID */
	455	rb \|= srnum;
	456
	457	/* VSID = VSID */
	458	rs \|= (value & 0xfffffff) << 12;
	459	/* flags = flags */
5279aeb4	460	rs \|= ((value >> 28) & 0x7) << 9;
e71b2a39 AG	461
	462	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
	463	}
	464
	465	static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
	466	bool large)
	467	{
	468	u64 mask = 0xFFFFFFFFFULL;
	469
	470	dprintk("KVM MMU: tlbie(0x%lx)\n", va);
	471
	472	if (large)
	473	mask = 0xFFFFFF000ULL;
	474	kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
	475	}
	476
af7b4d10	477	static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
e71b2a39 AG	478	u64 *vsid)
e71b2a39 AG	479	{
f7bc74e1 AG	480	ulong ea = esid << SID_SHIFT;
	481	struct kvmppc_slb *slb;
	482	u64 gvsid = esid;
e8508940	483	ulong mp_ea = vcpu->arch.magic_page_ea;
f7bc74e1	484
666e7252	485	if (vcpu->arch.shared->msr & (MSR_DR\|MSR_IR)) {
c4befc58	486	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
0f296829	487	if (slb) {
f7bc74e1	488	gvsid = slb->vsid;
0f296829 PM	489	if (slb->tb) {
	490	gvsid <<= SID_SHIFT_1T - SID_SHIFT;
	491	gvsid \|= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
	492	gvsid \|= VSID_1T;
	493	}
	494	}
f7bc74e1 AG	495	}
f7bc74e1 AG	496
666e7252	497	switch (vcpu->arch.shared->msr & (MSR_DR\|MSR_IR)) {
e71b2a39	498	case 0:
f7bc74e1	499	*vsid = VSID_REAL \| esid;
e71b2a39 AG	500	break;
e71b2a39 AG	501	case MSR_IR:
f7bc74e1	502	*vsid = VSID_REAL_IR \| gvsid;
e71b2a39 AG	503	break;
e71b2a39 AG	504	case MSR_DR:
f7bc74e1	505	*vsid = VSID_REAL_DR \| gvsid;
e71b2a39 AG	506	break;
e71b2a39 AG	507	case MSR_DR\|MSR_IR:
f7bc74e1	508	if (!slb)
e8508940	509	goto no_slb;
e71b2a39	510
f7bc74e1	511	*vsid = gvsid;
e71b2a39	512	break;
e71b2a39 AG	513	default:
	514	BUG();
	515	break;
	516	}
	517
666e7252	518	if (vcpu->arch.shared->msr & MSR_PR)
63556441 AG	519	*vsid \|= VSID_PR;
63556441 AG	520
e71b2a39	521	return 0;
e8508940 AG	522
	523	no_slb:
	524	/* Catch magic page case */
	525	if (unlikely(mp_ea) &&
	526	unlikely(esid == (mp_ea >> SID_SHIFT)) &&
	527	!(vcpu->arch.shared->msr & MSR_PR)) {
	528	*vsid = VSID_REAL \| esid;
	529	return 0;
	530	}
	531
	532	return -EINVAL;
e71b2a39 AG	533	}
	534
	535	static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
	536	{
	537	return (to_book3s(vcpu)->hid[5] & 0x80);
	538	}
	539
	540	void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
	541	{
	542	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	543
	544	mmu->mfsrin = NULL;
	545	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	546	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	547	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	548	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	549	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	550	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	551	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	552	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	553	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	554	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	555	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	556	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
e15a1137 AG	557
e15a1137 AG	558	vcpu->arch.hflags \|= BOOK3S_HFLAG_SLB;
e71b2a39	559	}