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f05ed4d5 PM |
1 | /* |
2 | * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. | |
3 | * | |
4 | * Authors: | |
5 | * Alexander Graf <agraf@suse.de> | |
6 | * Kevin Wolf <mail@kevin-wolf.de> | |
7 | * Paul Mackerras <paulus@samba.org> | |
8 | * | |
9 | * Description: | |
10 | * Functions relating to running KVM on Book 3S processors where | |
11 | * we don't have access to hypervisor mode, and we run the guest | |
12 | * in problem state (user mode). | |
13 | * | |
14 | * This file is derived from arch/powerpc/kvm/44x.c, | |
15 | * by Hollis Blanchard <hollisb@us.ibm.com>. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License, version 2, as | |
19 | * published by the Free Software Foundation. | |
20 | */ | |
21 | ||
22 | #include <linux/kvm_host.h> | |
93087948 | 23 | #include <linux/export.h> |
f05ed4d5 PM |
24 | #include <linux/err.h> |
25 | #include <linux/slab.h> | |
26 | ||
27 | #include <asm/reg.h> | |
28 | #include <asm/cputable.h> | |
29 | #include <asm/cacheflush.h> | |
30 | #include <asm/tlbflush.h> | |
31 | #include <asm/uaccess.h> | |
32 | #include <asm/io.h> | |
33 | #include <asm/kvm_ppc.h> | |
34 | #include <asm/kvm_book3s.h> | |
35 | #include <asm/mmu_context.h> | |
95327d08 | 36 | #include <asm/switch_to.h> |
f05ed4d5 PM |
37 | #include <linux/gfp.h> |
38 | #include <linux/sched.h> | |
39 | #include <linux/vmalloc.h> | |
40 | #include <linux/highmem.h> | |
41 | ||
42 | #include "trace.h" | |
43 | ||
44 | /* #define EXIT_DEBUG */ | |
45 | /* #define DEBUG_EXT */ | |
46 | ||
47 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, | |
48 | ulong msr); | |
49 | ||
50 | /* Some compatibility defines */ | |
51 | #ifdef CONFIG_PPC_BOOK3S_32 | |
52 | #define MSR_USER32 MSR_USER | |
53 | #define MSR_USER64 MSR_USER | |
54 | #define HW_PAGE_SIZE PAGE_SIZE | |
55 | #endif | |
56 | ||
57 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |
58 | { | |
59 | #ifdef CONFIG_PPC_BOOK3S_64 | |
468a12c2 AG |
60 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
61 | memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb)); | |
f05ed4d5 PM |
62 | memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu, |
63 | sizeof(get_paca()->shadow_vcpu)); | |
468a12c2 AG |
64 | svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max; |
65 | svcpu_put(svcpu); | |
f05ed4d5 | 66 | #endif |
a47d72f3 | 67 | vcpu->cpu = smp_processor_id(); |
f05ed4d5 PM |
68 | #ifdef CONFIG_PPC_BOOK3S_32 |
69 | current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu; | |
70 | #endif | |
71 | } | |
72 | ||
73 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) | |
74 | { | |
75 | #ifdef CONFIG_PPC_BOOK3S_64 | |
468a12c2 AG |
76 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
77 | memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb)); | |
f05ed4d5 PM |
78 | memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu, |
79 | sizeof(get_paca()->shadow_vcpu)); | |
468a12c2 AG |
80 | to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max; |
81 | svcpu_put(svcpu); | |
f05ed4d5 PM |
82 | #endif |
83 | ||
84 | kvmppc_giveup_ext(vcpu, MSR_FP); | |
85 | kvmppc_giveup_ext(vcpu, MSR_VEC); | |
86 | kvmppc_giveup_ext(vcpu, MSR_VSX); | |
a47d72f3 | 87 | vcpu->cpu = -1; |
f05ed4d5 PM |
88 | } |
89 | ||
7c973a2e | 90 | int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) |
03d25c5b | 91 | { |
7c973a2e AG |
92 | int r = 1; /* Indicate we want to get back into the guest */ |
93 | ||
9b0cb3c8 AG |
94 | /* We misuse TLB_FLUSH to indicate that we want to clear |
95 | all shadow cache entries */ | |
96 | if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) | |
97 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | |
7c973a2e AG |
98 | |
99 | return r; | |
03d25c5b AG |
100 | } |
101 | ||
9b0cb3c8 AG |
102 | /************* MMU Notifiers *************/ |
103 | ||
104 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
105 | { | |
106 | trace_kvm_unmap_hva(hva); | |
107 | ||
108 | /* | |
109 | * Flush all shadow tlb entries everywhere. This is slow, but | |
110 | * we are 100% sure that we catch the to be unmapped page | |
111 | */ | |
112 | kvm_flush_remote_tlbs(kvm); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) | |
118 | { | |
119 | /* kvm_unmap_hva flushes everything anyways */ | |
120 | kvm_unmap_hva(kvm, start); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
126 | { | |
127 | /* XXX could be more clever ;) */ | |
128 | return 0; | |
129 | } | |
130 | ||
131 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
132 | { | |
133 | /* XXX could be more clever ;) */ | |
134 | return 0; | |
135 | } | |
136 | ||
137 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
138 | { | |
139 | /* The page will get remapped properly on its next fault */ | |
140 | kvm_unmap_hva(kvm, hva); | |
141 | } | |
142 | ||
143 | /*****************************************/ | |
144 | ||
f05ed4d5 PM |
145 | static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) |
146 | { | |
147 | ulong smsr = vcpu->arch.shared->msr; | |
148 | ||
149 | /* Guest MSR values */ | |
150 | smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE; | |
151 | /* Process MSR values */ | |
152 | smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; | |
153 | /* External providers the guest reserved */ | |
154 | smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext); | |
155 | /* 64-bit Process MSR values */ | |
156 | #ifdef CONFIG_PPC_BOOK3S_64 | |
157 | smsr |= MSR_ISF | MSR_HV; | |
158 | #endif | |
159 | vcpu->arch.shadow_msr = smsr; | |
160 | } | |
161 | ||
162 | void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) | |
163 | { | |
164 | ulong old_msr = vcpu->arch.shared->msr; | |
165 | ||
166 | #ifdef EXIT_DEBUG | |
167 | printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); | |
168 | #endif | |
169 | ||
170 | msr &= to_book3s(vcpu)->msr_mask; | |
171 | vcpu->arch.shared->msr = msr; | |
172 | kvmppc_recalc_shadow_msr(vcpu); | |
173 | ||
174 | if (msr & MSR_POW) { | |
175 | if (!vcpu->arch.pending_exceptions) { | |
176 | kvm_vcpu_block(vcpu); | |
966cd0f3 | 177 | clear_bit(KVM_REQ_UNHALT, &vcpu->requests); |
f05ed4d5 PM |
178 | vcpu->stat.halt_wakeup++; |
179 | ||
180 | /* Unset POW bit after we woke up */ | |
181 | msr &= ~MSR_POW; | |
182 | vcpu->arch.shared->msr = msr; | |
183 | } | |
184 | } | |
185 | ||
186 | if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) != | |
187 | (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { | |
188 | kvmppc_mmu_flush_segments(vcpu); | |
189 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); | |
190 | ||
191 | /* Preload magic page segment when in kernel mode */ | |
192 | if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) { | |
193 | struct kvm_vcpu_arch *a = &vcpu->arch; | |
194 | ||
195 | if (msr & MSR_DR) | |
196 | kvmppc_mmu_map_segment(vcpu, a->magic_page_ea); | |
197 | else | |
198 | kvmppc_mmu_map_segment(vcpu, a->magic_page_pa); | |
199 | } | |
200 | } | |
201 | ||
bbcc9c06 BH |
202 | /* |
203 | * When switching from 32 to 64-bit, we may have a stale 32-bit | |
204 | * magic page around, we need to flush it. Typically 32-bit magic | |
205 | * page will be instanciated when calling into RTAS. Note: We | |
206 | * assume that such transition only happens while in kernel mode, | |
207 | * ie, we never transition from user 32-bit to kernel 64-bit with | |
208 | * a 32-bit magic page around. | |
209 | */ | |
210 | if (vcpu->arch.magic_page_pa && | |
211 | !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) { | |
212 | /* going from RTAS to normal kernel code */ | |
213 | kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa, | |
214 | ~0xFFFUL); | |
215 | } | |
216 | ||
f05ed4d5 PM |
217 | /* Preload FPU if it's enabled */ |
218 | if (vcpu->arch.shared->msr & MSR_FP) | |
219 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); | |
220 | } | |
221 | ||
222 | void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) | |
223 | { | |
224 | u32 host_pvr; | |
225 | ||
226 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; | |
227 | vcpu->arch.pvr = pvr; | |
228 | #ifdef CONFIG_PPC_BOOK3S_64 | |
229 | if ((pvr >= 0x330000) && (pvr < 0x70330000)) { | |
230 | kvmppc_mmu_book3s_64_init(vcpu); | |
1022fc3d AG |
231 | if (!to_book3s(vcpu)->hior_explicit) |
232 | to_book3s(vcpu)->hior = 0xfff00000; | |
f05ed4d5 | 233 | to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; |
af8f38b3 | 234 | vcpu->arch.cpu_type = KVM_CPU_3S_64; |
f05ed4d5 PM |
235 | } else |
236 | #endif | |
237 | { | |
238 | kvmppc_mmu_book3s_32_init(vcpu); | |
1022fc3d AG |
239 | if (!to_book3s(vcpu)->hior_explicit) |
240 | to_book3s(vcpu)->hior = 0; | |
f05ed4d5 | 241 | to_book3s(vcpu)->msr_mask = 0xffffffffULL; |
af8f38b3 | 242 | vcpu->arch.cpu_type = KVM_CPU_3S_32; |
f05ed4d5 PM |
243 | } |
244 | ||
af8f38b3 AG |
245 | kvmppc_sanity_check(vcpu); |
246 | ||
f05ed4d5 PM |
247 | /* If we are in hypervisor level on 970, we can tell the CPU to |
248 | * treat DCBZ as 32 bytes store */ | |
249 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32; | |
250 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) && | |
251 | !strcmp(cur_cpu_spec->platform, "ppc970")) | |
252 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | |
253 | ||
254 | /* Cell performs badly if MSR_FEx are set. So let's hope nobody | |
255 | really needs them in a VM on Cell and force disable them. */ | |
256 | if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) | |
257 | to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); | |
258 | ||
259 | #ifdef CONFIG_PPC_BOOK3S_32 | |
260 | /* 32 bit Book3S always has 32 byte dcbz */ | |
261 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | |
262 | #endif | |
263 | ||
264 | /* On some CPUs we can execute paired single operations natively */ | |
265 | asm ( "mfpvr %0" : "=r"(host_pvr)); | |
266 | switch (host_pvr) { | |
267 | case 0x00080200: /* lonestar 2.0 */ | |
268 | case 0x00088202: /* lonestar 2.2 */ | |
269 | case 0x70000100: /* gekko 1.0 */ | |
270 | case 0x00080100: /* gekko 2.0 */ | |
271 | case 0x00083203: /* gekko 2.3a */ | |
272 | case 0x00083213: /* gekko 2.3b */ | |
273 | case 0x00083204: /* gekko 2.4 */ | |
274 | case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ | |
275 | case 0x00087200: /* broadway */ | |
276 | vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; | |
277 | /* Enable HID2.PSE - in case we need it later */ | |
278 | mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); | |
279 | } | |
280 | } | |
281 | ||
282 | /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To | |
283 | * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to | |
284 | * emulate 32 bytes dcbz length. | |
285 | * | |
286 | * The Book3s_64 inventors also realized this case and implemented a special bit | |
287 | * in the HID5 register, which is a hypervisor ressource. Thus we can't use it. | |
288 | * | |
289 | * My approach here is to patch the dcbz instruction on executing pages. | |
290 | */ | |
291 | static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) | |
292 | { | |
293 | struct page *hpage; | |
294 | u64 hpage_offset; | |
295 | u32 *page; | |
296 | int i; | |
297 | ||
298 | hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); | |
32cad84f | 299 | if (is_error_page(hpage)) |
f05ed4d5 | 300 | return; |
f05ed4d5 PM |
301 | |
302 | hpage_offset = pte->raddr & ~PAGE_MASK; | |
303 | hpage_offset &= ~0xFFFULL; | |
304 | hpage_offset /= 4; | |
305 | ||
306 | get_page(hpage); | |
2480b208 | 307 | page = kmap_atomic(hpage); |
f05ed4d5 PM |
308 | |
309 | /* patch dcbz into reserved instruction, so we trap */ | |
310 | for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) | |
311 | if ((page[i] & 0xff0007ff) == INS_DCBZ) | |
312 | page[i] &= 0xfffffff7; | |
313 | ||
2480b208 | 314 | kunmap_atomic(page); |
f05ed4d5 PM |
315 | put_page(hpage); |
316 | } | |
317 | ||
318 | static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) | |
319 | { | |
320 | ulong mp_pa = vcpu->arch.magic_page_pa; | |
321 | ||
bbcc9c06 BH |
322 | if (!(vcpu->arch.shared->msr & MSR_SF)) |
323 | mp_pa = (uint32_t)mp_pa; | |
324 | ||
f05ed4d5 PM |
325 | if (unlikely(mp_pa) && |
326 | unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) { | |
327 | return 1; | |
328 | } | |
329 | ||
330 | return kvm_is_visible_gfn(vcpu->kvm, gfn); | |
331 | } | |
332 | ||
333 | int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
334 | ulong eaddr, int vec) | |
335 | { | |
336 | bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE); | |
337 | int r = RESUME_GUEST; | |
338 | int relocated; | |
339 | int page_found = 0; | |
340 | struct kvmppc_pte pte; | |
341 | bool is_mmio = false; | |
342 | bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false; | |
343 | bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false; | |
344 | u64 vsid; | |
345 | ||
346 | relocated = data ? dr : ir; | |
347 | ||
348 | /* Resolve real address if translation turned on */ | |
349 | if (relocated) { | |
350 | page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data); | |
351 | } else { | |
352 | pte.may_execute = true; | |
353 | pte.may_read = true; | |
354 | pte.may_write = true; | |
355 | pte.raddr = eaddr & KVM_PAM; | |
356 | pte.eaddr = eaddr; | |
357 | pte.vpage = eaddr >> 12; | |
358 | } | |
359 | ||
360 | switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { | |
361 | case 0: | |
362 | pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); | |
363 | break; | |
364 | case MSR_DR: | |
365 | case MSR_IR: | |
366 | vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); | |
367 | ||
368 | if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR) | |
369 | pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); | |
370 | else | |
371 | pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); | |
372 | pte.vpage |= vsid; | |
373 | ||
374 | if (vsid == -1) | |
375 | page_found = -EINVAL; | |
376 | break; | |
377 | } | |
378 | ||
379 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
380 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | |
381 | /* | |
382 | * If we do the dcbz hack, we have to NX on every execution, | |
383 | * so we can patch the executing code. This renders our guest | |
384 | * NX-less. | |
385 | */ | |
386 | pte.may_execute = !data; | |
387 | } | |
388 | ||
389 | if (page_found == -ENOENT) { | |
390 | /* Page not found in guest PTE entries */ | |
468a12c2 | 391 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
f05ed4d5 | 392 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); |
468a12c2 | 393 | vcpu->arch.shared->dsisr = svcpu->fault_dsisr; |
f05ed4d5 | 394 | vcpu->arch.shared->msr |= |
468a12c2 AG |
395 | (svcpu->shadow_srr1 & 0x00000000f8000000ULL); |
396 | svcpu_put(svcpu); | |
f05ed4d5 PM |
397 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
398 | } else if (page_found == -EPERM) { | |
399 | /* Storage protection */ | |
468a12c2 | 400 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
f05ed4d5 | 401 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); |
468a12c2 | 402 | vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE; |
f05ed4d5 PM |
403 | vcpu->arch.shared->dsisr |= DSISR_PROTFAULT; |
404 | vcpu->arch.shared->msr |= | |
468a12c2 AG |
405 | svcpu->shadow_srr1 & 0x00000000f8000000ULL; |
406 | svcpu_put(svcpu); | |
f05ed4d5 PM |
407 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
408 | } else if (page_found == -EINVAL) { | |
409 | /* Page not found in guest SLB */ | |
410 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); | |
411 | kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); | |
412 | } else if (!is_mmio && | |
413 | kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { | |
414 | /* The guest's PTE is not mapped yet. Map on the host */ | |
415 | kvmppc_mmu_map_page(vcpu, &pte); | |
416 | if (data) | |
417 | vcpu->stat.sp_storage++; | |
418 | else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
419 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) | |
420 | kvmppc_patch_dcbz(vcpu, &pte); | |
421 | } else { | |
422 | /* MMIO */ | |
423 | vcpu->stat.mmio_exits++; | |
424 | vcpu->arch.paddr_accessed = pte.raddr; | |
6020c0f6 | 425 | vcpu->arch.vaddr_accessed = pte.eaddr; |
f05ed4d5 PM |
426 | r = kvmppc_emulate_mmio(run, vcpu); |
427 | if ( r == RESUME_HOST_NV ) | |
428 | r = RESUME_HOST; | |
429 | } | |
430 | ||
431 | return r; | |
432 | } | |
433 | ||
434 | static inline int get_fpr_index(int i) | |
435 | { | |
436 | #ifdef CONFIG_VSX | |
437 | i *= 2; | |
438 | #endif | |
439 | return i; | |
440 | } | |
441 | ||
442 | /* Give up external provider (FPU, Altivec, VSX) */ | |
443 | void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) | |
444 | { | |
445 | struct thread_struct *t = ¤t->thread; | |
446 | u64 *vcpu_fpr = vcpu->arch.fpr; | |
447 | #ifdef CONFIG_VSX | |
448 | u64 *vcpu_vsx = vcpu->arch.vsr; | |
449 | #endif | |
450 | u64 *thread_fpr = (u64*)t->fpr; | |
451 | int i; | |
452 | ||
453 | if (!(vcpu->arch.guest_owned_ext & msr)) | |
454 | return; | |
455 | ||
456 | #ifdef DEBUG_EXT | |
457 | printk(KERN_INFO "Giving up ext 0x%lx\n", msr); | |
458 | #endif | |
459 | ||
460 | switch (msr) { | |
461 | case MSR_FP: | |
462 | giveup_fpu(current); | |
463 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) | |
464 | vcpu_fpr[i] = thread_fpr[get_fpr_index(i)]; | |
465 | ||
466 | vcpu->arch.fpscr = t->fpscr.val; | |
467 | break; | |
468 | case MSR_VEC: | |
469 | #ifdef CONFIG_ALTIVEC | |
470 | giveup_altivec(current); | |
471 | memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr)); | |
472 | vcpu->arch.vscr = t->vscr; | |
473 | #endif | |
474 | break; | |
475 | case MSR_VSX: | |
476 | #ifdef CONFIG_VSX | |
477 | __giveup_vsx(current); | |
478 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++) | |
479 | vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1]; | |
480 | #endif | |
481 | break; | |
482 | default: | |
483 | BUG(); | |
484 | } | |
485 | ||
486 | vcpu->arch.guest_owned_ext &= ~msr; | |
487 | current->thread.regs->msr &= ~msr; | |
488 | kvmppc_recalc_shadow_msr(vcpu); | |
489 | } | |
490 | ||
491 | static int kvmppc_read_inst(struct kvm_vcpu *vcpu) | |
492 | { | |
493 | ulong srr0 = kvmppc_get_pc(vcpu); | |
494 | u32 last_inst = kvmppc_get_last_inst(vcpu); | |
495 | int ret; | |
496 | ||
497 | ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); | |
498 | if (ret == -ENOENT) { | |
499 | ulong msr = vcpu->arch.shared->msr; | |
500 | ||
501 | msr = kvmppc_set_field(msr, 33, 33, 1); | |
502 | msr = kvmppc_set_field(msr, 34, 36, 0); | |
503 | vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0); | |
504 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); | |
505 | return EMULATE_AGAIN; | |
506 | } | |
507 | ||
508 | return EMULATE_DONE; | |
509 | } | |
510 | ||
511 | static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr) | |
512 | { | |
513 | ||
514 | /* Need to do paired single emulation? */ | |
515 | if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) | |
516 | return EMULATE_DONE; | |
517 | ||
518 | /* Read out the instruction */ | |
519 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) | |
520 | /* Need to emulate */ | |
521 | return EMULATE_FAIL; | |
522 | ||
523 | return EMULATE_AGAIN; | |
524 | } | |
525 | ||
526 | /* Handle external providers (FPU, Altivec, VSX) */ | |
527 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, | |
528 | ulong msr) | |
529 | { | |
530 | struct thread_struct *t = ¤t->thread; | |
531 | u64 *vcpu_fpr = vcpu->arch.fpr; | |
532 | #ifdef CONFIG_VSX | |
533 | u64 *vcpu_vsx = vcpu->arch.vsr; | |
534 | #endif | |
535 | u64 *thread_fpr = (u64*)t->fpr; | |
536 | int i; | |
537 | ||
538 | /* When we have paired singles, we emulate in software */ | |
539 | if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) | |
540 | return RESUME_GUEST; | |
541 | ||
542 | if (!(vcpu->arch.shared->msr & msr)) { | |
543 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
544 | return RESUME_GUEST; | |
545 | } | |
546 | ||
547 | /* We already own the ext */ | |
548 | if (vcpu->arch.guest_owned_ext & msr) { | |
549 | return RESUME_GUEST; | |
550 | } | |
551 | ||
552 | #ifdef DEBUG_EXT | |
553 | printk(KERN_INFO "Loading up ext 0x%lx\n", msr); | |
554 | #endif | |
555 | ||
556 | current->thread.regs->msr |= msr; | |
557 | ||
558 | switch (msr) { | |
559 | case MSR_FP: | |
560 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) | |
561 | thread_fpr[get_fpr_index(i)] = vcpu_fpr[i]; | |
562 | ||
563 | t->fpscr.val = vcpu->arch.fpscr; | |
564 | t->fpexc_mode = 0; | |
565 | kvmppc_load_up_fpu(); | |
566 | break; | |
567 | case MSR_VEC: | |
568 | #ifdef CONFIG_ALTIVEC | |
569 | memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr)); | |
570 | t->vscr = vcpu->arch.vscr; | |
571 | t->vrsave = -1; | |
572 | kvmppc_load_up_altivec(); | |
573 | #endif | |
574 | break; | |
575 | case MSR_VSX: | |
576 | #ifdef CONFIG_VSX | |
577 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++) | |
578 | thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i]; | |
579 | kvmppc_load_up_vsx(); | |
580 | #endif | |
581 | break; | |
582 | default: | |
583 | BUG(); | |
584 | } | |
585 | ||
586 | vcpu->arch.guest_owned_ext |= msr; | |
587 | ||
588 | kvmppc_recalc_shadow_msr(vcpu); | |
589 | ||
590 | return RESUME_GUEST; | |
591 | } | |
592 | ||
593 | int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
594 | unsigned int exit_nr) | |
595 | { | |
596 | int r = RESUME_HOST; | |
7ee78855 | 597 | int s; |
f05ed4d5 PM |
598 | |
599 | vcpu->stat.sum_exits++; | |
600 | ||
601 | run->exit_reason = KVM_EXIT_UNKNOWN; | |
602 | run->ready_for_interrupt_injection = 1; | |
603 | ||
bd2be683 | 604 | /* We get here with MSR.EE=1 */ |
3b1d9d7d | 605 | |
97c95059 | 606 | trace_kvm_exit(exit_nr, vcpu); |
706fb730 | 607 | kvm_guest_exit(); |
c63ddcb4 | 608 | |
f05ed4d5 PM |
609 | switch (exit_nr) { |
610 | case BOOK3S_INTERRUPT_INST_STORAGE: | |
468a12c2 AG |
611 | { |
612 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); | |
613 | ulong shadow_srr1 = svcpu->shadow_srr1; | |
f05ed4d5 PM |
614 | vcpu->stat.pf_instruc++; |
615 | ||
616 | #ifdef CONFIG_PPC_BOOK3S_32 | |
617 | /* We set segments as unused segments when invalidating them. So | |
618 | * treat the respective fault as segment fault. */ | |
468a12c2 | 619 | if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) { |
f05ed4d5 PM |
620 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); |
621 | r = RESUME_GUEST; | |
468a12c2 | 622 | svcpu_put(svcpu); |
f05ed4d5 PM |
623 | break; |
624 | } | |
625 | #endif | |
468a12c2 | 626 | svcpu_put(svcpu); |
f05ed4d5 PM |
627 | |
628 | /* only care about PTEG not found errors, but leave NX alone */ | |
468a12c2 | 629 | if (shadow_srr1 & 0x40000000) { |
f05ed4d5 PM |
630 | r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); |
631 | vcpu->stat.sp_instruc++; | |
632 | } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
633 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | |
634 | /* | |
635 | * XXX If we do the dcbz hack we use the NX bit to flush&patch the page, | |
636 | * so we can't use the NX bit inside the guest. Let's cross our fingers, | |
637 | * that no guest that needs the dcbz hack does NX. | |
638 | */ | |
639 | kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); | |
640 | r = RESUME_GUEST; | |
641 | } else { | |
468a12c2 | 642 | vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000; |
f05ed4d5 PM |
643 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
644 | r = RESUME_GUEST; | |
645 | } | |
646 | break; | |
468a12c2 | 647 | } |
f05ed4d5 PM |
648 | case BOOK3S_INTERRUPT_DATA_STORAGE: |
649 | { | |
650 | ulong dar = kvmppc_get_fault_dar(vcpu); | |
468a12c2 AG |
651 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
652 | u32 fault_dsisr = svcpu->fault_dsisr; | |
f05ed4d5 PM |
653 | vcpu->stat.pf_storage++; |
654 | ||
655 | #ifdef CONFIG_PPC_BOOK3S_32 | |
656 | /* We set segments as unused segments when invalidating them. So | |
657 | * treat the respective fault as segment fault. */ | |
468a12c2 | 658 | if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) { |
f05ed4d5 PM |
659 | kvmppc_mmu_map_segment(vcpu, dar); |
660 | r = RESUME_GUEST; | |
468a12c2 | 661 | svcpu_put(svcpu); |
f05ed4d5 PM |
662 | break; |
663 | } | |
664 | #endif | |
468a12c2 | 665 | svcpu_put(svcpu); |
f05ed4d5 PM |
666 | |
667 | /* The only case we need to handle is missing shadow PTEs */ | |
468a12c2 | 668 | if (fault_dsisr & DSISR_NOHPTE) { |
f05ed4d5 PM |
669 | r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); |
670 | } else { | |
671 | vcpu->arch.shared->dar = dar; | |
468a12c2 | 672 | vcpu->arch.shared->dsisr = fault_dsisr; |
f05ed4d5 PM |
673 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
674 | r = RESUME_GUEST; | |
675 | } | |
676 | break; | |
677 | } | |
678 | case BOOK3S_INTERRUPT_DATA_SEGMENT: | |
679 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { | |
680 | vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); | |
681 | kvmppc_book3s_queue_irqprio(vcpu, | |
682 | BOOK3S_INTERRUPT_DATA_SEGMENT); | |
683 | } | |
684 | r = RESUME_GUEST; | |
685 | break; | |
686 | case BOOK3S_INTERRUPT_INST_SEGMENT: | |
687 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { | |
688 | kvmppc_book3s_queue_irqprio(vcpu, | |
689 | BOOK3S_INTERRUPT_INST_SEGMENT); | |
690 | } | |
691 | r = RESUME_GUEST; | |
692 | break; | |
693 | /* We're good on these - the host merely wanted to get our attention */ | |
694 | case BOOK3S_INTERRUPT_DECREMENTER: | |
4f225ae0 | 695 | case BOOK3S_INTERRUPT_HV_DECREMENTER: |
f05ed4d5 PM |
696 | vcpu->stat.dec_exits++; |
697 | r = RESUME_GUEST; | |
698 | break; | |
699 | case BOOK3S_INTERRUPT_EXTERNAL: | |
4f225ae0 AG |
700 | case BOOK3S_INTERRUPT_EXTERNAL_LEVEL: |
701 | case BOOK3S_INTERRUPT_EXTERNAL_HV: | |
f05ed4d5 PM |
702 | vcpu->stat.ext_intr_exits++; |
703 | r = RESUME_GUEST; | |
704 | break; | |
705 | case BOOK3S_INTERRUPT_PERFMON: | |
706 | r = RESUME_GUEST; | |
707 | break; | |
708 | case BOOK3S_INTERRUPT_PROGRAM: | |
4f225ae0 | 709 | case BOOK3S_INTERRUPT_H_EMUL_ASSIST: |
f05ed4d5 PM |
710 | { |
711 | enum emulation_result er; | |
468a12c2 | 712 | struct kvmppc_book3s_shadow_vcpu *svcpu; |
f05ed4d5 PM |
713 | ulong flags; |
714 | ||
715 | program_interrupt: | |
468a12c2 AG |
716 | svcpu = svcpu_get(vcpu); |
717 | flags = svcpu->shadow_srr1 & 0x1f0000ull; | |
718 | svcpu_put(svcpu); | |
f05ed4d5 PM |
719 | |
720 | if (vcpu->arch.shared->msr & MSR_PR) { | |
721 | #ifdef EXIT_DEBUG | |
722 | printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); | |
723 | #endif | |
724 | if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) != | |
725 | (INS_DCBZ & 0xfffffff7)) { | |
726 | kvmppc_core_queue_program(vcpu, flags); | |
727 | r = RESUME_GUEST; | |
728 | break; | |
729 | } | |
730 | } | |
731 | ||
732 | vcpu->stat.emulated_inst_exits++; | |
733 | er = kvmppc_emulate_instruction(run, vcpu); | |
734 | switch (er) { | |
735 | case EMULATE_DONE: | |
736 | r = RESUME_GUEST_NV; | |
737 | break; | |
738 | case EMULATE_AGAIN: | |
739 | r = RESUME_GUEST; | |
740 | break; | |
741 | case EMULATE_FAIL: | |
742 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", | |
743 | __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); | |
744 | kvmppc_core_queue_program(vcpu, flags); | |
745 | r = RESUME_GUEST; | |
746 | break; | |
747 | case EMULATE_DO_MMIO: | |
748 | run->exit_reason = KVM_EXIT_MMIO; | |
749 | r = RESUME_HOST_NV; | |
750 | break; | |
751 | default: | |
752 | BUG(); | |
753 | } | |
754 | break; | |
755 | } | |
756 | case BOOK3S_INTERRUPT_SYSCALL: | |
a668f2bd AG |
757 | if (vcpu->arch.papr_enabled && |
758 | (kvmppc_get_last_inst(vcpu) == 0x44000022) && | |
759 | !(vcpu->arch.shared->msr & MSR_PR)) { | |
760 | /* SC 1 papr hypercalls */ | |
761 | ulong cmd = kvmppc_get_gpr(vcpu, 3); | |
762 | int i; | |
763 | ||
96f38d72 | 764 | #ifdef CONFIG_KVM_BOOK3S_64_PR |
a668f2bd AG |
765 | if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { |
766 | r = RESUME_GUEST; | |
767 | break; | |
768 | } | |
96f38d72 | 769 | #endif |
a668f2bd AG |
770 | |
771 | run->papr_hcall.nr = cmd; | |
772 | for (i = 0; i < 9; ++i) { | |
773 | ulong gpr = kvmppc_get_gpr(vcpu, 4 + i); | |
774 | run->papr_hcall.args[i] = gpr; | |
775 | } | |
776 | run->exit_reason = KVM_EXIT_PAPR_HCALL; | |
777 | vcpu->arch.hcall_needed = 1; | |
778 | r = RESUME_HOST; | |
779 | } else if (vcpu->arch.osi_enabled && | |
f05ed4d5 PM |
780 | (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && |
781 | (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { | |
782 | /* MOL hypercalls */ | |
783 | u64 *gprs = run->osi.gprs; | |
784 | int i; | |
785 | ||
786 | run->exit_reason = KVM_EXIT_OSI; | |
787 | for (i = 0; i < 32; i++) | |
788 | gprs[i] = kvmppc_get_gpr(vcpu, i); | |
789 | vcpu->arch.osi_needed = 1; | |
790 | r = RESUME_HOST_NV; | |
791 | } else if (!(vcpu->arch.shared->msr & MSR_PR) && | |
792 | (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { | |
793 | /* KVM PV hypercalls */ | |
794 | kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); | |
795 | r = RESUME_GUEST; | |
796 | } else { | |
797 | /* Guest syscalls */ | |
798 | vcpu->stat.syscall_exits++; | |
799 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
800 | r = RESUME_GUEST; | |
801 | } | |
802 | break; | |
803 | case BOOK3S_INTERRUPT_FP_UNAVAIL: | |
804 | case BOOK3S_INTERRUPT_ALTIVEC: | |
805 | case BOOK3S_INTERRUPT_VSX: | |
806 | { | |
807 | int ext_msr = 0; | |
808 | ||
809 | switch (exit_nr) { | |
810 | case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break; | |
811 | case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break; | |
812 | case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break; | |
813 | } | |
814 | ||
815 | switch (kvmppc_check_ext(vcpu, exit_nr)) { | |
816 | case EMULATE_DONE: | |
817 | /* everything ok - let's enable the ext */ | |
818 | r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); | |
819 | break; | |
820 | case EMULATE_FAIL: | |
821 | /* we need to emulate this instruction */ | |
822 | goto program_interrupt; | |
823 | break; | |
824 | default: | |
825 | /* nothing to worry about - go again */ | |
826 | break; | |
827 | } | |
828 | break; | |
829 | } | |
830 | case BOOK3S_INTERRUPT_ALIGNMENT: | |
831 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) { | |
832 | vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu, | |
833 | kvmppc_get_last_inst(vcpu)); | |
834 | vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu, | |
835 | kvmppc_get_last_inst(vcpu)); | |
836 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
837 | } | |
838 | r = RESUME_GUEST; | |
839 | break; | |
840 | case BOOK3S_INTERRUPT_MACHINE_CHECK: | |
841 | case BOOK3S_INTERRUPT_TRACE: | |
842 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
843 | r = RESUME_GUEST; | |
844 | break; | |
845 | default: | |
468a12c2 AG |
846 | { |
847 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); | |
848 | ulong shadow_srr1 = svcpu->shadow_srr1; | |
849 | svcpu_put(svcpu); | |
f05ed4d5 PM |
850 | /* Ugh - bork here! What did we get? */ |
851 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", | |
468a12c2 | 852 | exit_nr, kvmppc_get_pc(vcpu), shadow_srr1); |
f05ed4d5 PM |
853 | r = RESUME_HOST; |
854 | BUG(); | |
855 | break; | |
856 | } | |
468a12c2 | 857 | } |
f05ed4d5 PM |
858 | |
859 | if (!(r & RESUME_HOST)) { | |
860 | /* To avoid clobbering exit_reason, only check for signals if | |
861 | * we aren't already exiting to userspace for some other | |
862 | * reason. */ | |
e371f713 AG |
863 | |
864 | /* | |
865 | * Interrupts could be timers for the guest which we have to | |
866 | * inject again, so let's postpone them until we're in the guest | |
867 | * and if we really did time things so badly, then we just exit | |
868 | * again due to a host external interrupt. | |
869 | */ | |
bd2be683 | 870 | local_irq_disable(); |
7ee78855 AG |
871 | s = kvmppc_prepare_to_enter(vcpu); |
872 | if (s <= 0) { | |
bd2be683 | 873 | local_irq_enable(); |
7ee78855 | 874 | r = s; |
24afa37b | 875 | } else { |
bd2be683 | 876 | kvmppc_lazy_ee_enable(); |
f05ed4d5 PM |
877 | } |
878 | } | |
879 | ||
880 | trace_kvm_book3s_reenter(r, vcpu); | |
881 | ||
882 | return r; | |
883 | } | |
884 | ||
885 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |
886 | struct kvm_sregs *sregs) | |
887 | { | |
888 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | |
889 | int i; | |
890 | ||
891 | sregs->pvr = vcpu->arch.pvr; | |
892 | ||
893 | sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; | |
894 | if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { | |
895 | for (i = 0; i < 64; i++) { | |
896 | sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i; | |
897 | sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; | |
898 | } | |
899 | } else { | |
900 | for (i = 0; i < 16; i++) | |
901 | sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i]; | |
902 | ||
903 | for (i = 0; i < 8; i++) { | |
904 | sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw; | |
905 | sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; | |
906 | } | |
907 | } | |
908 | ||
909 | return 0; | |
910 | } | |
911 | ||
912 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
913 | struct kvm_sregs *sregs) | |
914 | { | |
915 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | |
916 | int i; | |
917 | ||
918 | kvmppc_set_pvr(vcpu, sregs->pvr); | |
919 | ||
920 | vcpu3s->sdr1 = sregs->u.s.sdr1; | |
921 | if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { | |
922 | for (i = 0; i < 64; i++) { | |
923 | vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv, | |
924 | sregs->u.s.ppc64.slb[i].slbe); | |
925 | } | |
926 | } else { | |
927 | for (i = 0; i < 16; i++) { | |
928 | vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]); | |
929 | } | |
930 | for (i = 0; i < 8; i++) { | |
931 | kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false, | |
932 | (u32)sregs->u.s.ppc32.ibat[i]); | |
933 | kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true, | |
934 | (u32)(sregs->u.s.ppc32.ibat[i] >> 32)); | |
935 | kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false, | |
936 | (u32)sregs->u.s.ppc32.dbat[i]); | |
937 | kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true, | |
938 | (u32)(sregs->u.s.ppc32.dbat[i] >> 32)); | |
939 | } | |
940 | } | |
941 | ||
942 | /* Flush the MMU after messing with the segments */ | |
943 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | |
944 | ||
945 | return 0; | |
946 | } | |
947 | ||
31f3438e PM |
948 | int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) |
949 | { | |
950 | int r = -EINVAL; | |
951 | ||
952 | switch (reg->id) { | |
953 | case KVM_REG_PPC_HIOR: | |
b8e6f8ae AG |
954 | r = copy_to_user((u64 __user *)(long)reg->addr, |
955 | &to_book3s(vcpu)->hior, sizeof(u64)); | |
31f3438e PM |
956 | break; |
957 | default: | |
958 | break; | |
959 | } | |
960 | ||
961 | return r; | |
962 | } | |
963 | ||
964 | int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) | |
965 | { | |
966 | int r = -EINVAL; | |
967 | ||
968 | switch (reg->id) { | |
969 | case KVM_REG_PPC_HIOR: | |
b8e6f8ae AG |
970 | r = copy_from_user(&to_book3s(vcpu)->hior, |
971 | (u64 __user *)(long)reg->addr, sizeof(u64)); | |
31f3438e PM |
972 | if (!r) |
973 | to_book3s(vcpu)->hior_explicit = true; | |
974 | break; | |
975 | default: | |
976 | break; | |
977 | } | |
978 | ||
979 | return r; | |
980 | } | |
981 | ||
f05ed4d5 PM |
982 | int kvmppc_core_check_processor_compat(void) |
983 | { | |
984 | return 0; | |
985 | } | |
986 | ||
987 | struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | |
988 | { | |
989 | struct kvmppc_vcpu_book3s *vcpu_book3s; | |
990 | struct kvm_vcpu *vcpu; | |
991 | int err = -ENOMEM; | |
992 | unsigned long p; | |
993 | ||
994 | vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s)); | |
995 | if (!vcpu_book3s) | |
996 | goto out; | |
997 | ||
998 | vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *) | |
999 | kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL); | |
1000 | if (!vcpu_book3s->shadow_vcpu) | |
1001 | goto free_vcpu; | |
1002 | ||
1003 | vcpu = &vcpu_book3s->vcpu; | |
1004 | err = kvm_vcpu_init(vcpu, kvm, id); | |
1005 | if (err) | |
1006 | goto free_shadow_vcpu; | |
1007 | ||
1008 | p = __get_free_page(GFP_KERNEL|__GFP_ZERO); | |
1009 | /* the real shared page fills the last 4k of our page */ | |
1010 | vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096); | |
1011 | if (!p) | |
1012 | goto uninit_vcpu; | |
1013 | ||
f05ed4d5 PM |
1014 | #ifdef CONFIG_PPC_BOOK3S_64 |
1015 | /* default to book3s_64 (970fx) */ | |
1016 | vcpu->arch.pvr = 0x3C0301; | |
1017 | #else | |
1018 | /* default to book3s_32 (750) */ | |
1019 | vcpu->arch.pvr = 0x84202; | |
1020 | #endif | |
1021 | kvmppc_set_pvr(vcpu, vcpu->arch.pvr); | |
1022 | vcpu->arch.slb_nr = 64; | |
1023 | ||
f05ed4d5 PM |
1024 | vcpu->arch.shadow_msr = MSR_USER64; |
1025 | ||
1026 | err = kvmppc_mmu_init(vcpu); | |
1027 | if (err < 0) | |
1028 | goto uninit_vcpu; | |
1029 | ||
1030 | return vcpu; | |
1031 | ||
1032 | uninit_vcpu: | |
1033 | kvm_vcpu_uninit(vcpu); | |
1034 | free_shadow_vcpu: | |
1035 | kfree(vcpu_book3s->shadow_vcpu); | |
1036 | free_vcpu: | |
1037 | vfree(vcpu_book3s); | |
1038 | out: | |
1039 | return ERR_PTR(err); | |
1040 | } | |
1041 | ||
1042 | void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) | |
1043 | { | |
1044 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | |
1045 | ||
1046 | free_page((unsigned long)vcpu->arch.shared & PAGE_MASK); | |
1047 | kvm_vcpu_uninit(vcpu); | |
1048 | kfree(vcpu_book3s->shadow_vcpu); | |
1049 | vfree(vcpu_book3s); | |
1050 | } | |
1051 | ||
df6909e5 | 1052 | int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) |
f05ed4d5 PM |
1053 | { |
1054 | int ret; | |
1055 | double fpr[32][TS_FPRWIDTH]; | |
1056 | unsigned int fpscr; | |
1057 | int fpexc_mode; | |
1058 | #ifdef CONFIG_ALTIVEC | |
1059 | vector128 vr[32]; | |
1060 | vector128 vscr; | |
1061 | unsigned long uninitialized_var(vrsave); | |
1062 | int used_vr; | |
1063 | #endif | |
1064 | #ifdef CONFIG_VSX | |
1065 | int used_vsr; | |
1066 | #endif | |
1067 | ulong ext_msr; | |
1068 | ||
af8f38b3 AG |
1069 | /* Check if we can run the vcpu at all */ |
1070 | if (!vcpu->arch.sane) { | |
1071 | kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; | |
7d82714d AG |
1072 | ret = -EINVAL; |
1073 | goto out; | |
af8f38b3 AG |
1074 | } |
1075 | ||
e371f713 AG |
1076 | /* |
1077 | * Interrupts could be timers for the guest which we have to inject | |
1078 | * again, so let's postpone them until we're in the guest and if we | |
1079 | * really did time things so badly, then we just exit again due to | |
1080 | * a host external interrupt. | |
1081 | */ | |
bd2be683 | 1082 | local_irq_disable(); |
7ee78855 AG |
1083 | ret = kvmppc_prepare_to_enter(vcpu); |
1084 | if (ret <= 0) { | |
bd2be683 | 1085 | local_irq_enable(); |
7d82714d | 1086 | goto out; |
f05ed4d5 PM |
1087 | } |
1088 | ||
1089 | /* Save FPU state in stack */ | |
1090 | if (current->thread.regs->msr & MSR_FP) | |
1091 | giveup_fpu(current); | |
1092 | memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); | |
1093 | fpscr = current->thread.fpscr.val; | |
1094 | fpexc_mode = current->thread.fpexc_mode; | |
1095 | ||
1096 | #ifdef CONFIG_ALTIVEC | |
1097 | /* Save Altivec state in stack */ | |
1098 | used_vr = current->thread.used_vr; | |
1099 | if (used_vr) { | |
1100 | if (current->thread.regs->msr & MSR_VEC) | |
1101 | giveup_altivec(current); | |
1102 | memcpy(vr, current->thread.vr, sizeof(current->thread.vr)); | |
1103 | vscr = current->thread.vscr; | |
1104 | vrsave = current->thread.vrsave; | |
1105 | } | |
1106 | #endif | |
1107 | ||
1108 | #ifdef CONFIG_VSX | |
1109 | /* Save VSX state in stack */ | |
1110 | used_vsr = current->thread.used_vsr; | |
1111 | if (used_vsr && (current->thread.regs->msr & MSR_VSX)) | |
1112 | __giveup_vsx(current); | |
1113 | #endif | |
1114 | ||
1115 | /* Remember the MSR with disabled extensions */ | |
1116 | ext_msr = current->thread.regs->msr; | |
1117 | ||
f05ed4d5 PM |
1118 | /* Preload FPU if it's enabled */ |
1119 | if (vcpu->arch.shared->msr & MSR_FP) | |
1120 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); | |
1121 | ||
bd2be683 | 1122 | kvmppc_lazy_ee_enable(); |
df6909e5 PM |
1123 | |
1124 | ret = __kvmppc_vcpu_run(kvm_run, vcpu); | |
1125 | ||
24afa37b AG |
1126 | /* No need for kvm_guest_exit. It's done in handle_exit. |
1127 | We also get here with interrupts enabled. */ | |
f05ed4d5 | 1128 | |
f05ed4d5 PM |
1129 | current->thread.regs->msr = ext_msr; |
1130 | ||
1131 | /* Make sure we save the guest FPU/Altivec/VSX state */ | |
1132 | kvmppc_giveup_ext(vcpu, MSR_FP); | |
1133 | kvmppc_giveup_ext(vcpu, MSR_VEC); | |
1134 | kvmppc_giveup_ext(vcpu, MSR_VSX); | |
1135 | ||
1136 | /* Restore FPU state from stack */ | |
1137 | memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); | |
1138 | current->thread.fpscr.val = fpscr; | |
1139 | current->thread.fpexc_mode = fpexc_mode; | |
1140 | ||
1141 | #ifdef CONFIG_ALTIVEC | |
1142 | /* Restore Altivec state from stack */ | |
1143 | if (used_vr && current->thread.used_vr) { | |
1144 | memcpy(current->thread.vr, vr, sizeof(current->thread.vr)); | |
1145 | current->thread.vscr = vscr; | |
1146 | current->thread.vrsave = vrsave; | |
1147 | } | |
1148 | current->thread.used_vr = used_vr; | |
1149 | #endif | |
1150 | ||
1151 | #ifdef CONFIG_VSX | |
1152 | current->thread.used_vsr = used_vsr; | |
1153 | #endif | |
1154 | ||
7d82714d | 1155 | out: |
0652eaae | 1156 | vcpu->mode = OUTSIDE_GUEST_MODE; |
f05ed4d5 PM |
1157 | return ret; |
1158 | } | |
1159 | ||
82ed3616 PM |
1160 | /* |
1161 | * Get (and clear) the dirty memory log for a memory slot. | |
1162 | */ | |
1163 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, | |
1164 | struct kvm_dirty_log *log) | |
1165 | { | |
1166 | struct kvm_memory_slot *memslot; | |
1167 | struct kvm_vcpu *vcpu; | |
1168 | ulong ga, ga_end; | |
1169 | int is_dirty = 0; | |
1170 | int r; | |
1171 | unsigned long n; | |
1172 | ||
1173 | mutex_lock(&kvm->slots_lock); | |
1174 | ||
1175 | r = kvm_get_dirty_log(kvm, log, &is_dirty); | |
1176 | if (r) | |
1177 | goto out; | |
1178 | ||
1179 | /* If nothing is dirty, don't bother messing with page tables. */ | |
1180 | if (is_dirty) { | |
1181 | memslot = id_to_memslot(kvm->memslots, log->slot); | |
1182 | ||
1183 | ga = memslot->base_gfn << PAGE_SHIFT; | |
1184 | ga_end = ga + (memslot->npages << PAGE_SHIFT); | |
1185 | ||
1186 | kvm_for_each_vcpu(n, vcpu, kvm) | |
1187 | kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); | |
1188 | ||
1189 | n = kvm_dirty_bitmap_bytes(memslot); | |
1190 | memset(memslot->dirty_bitmap, 0, n); | |
1191 | } | |
1192 | ||
1193 | r = 0; | |
1194 | out: | |
1195 | mutex_unlock(&kvm->slots_lock); | |
1196 | return r; | |
1197 | } | |
1198 | ||
5b74716e BH |
1199 | #ifdef CONFIG_PPC64 |
1200 | int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info) | |
1201 | { | |
1202 | /* No flags */ | |
1203 | info->flags = 0; | |
1204 | ||
1205 | /* SLB is always 64 entries */ | |
1206 | info->slb_size = 64; | |
1207 | ||
1208 | /* Standard 4k base page size segment */ | |
1209 | info->sps[0].page_shift = 12; | |
1210 | info->sps[0].slb_enc = 0; | |
1211 | info->sps[0].enc[0].page_shift = 12; | |
1212 | info->sps[0].enc[0].pte_enc = 0; | |
1213 | ||
1214 | /* Standard 16M large page size segment */ | |
1215 | info->sps[1].page_shift = 24; | |
1216 | info->sps[1].slb_enc = SLB_VSID_L; | |
1217 | info->sps[1].enc[0].page_shift = 24; | |
1218 | info->sps[1].enc[0].pte_enc = 0; | |
1219 | ||
1220 | return 0; | |
1221 | } | |
1222 | #endif /* CONFIG_PPC64 */ | |
1223 | ||
a66b48c3 PM |
1224 | void kvmppc_core_free_memslot(struct kvm_memory_slot *free, |
1225 | struct kvm_memory_slot *dont) | |
1226 | { | |
1227 | } | |
1228 | ||
1229 | int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, | |
1230 | unsigned long npages) | |
1231 | { | |
1232 | return 0; | |
1233 | } | |
1234 | ||
f9e0554d | 1235 | int kvmppc_core_prepare_memory_region(struct kvm *kvm, |
a66b48c3 | 1236 | struct kvm_memory_slot *memslot, |
f9e0554d PM |
1237 | struct kvm_userspace_memory_region *mem) |
1238 | { | |
1239 | return 0; | |
1240 | } | |
1241 | ||
1242 | void kvmppc_core_commit_memory_region(struct kvm *kvm, | |
dfe49dbd PM |
1243 | struct kvm_userspace_memory_region *mem, |
1244 | struct kvm_memory_slot old) | |
1245 | { | |
1246 | } | |
1247 | ||
1248 | void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) | |
f9e0554d PM |
1249 | { |
1250 | } | |
1251 | ||
1252 | int kvmppc_core_init_vm(struct kvm *kvm) | |
1253 | { | |
f31e65e1 BH |
1254 | #ifdef CONFIG_PPC64 |
1255 | INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables); | |
1256 | #endif | |
1257 | ||
f9e0554d PM |
1258 | return 0; |
1259 | } | |
1260 | ||
1261 | void kvmppc_core_destroy_vm(struct kvm *kvm) | |
1262 | { | |
f31e65e1 BH |
1263 | #ifdef CONFIG_PPC64 |
1264 | WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); | |
1265 | #endif | |
f9e0554d PM |
1266 | } |
1267 | ||
f05ed4d5 PM |
1268 | static int kvmppc_book3s_init(void) |
1269 | { | |
1270 | int r; | |
1271 | ||
1272 | r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0, | |
1273 | THIS_MODULE); | |
1274 | ||
1275 | if (r) | |
1276 | return r; | |
1277 | ||
1278 | r = kvmppc_mmu_hpte_sysinit(); | |
1279 | ||
1280 | return r; | |
1281 | } | |
1282 | ||
1283 | static void kvmppc_book3s_exit(void) | |
1284 | { | |
1285 | kvmppc_mmu_hpte_sysexit(); | |
1286 | kvm_exit(); | |
1287 | } | |
1288 | ||
1289 | module_init(kvmppc_book3s_init); | |
1290 | module_exit(kvmppc_book3s_exit); |