Merge ath-next from ath.git
[deliverable/linux.git] / arch / powerpc / kvm / e500.h
CommitLineData
bc8080cb 1/*
dd9ebf1f 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb 3 *
fc6cf995 4 * Author: Yu Liu <yu.liu@freescale.com>
73196cd3 5 * Scott Wood <scottwood@freescale.com>
4f802fe9 6 * Ashish Kalra <ashish.kalra@freescale.com>
73196cd3 7 * Varun Sethi <varun.sethi@freescale.com>
bc8080cb
HB
8 *
9 * Description:
fc6cf995
SW
10 * This file is based on arch/powerpc/kvm/44x_tlb.h and
11 * arch/powerpc/include/asm/kvm_44x.h by Hollis Blanchard <hollisb@us.ibm.com>,
12 * Copyright IBM Corp. 2007-2008
bc8080cb
HB
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License, version 2, as
16 * published by the Free Software Foundation.
17 */
18
29a5a6f9
SW
19#ifndef KVM_E500_H
20#define KVM_E500_H
bc8080cb
HB
21
22#include <linux/kvm_host.h>
0cfb50e5 23#include <asm/mmu-book3e.h>
bc8080cb 24#include <asm/tlb.h>
188e267c 25#include <asm/cputhreads.h>
fc6cf995 26
307d9008
MC
27enum vcpu_ftr {
28 VCPU_FTR_MMU_V2
29};
30
fc6cf995
SW
31#define E500_PID_NUM 3
32#define E500_TLB_NUM 2
33
47bf3797 34/* entry is mapped somewhere in host TLB */
08c9a188 35#define E500_TLB_VALID (1 << 31)
47bf3797 36/* TLB1 entry is mapped by host TLB1, tracked by bitmaps */
08c9a188 37#define E500_TLB_BITMAP (1 << 30)
47bf3797 38/* TLB1 entry is mapped by host TLB0 */
08c9a188
BB
39#define E500_TLB_TLB0 (1 << 29)
40/* bits [6-5] MAS2_X1 and MAS2_X0 and [4-0] bits for WIMGE */
41#define E500_TLB_MAS2_ATTR (0x7f)
fc6cf995
SW
42
43struct tlbe_ref {
ba049e93 44 kvm_pfn_t pfn; /* valid only for TLB0, except briefly */
47bf3797 45 unsigned int flags; /* E500_TLB_* */
fc6cf995
SW
46};
47
48struct tlbe_priv {
47bf3797 49 struct tlbe_ref ref;
fc6cf995
SW
50};
51
bf7ca4bd 52#ifdef CONFIG_KVM_E500V2
fc6cf995 53struct vcpu_id_table;
8fdd21a2 54#endif
fc6cf995
SW
55
56struct kvmppc_e500_tlb_params {
57 int entries, ways, sets;
58};
59
60struct kvmppc_vcpu_e500 {
52e1718c
SW
61 struct kvm_vcpu vcpu;
62
fc6cf995
SW
63 /* Unmodified copy of the guest's TLB -- shared with host userspace. */
64 struct kvm_book3e_206_tlb_entry *gtlb_arch;
65
66 /* Starting entry number in gtlb_arch[] */
67 int gtlb_offset[E500_TLB_NUM];
68
69 /* KVM internal information associated with each guest TLB entry */
70 struct tlbe_priv *gtlb_priv[E500_TLB_NUM];
71
72 struct kvmppc_e500_tlb_params gtlb_params[E500_TLB_NUM];
73
74 unsigned int gtlb_nv[E500_TLB_NUM];
75
fc6cf995
SW
76 unsigned int host_tlb1_nv;
77
fc6cf995 78 u32 svr;
fc6cf995
SW
79 u32 l1csr0;
80 u32 l1csr1;
81 u32 hid0;
82 u32 hid1;
fc6cf995
SW
83 u64 mcar;
84
85 struct page **shared_tlb_pages;
86 int num_shared_tlb_pages;
8fdd21a2 87
4f802fe9
SW
88 u64 *g2h_tlb1_map;
89 unsigned int *h2g_tlb1_rmap;
90
cc902ad4
BB
91 /* Minimum and maximum address mapped my TLB1 */
92 unsigned long tlb1_min_eaddr;
93 unsigned long tlb1_max_eaddr;
94
bf7ca4bd 95#ifdef CONFIG_KVM_E500V2
8fdd21a2
SW
96 u32 pid[E500_PID_NUM];
97
98 /* vcpu id table */
99 struct vcpu_id_table *idt;
100#endif
fc6cf995
SW
101};
102
103static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
104{
105 return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);
106}
bc8080cb 107
73196cd3 108
dc83b8bc
SW
109/* This geometry is the legacy default -- can be overridden by userspace */
110#define KVM_E500_TLB0_WAY_SIZE 128
111#define KVM_E500_TLB0_WAY_NUM 2
bc8080cb
HB
112
113#define KVM_E500_TLB0_SIZE (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM)
114#define KVM_E500_TLB1_SIZE 16
115
116#define index_of(tlbsel, esel) (((tlbsel) << 16) | ((esel) & 0xFFFF))
117#define tlbsel_of(index) ((index) >> 16)
118#define esel_of(index) ((index) & 0xFFFF)
119
120#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
121#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
122#define MAS2_ATTRIB_MASK \
ca8ccbd4 123 (MAS2_X0 | MAS2_X1 | MAS2_E | MAS2_G)
bc8080cb
HB
124#define MAS3_ATTRIB_MASK \
125 (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
126 | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
127
52e1718c
SW
128int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500,
129 ulong value);
130int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu);
131int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu);
7cdd7a95
MC
132int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, gva_t ea);
133int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int type, gva_t ea);
134int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, gva_t ea);
52e1718c
SW
135int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500);
136void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500);
137
138void kvmppc_get_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
139int kvmppc_set_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
bc8080cb 140
a85d2aa2
MC
141int kvmppc_get_one_reg_e500_tlb(struct kvm_vcpu *vcpu, u64 id,
142 union kvmppc_one_reg *val);
143int kvmppc_set_one_reg_e500_tlb(struct kvm_vcpu *vcpu, u64 id,
144 union kvmppc_one_reg *val);
8fdd21a2 145
bf7ca4bd 146#ifdef CONFIG_KVM_E500V2
8fdd21a2
SW
147unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,
148 unsigned int as, unsigned int gid,
149 unsigned int pr, int avoid_recursion);
150#endif
151
bc8080cb 152/* TLB helper functions */
dc83b8bc
SW
153static inline unsigned int
154get_tlb_size(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 155{
0cfb50e5 156 return (tlbe->mas1 >> 7) & 0x1f;
bc8080cb
HB
157}
158
dc83b8bc 159static inline gva_t get_tlb_eaddr(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 160{
e9666ea1 161 return tlbe->mas2 & MAS2_EPN;
bc8080cb
HB
162}
163
dc83b8bc 164static inline u64 get_tlb_bytes(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
165{
166 unsigned int pgsize = get_tlb_size(tlbe);
0cfb50e5 167 return 1ULL << 10 << pgsize;
bc8080cb
HB
168}
169
dc83b8bc 170static inline gva_t get_tlb_end(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
171{
172 u64 bytes = get_tlb_bytes(tlbe);
173 return get_tlb_eaddr(tlbe) + bytes - 1;
174}
175
dc83b8bc 176static inline u64 get_tlb_raddr(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 177{
dc83b8bc 178 return tlbe->mas7_3 & ~0xfffULL;
bc8080cb
HB
179}
180
dc83b8bc
SW
181static inline unsigned int
182get_tlb_tid(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
183{
184 return (tlbe->mas1 >> 16) & 0xff;
185}
186
dc83b8bc
SW
187static inline unsigned int
188get_tlb_ts(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
189{
190 return (tlbe->mas1 >> 12) & 0x1;
191}
192
dc83b8bc
SW
193static inline unsigned int
194get_tlb_v(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
195{
196 return (tlbe->mas1 >> 31) & 0x1;
197}
198
dc83b8bc
SW
199static inline unsigned int
200get_tlb_iprot(const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
201{
202 return (tlbe->mas1 >> 30) & 0x1;
203}
204
8fdd21a2
SW
205static inline unsigned int
206get_tlb_tsize(const struct kvm_book3e_206_tlb_entry *tlbe)
207{
208 return (tlbe->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
209}
210
bc8080cb
HB
211static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu)
212{
213 return vcpu->arch.pid & 0xff;
214}
215
dd9ebf1f
LY
216static inline unsigned int get_cur_as(struct kvm_vcpu *vcpu)
217{
218 return !!(vcpu->arch.shared->msr & (MSR_IS | MSR_DS));
219}
220
221static inline unsigned int get_cur_pr(struct kvm_vcpu *vcpu)
222{
223 return !!(vcpu->arch.shared->msr & MSR_PR);
224}
225
b5904972 226static inline unsigned int get_cur_spid(const struct kvm_vcpu *vcpu)
bc8080cb 227{
b5904972 228 return (vcpu->arch.shared->mas6 >> 16) & 0xff;
bc8080cb
HB
229}
230
b5904972 231static inline unsigned int get_cur_sas(const struct kvm_vcpu *vcpu)
bc8080cb 232{
b5904972 233 return vcpu->arch.shared->mas6 & 0x1;
bc8080cb
HB
234}
235
b5904972 236static inline unsigned int get_tlb_tlbsel(const struct kvm_vcpu *vcpu)
bc8080cb
HB
237{
238 /*
239 * Manual says that tlbsel has 2 bits wide.
fb2838d4 240 * Since we only have two TLBs, only lower bit is used.
bc8080cb 241 */
b5904972 242 return (vcpu->arch.shared->mas0 >> 28) & 0x1;
bc8080cb
HB
243}
244
b5904972 245static inline unsigned int get_tlb_nv_bit(const struct kvm_vcpu *vcpu)
bc8080cb 246{
b5904972 247 return vcpu->arch.shared->mas0 & 0xfff;
bc8080cb
HB
248}
249
b5904972 250static inline unsigned int get_tlb_esel_bit(const struct kvm_vcpu *vcpu)
bc8080cb 251{
b5904972 252 return (vcpu->arch.shared->mas0 >> 16) & 0xfff;
bc8080cb
HB
253}
254
bc8080cb 255static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
dc83b8bc 256 const struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb
HB
257{
258 gpa_t gpa;
259
260 if (!get_tlb_v(tlbe))
261 return 0;
262
73196cd3 263#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb
HB
264 /* Does it match current guest AS? */
265 /* XXX what about IS != DS? */
666e7252 266 if (get_tlb_ts(tlbe) != !!(vcpu->arch.shared->msr & MSR_IS))
bc8080cb 267 return 0;
73196cd3 268#endif
bc8080cb
HB
269
270 gpa = get_tlb_raddr(tlbe);
271 if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
272 /* Mapping is not for RAM. */
273 return 0;
274
275 return 1;
276}
277
8fdd21a2
SW
278static inline struct kvm_book3e_206_tlb_entry *get_entry(
279 struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)
280{
281 int offset = vcpu_e500->gtlb_offset[tlbsel];
282 return &vcpu_e500->gtlb_arch[offset + entry];
283}
284
285void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
286 struct kvm_book3e_206_tlb_entry *gtlbe);
287void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500);
288
73196cd3
SW
289#ifdef CONFIG_KVM_BOOKE_HV
290#define kvmppc_e500_get_tlb_stid(vcpu, gtlbe) get_tlb_tid(gtlbe)
291#define get_tlbmiss_tid(vcpu) get_cur_pid(vcpu)
292#define get_tlb_sts(gtlbe) (gtlbe->mas1 & MAS1_TS)
188e267c
MC
293
294/*
295 * These functions should be called with preemption disabled
296 * and the returned value is valid only in that context
297 */
298static inline int get_thread_specific_lpid(int vm_lpid)
299{
300 int vcpu_lpid = vm_lpid;
301
302 if (threads_per_core == 2)
303 vcpu_lpid |= smp_processor_id() & 1;
304
305 return vcpu_lpid;
306}
307
308static inline int get_lpid(struct kvm_vcpu *vcpu)
309{
310 return get_thread_specific_lpid(vcpu->kvm->arch.lpid);
311}
73196cd3 312#else
8fdd21a2
SW
313unsigned int kvmppc_e500_get_tlb_stid(struct kvm_vcpu *vcpu,
314 struct kvm_book3e_206_tlb_entry *gtlbe);
315
316static inline unsigned int get_tlbmiss_tid(struct kvm_vcpu *vcpu)
317{
318 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
319 unsigned int tidseld = (vcpu->arch.shared->mas4 >> 16) & 0xf;
320
321 return vcpu_e500->pid[tidseld];
322}
323
324/* Force TS=1 for all guest mappings. */
325#define get_tlb_sts(gtlbe) (MAS1_TS)
73196cd3 326#endif /* !BOOKE_HV */
8fdd21a2 327
307d9008
MC
328static inline bool has_feature(const struct kvm_vcpu *vcpu,
329 enum vcpu_ftr ftr)
330{
331 bool has_ftr;
332 switch (ftr) {
333 case VCPU_FTR_MMU_V2:
334 has_ftr = ((vcpu->arch.mmucfg & MMUCFG_MAVN) == MMUCFG_MAVN_V2);
335 break;
336 default:
337 return false;
338 }
339 return has_ftr;
340}
341
29a5a6f9 342#endif /* KVM_E500_H */
This page took 0.344804 seconds and 5 git commands to generate.