projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #include <linux/types.h> |
| 2 | #include <linux/errno.h> | |
| 3 | #include <asm/uaccess.h> | |
| 4 | ||
| d2b194ed KG |
5 | #include <asm/sfp-machine.h> |
| 6 | #include <math-emu/soft-fp.h> | |
| 1da177e4 LT |
7 | |
| 8 | int | |
| 9 | mtfsf(unsigned int FM, u32 *frB) | |
| 10 | { | |
| 11 | u32 mask; | |
| d2b194ed | 12 | u32 fpscr; |
| 1da177e4 | 13 | |
| c59c015b SC |
14 | if (likely(FM == 1)) |
| 15 | mask = 0x0f; | |
| 16 | else if (likely(FM == 0xff)) | |
| 17 | mask = ~0; | |
| 1da177e4 | 18 | else { |
| c59c015b SC |
19 | mask = ((FM & 1) | |
| 20 | ((FM << 3) & 0x10) | | |
| 21 | ((FM << 6) & 0x100) | | |
| 22 | ((FM << 9) & 0x1000) | | |
| 23 | ((FM << 12) & 0x10000) | | |
| 24 | ((FM << 15) & 0x100000) | | |
| 25 | ((FM << 18) & 0x1000000) | | |
| 26 | ((FM << 21) & 0x10000000)) * 15; | |
| 1da177e4 LT |
27 | } |
| 28 | ||
| c59c015b SC |
29 | fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) & |
| 30 | ~(FPSCR_VX | FPSCR_FEX | 0x800); | |
| 1da177e4 | 31 | |
| c59c015b | 32 | if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | |
| d2b194ed KG |
33 | FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC | |
| 34 | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI)) | |
| c59c015b SC |
35 | fpscr |= FPSCR_VX; |
| 36 | ||
| 37 | /* The bit order of exception enables and exception status | |
| 38 | * is the same. Simply shift and mask to check for enabled | |
| 39 | * exceptions. | |
| 40 | */ | |
| 41 | if (fpscr & (fpscr >> 22) & 0xf8) | |
| d2b194ed | 42 | fpscr |= FPSCR_FEX; |
| c59c015b | 43 | |
| d2b194ed KG |
44 | __FPU_FPSCR = fpscr; |
| 45 | ||
| 1da177e4 | 46 | #ifdef DEBUG |
| e48b1b45 | 47 | printk("%s: %02x %p: %08lx\n", __func__, FM, frB, __FPU_FPSCR); |
| 1da177e4 LT |
48 | #endif |
| 49 | ||
| 50 | return 0; | |
| 51 | } |