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1 | /* |
2 | * Author: Andy Fleming <afleming@freescale.com> | |
3 | * Kumar Gala <galak@kernel.crashing.org> | |
4 | * | |
5 | * Copyright 2006-2008 Freescale Semiconductor Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; either version 2 of the License, or (at your | |
10 | * option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/stddef.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/of.h> | |
18 | ||
19 | #include <asm/machdep.h> | |
20 | #include <asm/pgtable.h> | |
21 | #include <asm/page.h> | |
22 | #include <asm/mpic.h> | |
23 | #include <asm/cacheflush.h> | |
24 | ||
25 | #include <sysdev/fsl_soc.h> | |
26 | ||
27 | extern volatile unsigned long __secondary_hold_acknowledge; | |
28 | extern void __early_start(void); | |
29 | ||
30 | #define BOOT_ENTRY_ADDR_UPPER 0 | |
31 | #define BOOT_ENTRY_ADDR_LOWER 1 | |
32 | #define BOOT_ENTRY_R3_UPPER 2 | |
33 | #define BOOT_ENTRY_R3_LOWER 3 | |
34 | #define BOOT_ENTRY_RESV 4 | |
35 | #define BOOT_ENTRY_PIR 5 | |
36 | #define BOOT_ENTRY_R6_UPPER 6 | |
37 | #define BOOT_ENTRY_R6_LOWER 7 | |
38 | #define NUM_BOOT_ENTRY 8 | |
39 | #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32)) | |
40 | ||
41 | static void __init | |
42 | smp_85xx_kick_cpu(int nr) | |
43 | { | |
44 | unsigned long flags; | |
45 | const u64 *cpu_rel_addr; | |
46 | __iomem u32 *bptr_vaddr; | |
47 | struct device_node *np; | |
48 | int n = 0; | |
49 | ||
50 | WARN_ON (nr < 0 || nr >= NR_CPUS); | |
51 | ||
52 | pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr); | |
53 | ||
54 | local_irq_save(flags); | |
55 | ||
56 | np = of_get_cpu_node(nr, NULL); | |
57 | cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL); | |
58 | ||
59 | if (cpu_rel_addr == NULL) { | |
60 | printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr); | |
870029a6 | 61 | local_irq_restore(flags); |
d5b26db2 KG |
62 | return; |
63 | } | |
64 | ||
65 | /* Map the spin table */ | |
66 | bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); | |
67 | ||
68 | out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr); | |
69 | out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); | |
70 | ||
71 | /* Wait a bit for the CPU to ack. */ | |
72 | while ((__secondary_hold_acknowledge != nr) && (++n < 1000)) | |
73 | mdelay(1); | |
74 | ||
75 | iounmap(bptr_vaddr); | |
76 | ||
77 | local_irq_restore(flags); | |
78 | ||
79 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); | |
80 | } | |
81 | ||
82 | static void __init | |
83 | smp_85xx_setup_cpu(int cpu_nr) | |
84 | { | |
85 | mpic_setup_this_cpu(); | |
86 | ||
87 | /* Clear any pending timer interrupts */ | |
88 | mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); | |
89 | ||
90 | /* Enable decrementer interrupt */ | |
91 | mtspr(SPRN_TCR, TCR_DIE); | |
92 | } | |
93 | ||
94 | struct smp_ops_t smp_85xx_ops = { | |
95 | .message_pass = smp_mpic_message_pass, | |
96 | .probe = smp_mpic_probe, | |
97 | .kick_cpu = smp_85xx_kick_cpu, | |
98 | .setup_cpu = smp_85xx_setup_cpu, | |
99 | }; | |
100 | ||
101 | void __init | |
102 | mpc85xx_smp_init(void) | |
103 | { | |
104 | smp_ops = &smp_85xx_ops; | |
105 | } |