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d5b26db2 KG |
1 | /* |
2 | * Author: Andy Fleming <afleming@freescale.com> | |
3 | * Kumar Gala <galak@kernel.crashing.org> | |
4 | * | |
5 | * Copyright 2006-2008 Freescale Semiconductor Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; either version 2 of the License, or (at your | |
10 | * option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/stddef.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/of.h> | |
18 | ||
19 | #include <asm/machdep.h> | |
20 | #include <asm/pgtable.h> | |
21 | #include <asm/page.h> | |
22 | #include <asm/mpic.h> | |
23 | #include <asm/cacheflush.h> | |
563fdd4a | 24 | #include <asm/dbell.h> |
d5b26db2 KG |
25 | |
26 | #include <sysdev/fsl_soc.h> | |
27 | ||
28 | extern volatile unsigned long __secondary_hold_acknowledge; | |
29 | extern void __early_start(void); | |
30 | ||
31 | #define BOOT_ENTRY_ADDR_UPPER 0 | |
32 | #define BOOT_ENTRY_ADDR_LOWER 1 | |
33 | #define BOOT_ENTRY_R3_UPPER 2 | |
34 | #define BOOT_ENTRY_R3_LOWER 3 | |
35 | #define BOOT_ENTRY_RESV 4 | |
36 | #define BOOT_ENTRY_PIR 5 | |
37 | #define BOOT_ENTRY_R6_UPPER 6 | |
38 | #define BOOT_ENTRY_R6_LOWER 7 | |
39 | #define NUM_BOOT_ENTRY 8 | |
40 | #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32)) | |
41 | ||
42 | static void __init | |
43 | smp_85xx_kick_cpu(int nr) | |
44 | { | |
45 | unsigned long flags; | |
46 | const u64 *cpu_rel_addr; | |
47 | __iomem u32 *bptr_vaddr; | |
48 | struct device_node *np; | |
49 | int n = 0; | |
50 | ||
51 | WARN_ON (nr < 0 || nr >= NR_CPUS); | |
52 | ||
53 | pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr); | |
54 | ||
55 | local_irq_save(flags); | |
56 | ||
57 | np = of_get_cpu_node(nr, NULL); | |
58 | cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL); | |
59 | ||
60 | if (cpu_rel_addr == NULL) { | |
61 | printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr); | |
870029a6 | 62 | local_irq_restore(flags); |
d5b26db2 KG |
63 | return; |
64 | } | |
65 | ||
66 | /* Map the spin table */ | |
67 | bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); | |
68 | ||
69 | out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr); | |
70 | out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); | |
71 | ||
72 | /* Wait a bit for the CPU to ack. */ | |
73 | while ((__secondary_hold_acknowledge != nr) && (++n < 1000)) | |
74 | mdelay(1); | |
75 | ||
76 | iounmap(bptr_vaddr); | |
77 | ||
78 | local_irq_restore(flags); | |
79 | ||
80 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); | |
81 | } | |
82 | ||
83 | static void __init | |
563fdd4a | 84 | smp_85xx_basic_setup(int cpu_nr) |
d5b26db2 | 85 | { |
d5b26db2 KG |
86 | /* Clear any pending timer interrupts */ |
87 | mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); | |
88 | ||
89 | /* Enable decrementer interrupt */ | |
90 | mtspr(SPRN_TCR, TCR_DIE); | |
91 | } | |
92 | ||
563fdd4a KG |
93 | static void __init |
94 | smp_85xx_setup_cpu(int cpu_nr) | |
95 | { | |
96 | mpic_setup_this_cpu(); | |
97 | ||
98 | smp_85xx_basic_setup(cpu_nr); | |
99 | } | |
100 | ||
d5b26db2 | 101 | struct smp_ops_t smp_85xx_ops = { |
d5b26db2 | 102 | .kick_cpu = smp_85xx_kick_cpu, |
d5b26db2 KG |
103 | }; |
104 | ||
563fdd4a | 105 | static int __init smp_dummy_probe(void) |
d5b26db2 | 106 | { |
563fdd4a KG |
107 | return NR_CPUS; |
108 | } | |
109 | ||
110 | void __init mpc85xx_smp_init(void) | |
111 | { | |
112 | struct device_node *np; | |
113 | ||
114 | smp_85xx_ops.message_pass = NULL; | |
115 | ||
116 | np = of_find_node_by_type(NULL, "open-pic"); | |
117 | if (np) { | |
118 | smp_85xx_ops.probe = smp_mpic_probe; | |
119 | smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu; | |
120 | smp_85xx_ops.message_pass = smp_mpic_message_pass; | |
121 | } else { | |
122 | smp_85xx_ops.probe = smp_dummy_probe; | |
123 | smp_85xx_ops.setup_cpu = smp_85xx_basic_setup; | |
124 | } | |
125 | ||
126 | if (cpu_has_feature(CPU_FTR_DBELL)) | |
127 | smp_85xx_ops.message_pass = smp_dbell_message_pass; | |
128 | ||
129 | BUG_ON(!smp_85xx_ops.message_pass); | |
130 | ||
d5b26db2 KG |
131 | smp_ops = &smp_85xx_ops; |
132 | } |