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32f39b05 IK |
1 | /* |
2 | * Celleb/Beat Interrupt controller | |
3 | * | |
4 | * (C) Copyright 2006-2007 TOSHIBA CORPORATION | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along | |
17 | * with this program; if not, write to the Free Software Foundation, Inc., | |
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
19 | */ | |
20 | ||
21 | #include <linux/init.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/percpu.h> | |
25 | #include <linux/types.h> | |
26 | ||
27 | #include <asm/machdep.h> | |
28 | ||
29 | #include "interrupt.h" | |
30 | #include "beat_wrapper.h" | |
31 | ||
32 | #define MAX_IRQS NR_IRQS | |
33 | static DEFINE_SPINLOCK(beatic_irq_mask_lock); | |
34 | static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64]; | |
35 | static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64]; | |
36 | ||
37 | static struct irq_host *beatic_host = NULL; | |
38 | ||
39 | /* | |
40 | * In this implementation, "virq" == "IRQ plug number", | |
41 | * "(irq_hw_number_t)hwirq" == "IRQ outlet number". | |
42 | */ | |
43 | ||
44 | /* assumption: locked */ | |
45 | static inline void beatic_update_irq_mask(unsigned int irq_plug) | |
46 | { | |
47 | int off; | |
48 | unsigned long masks[4]; | |
49 | ||
50 | off = (irq_plug / 256) * 4; | |
51 | masks[0] = beatic_irq_mask_enable[off + 0] | |
52 | & beatic_irq_mask_ack[off + 0]; | |
53 | masks[1] = beatic_irq_mask_enable[off + 1] | |
54 | & beatic_irq_mask_ack[off + 1]; | |
55 | masks[2] = beatic_irq_mask_enable[off + 2] | |
56 | & beatic_irq_mask_ack[off + 2]; | |
57 | masks[3] = beatic_irq_mask_enable[off + 3] | |
58 | & beatic_irq_mask_ack[off + 3]; | |
59 | if (beat_set_interrupt_mask(irq_plug&~255UL, | |
60 | masks[0], masks[1], masks[2], masks[3]) != 0) | |
61 | panic("Failed to set mask IRQ!"); | |
62 | } | |
63 | ||
64 | static void beatic_mask_irq(unsigned int irq_plug) | |
65 | { | |
66 | unsigned long flags; | |
67 | ||
68 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | |
69 | beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); | |
70 | beatic_update_irq_mask(irq_plug); | |
71 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | |
72 | } | |
73 | ||
74 | static void beatic_unmask_irq(unsigned int irq_plug) | |
75 | { | |
76 | unsigned long flags; | |
77 | ||
78 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | |
79 | beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); | |
80 | beatic_update_irq_mask(irq_plug); | |
81 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | |
82 | } | |
83 | ||
84 | static void beatic_ack_irq(unsigned int irq_plug) | |
85 | { | |
86 | unsigned long flags; | |
87 | ||
88 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | |
89 | beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); | |
90 | beatic_update_irq_mask(irq_plug); | |
91 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | |
92 | } | |
93 | ||
94 | static void beatic_end_irq(unsigned int irq_plug) | |
95 | { | |
96 | s64 err; | |
97 | unsigned long flags; | |
98 | ||
99 | if ((err = beat_downcount_of_interrupt(irq_plug)) != 0) { | |
100 | if ((err & 0xFFFFFFFF) != 0xFFFFFFF5) /* -11: wrong state */ | |
101 | panic("Failed to downcount IRQ! Error = %16lx", err); | |
102 | ||
103 | printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug); | |
104 | } | |
105 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | |
106 | beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); | |
107 | beatic_update_irq_mask(irq_plug); | |
108 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | |
109 | } | |
110 | ||
111 | static struct irq_chip beatic_pic = { | |
112 | .typename = " CELL-BEAT ", | |
113 | .unmask = beatic_unmask_irq, | |
114 | .mask = beatic_mask_irq, | |
115 | .eoi = beatic_end_irq, | |
116 | }; | |
117 | ||
118 | /* | |
119 | * Dispose binding hardware IRQ number (hw) and Virtuql IRQ number (virq), | |
120 | * update flags. | |
121 | * | |
122 | * Note that the number (virq) is already assigned at upper layer. | |
123 | */ | |
124 | static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq) | |
125 | { | |
126 | beat_destruct_irq_plug(virq); | |
127 | } | |
128 | ||
129 | /* | |
130 | * Create or update binding hardware IRQ number (hw) and Virtuql | |
131 | * IRQ number (virq). This is called only once for a given mapping. | |
132 | * | |
133 | * Note that the number (virq) is already assigned at upper layer. | |
134 | */ | |
135 | static int beatic_pic_host_map(struct irq_host *h, unsigned int virq, | |
136 | irq_hw_number_t hw) | |
137 | { | |
138 | struct irq_desc *desc = get_irq_desc(virq); | |
139 | int64_t err; | |
140 | ||
141 | if ((err = beat_construct_and_connect_irq_plug(virq, hw)) < 0) | |
142 | return -EIO; | |
143 | ||
144 | desc->status |= IRQ_LEVEL; | |
145 | set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq); | |
146 | return 0; | |
147 | } | |
148 | ||
149 | /* | |
150 | * Update binding hardware IRQ number (hw) and Virtuql | |
151 | * IRQ number (virq). This is called only once for a given mapping. | |
152 | */ | |
153 | static void beatic_pic_host_remap(struct irq_host *h, unsigned int virq, | |
154 | irq_hw_number_t hw) | |
155 | { | |
156 | beat_construct_and_connect_irq_plug(virq, hw); | |
157 | } | |
158 | ||
159 | /* | |
160 | * Translate device-tree interrupt spec to irq_hw_number_t style (ulong), | |
161 | * to pass away to irq_create_mapping(). | |
162 | * | |
163 | * Called from irq_create_of_mapping() only. | |
164 | * Note: We have only 1 entry to translate. | |
165 | */ | |
166 | static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct, | |
167 | u32 *intspec, unsigned int intsize, | |
168 | irq_hw_number_t *out_hwirq, | |
169 | unsigned int *out_flags) | |
170 | { | |
171 | u64 *intspec2 = (u64 *)intspec; | |
172 | ||
173 | *out_hwirq = *intspec2; | |
174 | *out_flags |= IRQ_TYPE_LEVEL_LOW; | |
175 | return 0; | |
176 | } | |
177 | ||
178 | static struct irq_host_ops beatic_pic_host_ops = { | |
179 | .map = beatic_pic_host_map, | |
180 | .remap = beatic_pic_host_remap, | |
181 | .unmap = beatic_pic_host_unmap, | |
182 | .xlate = beatic_pic_host_xlate, | |
183 | }; | |
184 | ||
185 | /* | |
186 | * Get an IRQ number | |
187 | * Note: returns VIRQ | |
188 | */ | |
189 | static inline unsigned int beatic_get_irq_plug(void) | |
190 | { | |
191 | int i; | |
192 | uint64_t pending[4], ub; | |
193 | ||
194 | for (i = 0; i < MAX_IRQS; i += 256) { | |
195 | beat_detect_pending_interrupts(i, pending); | |
196 | __asm__ ("cntlzd %0,%1":"=r"(ub): | |
197 | "r"(pending[0] & beatic_irq_mask_enable[i/64+0] | |
198 | & beatic_irq_mask_ack[i/64+0])); | |
199 | if (ub != 64) | |
200 | return i + ub + 0; | |
201 | __asm__ ("cntlzd %0,%1":"=r"(ub): | |
202 | "r"(pending[1] & beatic_irq_mask_enable[i/64+1] | |
203 | & beatic_irq_mask_ack[i/64+1])); | |
204 | if (ub != 64) | |
205 | return i + ub + 64; | |
206 | __asm__ ("cntlzd %0,%1":"=r"(ub): | |
207 | "r"(pending[2] & beatic_irq_mask_enable[i/64+2] | |
208 | & beatic_irq_mask_ack[i/64+2])); | |
209 | if (ub != 64) | |
210 | return i + ub + 128; | |
211 | __asm__ ("cntlzd %0,%1":"=r"(ub): | |
212 | "r"(pending[3] & beatic_irq_mask_enable[i/64+3] | |
213 | & beatic_irq_mask_ack[i/64+3])); | |
214 | if (ub != 64) | |
215 | return i + ub + 192; | |
216 | } | |
217 | ||
218 | return NO_IRQ; | |
219 | } | |
220 | unsigned int beatic_get_irq(void) | |
221 | { | |
222 | unsigned int ret; | |
223 | ||
224 | ret = beatic_get_irq_plug(); | |
225 | if (ret != NO_IRQ) | |
226 | beatic_ack_irq(ret); | |
227 | return ret; | |
228 | } | |
229 | ||
230 | /* | |
231 | */ | |
232 | void __init beatic_init_IRQ(void) | |
233 | { | |
234 | int i; | |
235 | ||
236 | memset(beatic_irq_mask_enable, 0, sizeof(beatic_irq_mask_enable)); | |
237 | memset(beatic_irq_mask_ack, 255, sizeof(beatic_irq_mask_ack)); | |
238 | for (i = 0; i < MAX_IRQS; i += 256) | |
239 | beat_set_interrupt_mask(i, 0L, 0L, 0L, 0L); | |
240 | ||
241 | /* Set out get_irq function */ | |
242 | ppc_md.get_irq = beatic_get_irq; | |
243 | ||
244 | /* Allocate an irq host */ | |
52964f87 | 245 | beatic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0, |
32f39b05 IK |
246 | &beatic_pic_host_ops, |
247 | 0); | |
248 | BUG_ON(beatic_host == NULL); | |
249 | irq_set_default_host(beatic_host); | |
250 | } | |
251 | ||
252 | #ifdef CONFIG_SMP | |
253 | ||
254 | /* Nullified to compile with SMP mode */ | |
255 | void beatic_setup_cpu(int cpu) | |
256 | { | |
257 | } | |
258 | ||
259 | void beatic_cause_IPI(int cpu, int mesg) | |
260 | { | |
261 | } | |
262 | ||
263 | void beatic_request_IPIs(void) | |
264 | { | |
265 | } | |
266 | #endif /* CONFIG_SMP */ | |
267 | ||
268 | void beatic_deinit_IRQ(void) | |
269 | { | |
270 | int i; | |
271 | ||
272 | for (i = 1; i < NR_IRQS; i++) | |
273 | beat_destruct_irq_plug(i); | |
274 | } |