Commit | Line | Data |
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0c3b4f1a SR |
1 | /* |
2 | * This module supports the iSeries PCI bus interrupt handling | |
3 | * Copyright (C) 20yy <Robert L Holtorf> <IBM Corp> | |
89ef68f0 | 4 | * Copyright (C) 2004-2005 IBM Corporation |
0c3b4f1a SR |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the: | |
18 | * Free Software Foundation, Inc., | |
19 | * 59 Temple Place, Suite 330, | |
20 | * Boston, MA 02111-1307 USA | |
21 | * | |
22 | * Change Activity: | |
23 | * Created, December 13, 2000 by Wayne Holm | |
24 | * End Change Activity | |
25 | */ | |
1da177e4 LT |
26 | #include <linux/pci.h> |
27 | #include <linux/init.h> | |
28 | #include <linux/threads.h> | |
29 | #include <linux/smp.h> | |
30 | #include <linux/param.h> | |
31 | #include <linux/string.h> | |
32 | #include <linux/bootmem.h> | |
1da177e4 LT |
33 | #include <linux/irq.h> |
34 | #include <linux/spinlock.h> | |
1da177e4 | 35 | |
e199500c | 36 | #include <asm/paca.h> |
1ec65d76 | 37 | #include <asm/iseries/hv_types.h> |
e45423ea | 38 | #include <asm/iseries/hv_lp_event.h> |
8021b8a7 | 39 | #include <asm/iseries/hv_call_xm.h> |
e199500c | 40 | #include <asm/iseries/it_lp_queue.h> |
b08567cb SR |
41 | |
42 | #include "irq.h" | |
0d177df1 | 43 | #include "pci.h" |
c6d2ea92 | 44 | #include "call_pci.h" |
e199500c | 45 | |
ee2cdece SR |
46 | #ifdef CONFIG_PCI |
47 | ||
60798c6a SR |
48 | enum pci_event_type { |
49 | pe_bus_created = 0, /* PHB has been created */ | |
50 | pe_bus_error = 1, /* PHB has failed */ | |
51 | pe_bus_failed = 2, /* Msg to Secondary, Primary failed bus */ | |
52 | pe_node_failed = 4, /* Multi-adapter bridge has failed */ | |
53 | pe_node_recovered = 5, /* Multi-adapter bridge has recovered */ | |
54 | pe_bus_recovered = 12, /* PHB has been recovered */ | |
55 | pe_unquiese_bus = 18, /* Secondary bus unqiescing */ | |
56 | pe_bridge_error = 21, /* Bridge Error */ | |
57 | pe_slot_interrupt = 22 /* Slot interrupt */ | |
89ef68f0 SR |
58 | }; |
59 | ||
60798c6a SR |
60 | struct pci_event { |
61 | struct HvLpEvent event; | |
89ef68f0 | 62 | union { |
60798c6a | 63 | u64 __align; /* Align on an 8-byte boundary */ |
89ef68f0 SR |
64 | struct { |
65 | u32 fisr; | |
60798c6a SR |
66 | HvBusNumber bus_number; |
67 | HvSubBusNumber sub_bus_number; | |
68 | HvAgentId dev_id; | |
69 | } slot; | |
70 | struct { | |
71 | HvBusNumber bus_number; | |
72 | HvSubBusNumber sub_bus_number; | |
73 | } bus; | |
74 | struct { | |
75 | HvBusNumber bus_number; | |
76 | HvSubBusNumber sub_bus_number; | |
77 | HvAgentId dev_id; | |
78 | } node; | |
79 | } data; | |
89ef68f0 SR |
80 | }; |
81 | ||
1d7a6b97 SR |
82 | static DEFINE_SPINLOCK(pending_irqs_lock); |
83 | static int num_pending_irqs; | |
84 | static int pending_irqs[NR_IRQS]; | |
85 | ||
35a84c2f | 86 | static void int_received(struct pci_event *event) |
89ef68f0 SR |
87 | { |
88 | int irq; | |
89 | ||
60798c6a SR |
90 | switch (event->event.xSubtype) { |
91 | case pe_slot_interrupt: | |
92 | irq = event->event.xCorrelationToken; | |
1d7a6b97 SR |
93 | if (irq < NR_IRQS) { |
94 | spin_lock(&pending_irqs_lock); | |
95 | pending_irqs[irq]++; | |
96 | num_pending_irqs++; | |
97 | spin_unlock(&pending_irqs_lock); | |
98 | } else { | |
99 | printk(KERN_WARNING "int_received: bad irq number %d\n", | |
100 | irq); | |
101 | HvCallPci_eoi(event->data.slot.bus_number, | |
102 | event->data.slot.sub_bus_number, | |
103 | event->data.slot.dev_id); | |
104 | } | |
89ef68f0 SR |
105 | break; |
106 | /* Ignore error recovery events for now */ | |
60798c6a SR |
107 | case pe_bus_created: |
108 | printk(KERN_INFO "int_received: system bus %d created\n", | |
109 | event->data.bus.bus_number); | |
89ef68f0 | 110 | break; |
60798c6a SR |
111 | case pe_bus_error: |
112 | case pe_bus_failed: | |
113 | printk(KERN_INFO "int_received: system bus %d failed\n", | |
114 | event->data.bus.bus_number); | |
89ef68f0 | 115 | break; |
60798c6a SR |
116 | case pe_bus_recovered: |
117 | case pe_unquiese_bus: | |
118 | printk(KERN_INFO "int_received: system bus %d recovered\n", | |
119 | event->data.bus.bus_number); | |
89ef68f0 | 120 | break; |
60798c6a SR |
121 | case pe_node_failed: |
122 | case pe_bridge_error: | |
89ef68f0 | 123 | printk(KERN_INFO |
60798c6a SR |
124 | "int_received: multi-adapter bridge %d/%d/%d failed\n", |
125 | event->data.node.bus_number, | |
126 | event->data.node.sub_bus_number, | |
127 | event->data.node.dev_id); | |
89ef68f0 | 128 | break; |
60798c6a | 129 | case pe_node_recovered: |
89ef68f0 | 130 | printk(KERN_INFO |
60798c6a SR |
131 | "int_received: multi-adapter bridge %d/%d/%d recovered\n", |
132 | event->data.node.bus_number, | |
133 | event->data.node.sub_bus_number, | |
134 | event->data.node.dev_id); | |
89ef68f0 SR |
135 | break; |
136 | default: | |
137 | printk(KERN_ERR | |
60798c6a SR |
138 | "int_received: unrecognized event subtype 0x%x\n", |
139 | event->event.xSubtype); | |
89ef68f0 SR |
140 | break; |
141 | } | |
142 | } | |
143 | ||
35a84c2f | 144 | static void pci_event_handler(struct HvLpEvent *event) |
89ef68f0 | 145 | { |
60798c6a | 146 | if (event && (event->xType == HvLpEvent_Type_PciIo)) { |
677f8c0d | 147 | if (hvlpevent_is_int(event)) |
35a84c2f | 148 | int_received((struct pci_event *)event); |
677f8c0d | 149 | else |
89ef68f0 | 150 | printk(KERN_ERR |
60798c6a | 151 | "pci_event_handler: unexpected ack received\n"); |
60798c6a | 152 | } else if (event) |
89ef68f0 | 153 | printk(KERN_ERR |
60798c6a SR |
154 | "pci_event_handler: Unrecognized PCI event type 0x%x\n", |
155 | (int)event->xType); | |
89ef68f0 | 156 | else |
60798c6a | 157 | printk(KERN_ERR "pci_event_handler: NULL event received\n"); |
89ef68f0 SR |
158 | } |
159 | ||
853f828c | 160 | #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff) |
0c3b4f1a SR |
161 | #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1) |
162 | #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1) | |
163 | #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7) | |
164 | ||
1da177e4 | 165 | /* |
0c3b4f1a SR |
166 | * This will be called by device drivers (via enable_IRQ) |
167 | * to enable INTA in the bridge interrupt status register. | |
1da177e4 | 168 | */ |
8f312ecf | 169 | static void iseries_enable_IRQ(struct irq_data *d) |
1da177e4 | 170 | { |
60798c6a SR |
171 | u32 bus, dev_id, function, mask; |
172 | const u32 sub_bus = 0; | |
476eb491 | 173 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
1da177e4 | 174 | |
0c3b4f1a SR |
175 | /* The IRQ has already been locked by the caller */ |
176 | bus = REAL_IRQ_TO_BUS(rirq); | |
177 | function = REAL_IRQ_TO_FUNC(rirq); | |
60798c6a | 178 | dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function; |
1da177e4 | 179 | |
0c3b4f1a SR |
180 | /* Unmask secondary INTA */ |
181 | mask = 0x80000000; | |
60798c6a | 182 | HvCallPci_unmaskInterrupts(bus, sub_bus, dev_id, mask); |
1da177e4 LT |
183 | } |
184 | ||
60798c6a | 185 | /* This is called by iseries_activate_IRQs */ |
8f312ecf | 186 | static unsigned int iseries_startup_IRQ(struct irq_data *d) |
1da177e4 | 187 | { |
60798c6a SR |
188 | u32 bus, dev_id, function, mask; |
189 | const u32 sub_bus = 0; | |
476eb491 | 190 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
1da177e4 LT |
191 | |
192 | bus = REAL_IRQ_TO_BUS(rirq); | |
193 | function = REAL_IRQ_TO_FUNC(rirq); | |
60798c6a | 194 | dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function; |
1da177e4 LT |
195 | |
196 | /* Link the IRQ number to the bridge */ | |
8f312ecf | 197 | HvCallXm_connectBusUnit(bus, sub_bus, dev_id, d->irq); |
1da177e4 LT |
198 | |
199 | /* Unmask bridge interrupts in the FISR */ | |
200 | mask = 0x01010000 << function; | |
60798c6a | 201 | HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask); |
8f312ecf | 202 | iseries_enable_IRQ(d); |
1da177e4 LT |
203 | return 0; |
204 | } | |
205 | ||
206 | /* | |
207 | * This is called out of iSeries_fixup to activate interrupt | |
208 | * generation for usable slots | |
209 | */ | |
210 | void __init iSeries_activate_IRQs() | |
211 | { | |
212 | int irq; | |
213 | unsigned long flags; | |
214 | ||
215 | for_each_irq (irq) { | |
6cff46f4 | 216 | struct irq_desc *desc = irq_to_desc(irq); |
8f312ecf | 217 | struct irq_chip *chip; |
1da177e4 | 218 | |
8f312ecf LB |
219 | if (!desc) |
220 | continue; | |
221 | ||
ec775d0e | 222 | chip = irq_desc_get_chip(desc); |
8f312ecf | 223 | if (chip && chip->irq_startup) { |
239007b8 | 224 | raw_spin_lock_irqsave(&desc->lock, flags); |
8f312ecf | 225 | chip->irq_startup(&desc->irq_data); |
239007b8 | 226 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 227 | } |
0c3b4f1a | 228 | } |
1da177e4 LT |
229 | } |
230 | ||
231 | /* this is not called anywhere currently */ | |
8f312ecf | 232 | static void iseries_shutdown_IRQ(struct irq_data *d) |
1da177e4 | 233 | { |
60798c6a SR |
234 | u32 bus, dev_id, function, mask; |
235 | const u32 sub_bus = 0; | |
476eb491 | 236 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
1da177e4 LT |
237 | |
238 | /* irq should be locked by the caller */ | |
239 | bus = REAL_IRQ_TO_BUS(rirq); | |
240 | function = REAL_IRQ_TO_FUNC(rirq); | |
60798c6a | 241 | dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function; |
1da177e4 LT |
242 | |
243 | /* Invalidate the IRQ number in the bridge */ | |
60798c6a | 244 | HvCallXm_connectBusUnit(bus, sub_bus, dev_id, 0); |
1da177e4 LT |
245 | |
246 | /* Mask bridge interrupts in the FISR */ | |
247 | mask = 0x01010000 << function; | |
60798c6a | 248 | HvCallPci_maskFisr(bus, sub_bus, dev_id, mask); |
1da177e4 LT |
249 | } |
250 | ||
251 | /* | |
252 | * This will be called by device drivers (via disable_IRQ) | |
253 | * to disable INTA in the bridge interrupt status register. | |
254 | */ | |
8f312ecf | 255 | static void iseries_disable_IRQ(struct irq_data *d) |
1da177e4 | 256 | { |
60798c6a SR |
257 | u32 bus, dev_id, function, mask; |
258 | const u32 sub_bus = 0; | |
476eb491 | 259 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
1da177e4 LT |
260 | |
261 | /* The IRQ has already been locked by the caller */ | |
262 | bus = REAL_IRQ_TO_BUS(rirq); | |
263 | function = REAL_IRQ_TO_FUNC(rirq); | |
60798c6a | 264 | dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function; |
1da177e4 LT |
265 | |
266 | /* Mask secondary INTA */ | |
267 | mask = 0x80000000; | |
60798c6a | 268 | HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask); |
1da177e4 LT |
269 | } |
270 | ||
8f312ecf | 271 | static void iseries_end_IRQ(struct irq_data *d) |
1da177e4 | 272 | { |
476eb491 | 273 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
853f828c SR |
274 | |
275 | HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq), | |
276 | (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq)); | |
1da177e4 | 277 | } |
0c3b4f1a | 278 | |
b9e5b4e6 | 279 | static struct irq_chip iseries_pic = { |
fc380c0c | 280 | .name = "iSeries", |
8f312ecf LB |
281 | .irq_startup = iseries_startup_IRQ, |
282 | .irq_shutdown = iseries_shutdown_IRQ, | |
283 | .irq_unmask = iseries_enable_IRQ, | |
284 | .irq_mask = iseries_disable_IRQ, | |
285 | .irq_eoi = iseries_end_IRQ | |
0c3b4f1a SR |
286 | }; |
287 | ||
288 | /* | |
289 | * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot | |
290 | * It calculates the irq value for the slot. | |
853f828c | 291 | * Note that sub_bus is always 0 (at the moment at least). |
0c3b4f1a | 292 | */ |
853f828c | 293 | int __init iSeries_allocate_IRQ(HvBusNumber bus, |
0d177df1 | 294 | HvSubBusNumber sub_bus, u32 bsubbus) |
0c3b4f1a | 295 | { |
d9ae2bad | 296 | unsigned int realirq; |
0d177df1 SR |
297 | u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus); |
298 | u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus); | |
0c3b4f1a | 299 | |
853f828c SR |
300 | realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3) |
301 | + function; | |
0ebfff14 | 302 | |
6e99e458 | 303 | return irq_create_mapping(NULL, realirq); |
0c3b4f1a | 304 | } |
e199500c | 305 | |
ee2cdece SR |
306 | #endif /* CONFIG_PCI */ |
307 | ||
e199500c SR |
308 | /* |
309 | * Get the next pending IRQ. | |
310 | */ | |
35a84c2f | 311 | unsigned int iSeries_get_irq(void) |
e199500c | 312 | { |
0ebfff14 | 313 | int irq = NO_IRQ_IGNORE; |
e199500c | 314 | |
e199500c | 315 | #ifdef CONFIG_SMP |
3356bb9f DG |
316 | if (get_lppaca()->int_dword.fields.ipi_cnt) { |
317 | get_lppaca()->int_dword.fields.ipi_cnt = 0; | |
23d72bfd | 318 | smp_ipi_demux(); |
e199500c SR |
319 | } |
320 | #endif /* CONFIG_SMP */ | |
321 | if (hvlpevent_is_pending()) | |
35a84c2f | 322 | process_hvlpevents(); |
e199500c | 323 | |
ee2cdece | 324 | #ifdef CONFIG_PCI |
1d7a6b97 SR |
325 | if (num_pending_irqs) { |
326 | spin_lock(&pending_irqs_lock); | |
327 | for (irq = 0; irq < NR_IRQS; irq++) { | |
328 | if (pending_irqs[irq]) { | |
329 | pending_irqs[irq]--; | |
330 | num_pending_irqs--; | |
331 | break; | |
332 | } | |
333 | } | |
334 | spin_unlock(&pending_irqs_lock); | |
335 | if (irq >= NR_IRQS) | |
0ebfff14 | 336 | irq = NO_IRQ_IGNORE; |
1d7a6b97 | 337 | } |
ee2cdece | 338 | #endif |
1d7a6b97 SR |
339 | |
340 | return irq; | |
e199500c | 341 | } |
0ebfff14 | 342 | |
be9e95b1 SR |
343 | #ifdef CONFIG_PCI |
344 | ||
0ebfff14 | 345 | static int iseries_irq_host_map(struct irq_host *h, unsigned int virq, |
6e99e458 | 346 | irq_hw_number_t hw) |
0ebfff14 | 347 | { |
ec775d0e | 348 | irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); |
0ebfff14 BH |
349 | |
350 | return 0; | |
351 | } | |
352 | ||
8528ab84 ME |
353 | static int iseries_irq_host_match(struct irq_host *h, struct device_node *np) |
354 | { | |
355 | /* Match all */ | |
356 | return 1; | |
357 | } | |
358 | ||
0ebfff14 BH |
359 | static struct irq_host_ops iseries_irq_host_ops = { |
360 | .map = iseries_irq_host_map, | |
8528ab84 | 361 | .match = iseries_irq_host_match, |
0ebfff14 BH |
362 | }; |
363 | ||
364 | /* | |
365 | * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c | |
366 | * It must be called before the bus walk. | |
367 | */ | |
368 | void __init iSeries_init_IRQ(void) | |
369 | { | |
370 | /* Register PCI event handler and open an event path */ | |
371 | struct irq_host *host; | |
372 | int ret; | |
373 | ||
374 | /* | |
375 | * The Hypervisor only allows us up to 256 interrupt | |
376 | * sources (the irq number is passed in a u8). | |
377 | */ | |
378 | irq_set_virq_count(256); | |
379 | ||
380 | /* Create irq host. No need for a revmap since HV will give us | |
381 | * back our virtual irq number | |
382 | */ | |
52964f87 ME |
383 | host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0, |
384 | &iseries_irq_host_ops, 0); | |
0ebfff14 BH |
385 | BUG_ON(host == NULL); |
386 | irq_set_default_host(host); | |
387 | ||
388 | ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo, | |
389 | &pci_event_handler); | |
390 | if (ret == 0) { | |
391 | ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0); | |
392 | if (ret != 0) | |
393 | printk(KERN_ERR "iseries_init_IRQ: open event path " | |
394 | "failed with rc 0x%x\n", ret); | |
395 | } else | |
396 | printk(KERN_ERR "iseries_init_IRQ: register handler " | |
397 | "failed with rc 0x%x\n", ret); | |
398 | } | |
399 | ||
be9e95b1 | 400 | #endif /* CONFIG_PCI */ |