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14cf11af | 1 | /* |
730745a5 | 2 | * arch/powerpc/platforms/powermac/low_i2c.c |
14cf11af | 3 | * |
730745a5 | 4 | * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org) |
14cf11af PM |
5 | * |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | * | |
730745a5 BH |
11 | * The linux i2c layer isn't completely suitable for our needs for various |
12 | * reasons ranging from too late initialisation to semantics not perfectly | |
13 | * matching some requirements of the apple platform functions etc... | |
14 | * | |
15 | * This file thus provides a simple low level unified i2c interface for | |
16 | * powermac that covers the various types of i2c busses used in Apple machines. | |
17 | * For now, keywest, PMU and SMU, though we could add Cuda, or other bit | |
18 | * banging busses found on older chipstes in earlier machines if we ever need | |
19 | * one of them. | |
20 | * | |
21 | * The drivers in this file are synchronous/blocking. In addition, the | |
22 | * keywest one is fairly slow due to the use of msleep instead of interrupts | |
23 | * as the interrupt is currently used by i2c-keywest. In the long run, we | |
24 | * might want to get rid of those high-level interfaces to linux i2c layer | |
25 | * either completely (converting all drivers) or replacing them all with a | |
26 | * single stub driver on top of this one. Once done, the interrupt will be | |
27 | * available for our use. | |
14cf11af PM |
28 | */ |
29 | ||
30 | #undef DEBUG | |
730745a5 | 31 | #undef DEBUG_LOW |
14cf11af | 32 | |
14cf11af PM |
33 | #include <linux/types.h> |
34 | #include <linux/sched.h> | |
35 | #include <linux/init.h> | |
4b16f8e2 | 36 | #include <linux/export.h> |
14cf11af PM |
37 | #include <linux/adb.h> |
38 | #include <linux/pmu.h> | |
730745a5 BH |
39 | #include <linux/delay.h> |
40 | #include <linux/completion.h> | |
a28d3af2 BH |
41 | #include <linux/platform_device.h> |
42 | #include <linux/interrupt.h> | |
a28d3af2 | 43 | #include <linux/timer.h> |
76a5b8bb | 44 | #include <linux/mutex.h> |
6dfa5ca3 | 45 | #include <linux/i2c.h> |
5a0e3ad6 | 46 | #include <linux/slab.h> |
14cf11af PM |
47 | #include <asm/keylargo.h> |
48 | #include <asm/uninorth.h> | |
49 | #include <asm/io.h> | |
50 | #include <asm/prom.h> | |
51 | #include <asm/machdep.h> | |
730745a5 | 52 | #include <asm/smu.h> |
5b9ca526 | 53 | #include <asm/pmac_pfunc.h> |
14cf11af PM |
54 | #include <asm/pmac_low_i2c.h> |
55 | ||
14cf11af PM |
56 | #ifdef DEBUG |
57 | #define DBG(x...) do {\ | |
51d3082f | 58 | printk(KERN_DEBUG "low_i2c:" x); \ |
14cf11af PM |
59 | } while(0) |
60 | #else | |
61 | #define DBG(x...) | |
62 | #endif | |
63 | ||
730745a5 BH |
64 | #ifdef DEBUG_LOW |
65 | #define DBG_LOW(x...) do {\ | |
66 | printk(KERN_DEBUG "low_i2c:" x); \ | |
67 | } while(0) | |
68 | #else | |
69 | #define DBG_LOW(x...) | |
70 | #endif | |
14cf11af | 71 | |
a28d3af2 BH |
72 | |
73 | static int pmac_i2c_force_poll = 1; | |
74 | ||
730745a5 BH |
75 | /* |
76 | * A bus structure. Each bus in the system has such a structure associated. | |
14cf11af | 77 | */ |
730745a5 | 78 | struct pmac_i2c_bus |
14cf11af | 79 | { |
730745a5 BH |
80 | struct list_head link; |
81 | struct device_node *controller; | |
82 | struct device_node *busnode; | |
83 | int type; | |
84 | int flags; | |
6dfa5ca3 | 85 | struct i2c_adapter adapter; |
730745a5 BH |
86 | void *hostdata; |
87 | int channel; /* some hosts have multiple */ | |
88 | int mode; /* current mode */ | |
76a5b8bb | 89 | struct mutex mutex; |
730745a5 BH |
90 | int opened; |
91 | int polled; /* open mode */ | |
a28d3af2 | 92 | struct platform_device *platform_dev; |
730745a5 BH |
93 | |
94 | /* ops */ | |
95 | int (*open)(struct pmac_i2c_bus *bus); | |
96 | void (*close)(struct pmac_i2c_bus *bus); | |
97 | int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, | |
98 | u32 subaddr, u8 *data, int len); | |
99 | }; | |
14cf11af | 100 | |
730745a5 | 101 | static LIST_HEAD(pmac_i2c_busses); |
14cf11af PM |
102 | |
103 | /* | |
730745a5 | 104 | * Keywest implementation |
14cf11af PM |
105 | */ |
106 | ||
730745a5 BH |
107 | struct pmac_i2c_host_kw |
108 | { | |
76a5b8bb | 109 | struct mutex mutex; /* Access mutex for use by |
730745a5 BH |
110 | * i2c-keywest */ |
111 | void __iomem *base; /* register base address */ | |
112 | int bsteps; /* register stepping */ | |
113 | int speed; /* speed */ | |
a28d3af2 BH |
114 | int irq; |
115 | u8 *data; | |
116 | unsigned len; | |
117 | int state; | |
118 | int rw; | |
119 | int polled; | |
120 | int result; | |
121 | struct completion complete; | |
122 | spinlock_t lock; | |
123 | struct timer_list timeout_timer; | |
730745a5 BH |
124 | }; |
125 | ||
14cf11af PM |
126 | /* Register indices */ |
127 | typedef enum { | |
128 | reg_mode = 0, | |
129 | reg_control, | |
130 | reg_status, | |
131 | reg_isr, | |
132 | reg_ier, | |
133 | reg_addr, | |
134 | reg_subaddr, | |
135 | reg_data | |
136 | } reg_t; | |
137 | ||
a28d3af2 BH |
138 | /* The Tumbler audio equalizer can be really slow sometimes */ |
139 | #define KW_POLL_TIMEOUT (2*HZ) | |
14cf11af PM |
140 | |
141 | /* Mode register */ | |
142 | #define KW_I2C_MODE_100KHZ 0x00 | |
143 | #define KW_I2C_MODE_50KHZ 0x01 | |
144 | #define KW_I2C_MODE_25KHZ 0x02 | |
145 | #define KW_I2C_MODE_DUMB 0x00 | |
146 | #define KW_I2C_MODE_STANDARD 0x04 | |
147 | #define KW_I2C_MODE_STANDARDSUB 0x08 | |
148 | #define KW_I2C_MODE_COMBINED 0x0C | |
149 | #define KW_I2C_MODE_MODE_MASK 0x0C | |
150 | #define KW_I2C_MODE_CHAN_MASK 0xF0 | |
151 | ||
152 | /* Control register */ | |
153 | #define KW_I2C_CTL_AAK 0x01 | |
154 | #define KW_I2C_CTL_XADDR 0x02 | |
155 | #define KW_I2C_CTL_STOP 0x04 | |
156 | #define KW_I2C_CTL_START 0x08 | |
157 | ||
158 | /* Status register */ | |
159 | #define KW_I2C_STAT_BUSY 0x01 | |
160 | #define KW_I2C_STAT_LAST_AAK 0x02 | |
161 | #define KW_I2C_STAT_LAST_RW 0x04 | |
162 | #define KW_I2C_STAT_SDA 0x08 | |
163 | #define KW_I2C_STAT_SCL 0x10 | |
164 | ||
165 | /* IER & ISR registers */ | |
166 | #define KW_I2C_IRQ_DATA 0x01 | |
167 | #define KW_I2C_IRQ_ADDR 0x02 | |
168 | #define KW_I2C_IRQ_STOP 0x04 | |
169 | #define KW_I2C_IRQ_START 0x08 | |
170 | #define KW_I2C_IRQ_MASK 0x0F | |
171 | ||
172 | /* State machine states */ | |
173 | enum { | |
174 | state_idle, | |
175 | state_addr, | |
176 | state_read, | |
177 | state_write, | |
178 | state_stop, | |
179 | state_dead | |
180 | }; | |
181 | ||
182 | #define WRONG_STATE(name) do {\ | |
a28d3af2 BH |
183 | printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \ |
184 | "(isr: %02x)\n", \ | |
185 | name, __kw_state_names[host->state], isr); \ | |
14cf11af PM |
186 | } while(0) |
187 | ||
188 | static const char *__kw_state_names[] = { | |
189 | "state_idle", | |
190 | "state_addr", | |
191 | "state_read", | |
192 | "state_write", | |
193 | "state_stop", | |
194 | "state_dead" | |
195 | }; | |
196 | ||
a28d3af2 | 197 | static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg) |
14cf11af PM |
198 | { |
199 | return readb(host->base + (((unsigned int)reg) << host->bsteps)); | |
200 | } | |
201 | ||
a28d3af2 BH |
202 | static inline void __kw_write_reg(struct pmac_i2c_host_kw *host, |
203 | reg_t reg, u8 val) | |
14cf11af PM |
204 | { |
205 | writeb(val, host->base + (((unsigned)reg) << host->bsteps)); | |
a28d3af2 | 206 | (void)__kw_read_reg(host, reg_subaddr); |
14cf11af PM |
207 | } |
208 | ||
a28d3af2 BH |
209 | #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val) |
210 | #define kw_read_reg(reg) __kw_read_reg(host, reg) | |
14cf11af | 211 | |
a28d3af2 | 212 | static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host) |
14cf11af PM |
213 | { |
214 | int i, j; | |
215 | u8 isr; | |
216 | ||
730745a5 | 217 | for (i = 0; i < 1000; i++) { |
14cf11af PM |
218 | isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; |
219 | if (isr != 0) | |
220 | return isr; | |
221 | ||
222 | /* This code is used with the timebase frozen, we cannot rely | |
730745a5 BH |
223 | * on udelay nor schedule when in polled mode ! |
224 | * For now, just use a bogus loop.... | |
14cf11af | 225 | */ |
a28d3af2 BH |
226 | if (host->polled) { |
227 | for (j = 1; j < 100000; j++) | |
730745a5 BH |
228 | mb(); |
229 | } else | |
230 | msleep(1); | |
14cf11af PM |
231 | } |
232 | return isr; | |
233 | } | |
234 | ||
60162e49 BH |
235 | static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result) |
236 | { | |
237 | kw_write_reg(reg_control, KW_I2C_CTL_STOP); | |
238 | host->state = state_stop; | |
239 | host->result = result; | |
240 | } | |
241 | ||
242 | ||
a28d3af2 | 243 | static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) |
14cf11af PM |
244 | { |
245 | u8 ack; | |
246 | ||
730745a5 | 247 | DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", |
a28d3af2 BH |
248 | __kw_state_names[host->state], isr); |
249 | ||
250 | if (host->state == state_idle) { | |
251 | printk(KERN_WARNING "low_i2c: Keywest got an out of state" | |
252 | " interrupt, ignoring\n"); | |
253 | kw_write_reg(reg_isr, isr); | |
254 | return; | |
255 | } | |
14cf11af PM |
256 | |
257 | if (isr == 0) { | |
60162e49 BH |
258 | printk(KERN_WARNING "low_i2c: Timeout in i2c transfer" |
259 | " on keywest !\n"); | |
a28d3af2 | 260 | if (host->state != state_stop) { |
60162e49 BH |
261 | kw_i2c_do_stop(host, -EIO); |
262 | return; | |
14cf11af | 263 | } |
60162e49 BH |
264 | ack = kw_read_reg(reg_status); |
265 | if (ack & KW_I2C_STAT_BUSY) | |
266 | kw_write_reg(reg_status, 0); | |
267 | host->state = state_idle; | |
268 | kw_write_reg(reg_ier, 0x00); | |
269 | if (!host->polled) | |
270 | complete(&host->complete); | |
a28d3af2 | 271 | return; |
14cf11af PM |
272 | } |
273 | ||
274 | if (isr & KW_I2C_IRQ_ADDR) { | |
275 | ack = kw_read_reg(reg_status); | |
a28d3af2 | 276 | if (host->state != state_addr) { |
14cf11af | 277 | WRONG_STATE("KW_I2C_IRQ_ADDR"); |
60162e49 | 278 | kw_i2c_do_stop(host, -EIO); |
14cf11af | 279 | } |
730745a5 | 280 | if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { |
60162e49 | 281 | host->result = -ENXIO; |
a28d3af2 | 282 | host->state = state_stop; |
60162e49 | 283 | DBG_LOW("KW: NAK on address\n"); |
14cf11af | 284 | } else { |
60162e49 BH |
285 | if (host->len == 0) |
286 | kw_i2c_do_stop(host, 0); | |
287 | else if (host->rw) { | |
a28d3af2 BH |
288 | host->state = state_read; |
289 | if (host->len > 1) | |
730745a5 BH |
290 | kw_write_reg(reg_control, |
291 | KW_I2C_CTL_AAK); | |
14cf11af | 292 | } else { |
a28d3af2 BH |
293 | host->state = state_write; |
294 | kw_write_reg(reg_data, *(host->data++)); | |
295 | host->len--; | |
14cf11af PM |
296 | } |
297 | } | |
298 | kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); | |
299 | } | |
300 | ||
301 | if (isr & KW_I2C_IRQ_DATA) { | |
a28d3af2 BH |
302 | if (host->state == state_read) { |
303 | *(host->data++) = kw_read_reg(reg_data); | |
304 | host->len--; | |
14cf11af | 305 | kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); |
a28d3af2 BH |
306 | if (host->len == 0) |
307 | host->state = state_stop; | |
308 | else if (host->len == 1) | |
14cf11af | 309 | kw_write_reg(reg_control, 0); |
a28d3af2 | 310 | } else if (host->state == state_write) { |
14cf11af PM |
311 | ack = kw_read_reg(reg_status); |
312 | if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { | |
730745a5 | 313 | DBG_LOW("KW: nack on data write\n"); |
60162e49 BH |
314 | host->result = -EFBIG; |
315 | host->state = state_stop; | |
a28d3af2 BH |
316 | } else if (host->len) { |
317 | kw_write_reg(reg_data, *(host->data++)); | |
318 | host->len--; | |
60162e49 BH |
319 | } else |
320 | kw_i2c_do_stop(host, 0); | |
14cf11af | 321 | } else { |
14cf11af | 322 | WRONG_STATE("KW_I2C_IRQ_DATA"); |
60162e49 BH |
323 | if (host->state != state_stop) |
324 | kw_i2c_do_stop(host, -EIO); | |
14cf11af | 325 | } |
60162e49 | 326 | kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); |
14cf11af PM |
327 | } |
328 | ||
329 | if (isr & KW_I2C_IRQ_STOP) { | |
330 | kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); | |
a28d3af2 | 331 | if (host->state != state_stop) { |
14cf11af | 332 | WRONG_STATE("KW_I2C_IRQ_STOP"); |
a28d3af2 | 333 | host->result = -EIO; |
14cf11af | 334 | } |
a28d3af2 BH |
335 | host->state = state_idle; |
336 | if (!host->polled) | |
337 | complete(&host->complete); | |
14cf11af PM |
338 | } |
339 | ||
60162e49 | 340 | /* Below should only happen in manual mode which we don't use ... */ |
14cf11af PM |
341 | if (isr & KW_I2C_IRQ_START) |
342 | kw_write_reg(reg_isr, KW_I2C_IRQ_START); | |
343 | ||
a28d3af2 BH |
344 | } |
345 | ||
346 | /* Interrupt handler */ | |
7d12e780 | 347 | static irqreturn_t kw_i2c_irq(int irq, void *dev_id) |
a28d3af2 BH |
348 | { |
349 | struct pmac_i2c_host_kw *host = dev_id; | |
350 | unsigned long flags; | |
351 | ||
352 | spin_lock_irqsave(&host->lock, flags); | |
353 | del_timer(&host->timeout_timer); | |
354 | kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); | |
355 | if (host->state != state_idle) { | |
356 | host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; | |
357 | add_timer(&host->timeout_timer); | |
358 | } | |
359 | spin_unlock_irqrestore(&host->lock, flags); | |
360 | return IRQ_HANDLED; | |
361 | } | |
362 | ||
363 | static void kw_i2c_timeout(unsigned long data) | |
364 | { | |
365 | struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data; | |
366 | unsigned long flags; | |
367 | ||
368 | spin_lock_irqsave(&host->lock, flags); | |
369 | kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); | |
370 | if (host->state != state_idle) { | |
371 | host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; | |
372 | add_timer(&host->timeout_timer); | |
373 | } | |
374 | spin_unlock_irqrestore(&host->lock, flags); | |
14cf11af PM |
375 | } |
376 | ||
730745a5 | 377 | static int kw_i2c_open(struct pmac_i2c_bus *bus) |
14cf11af | 378 | { |
730745a5 | 379 | struct pmac_i2c_host_kw *host = bus->hostdata; |
76a5b8bb | 380 | mutex_lock(&host->mutex); |
730745a5 BH |
381 | return 0; |
382 | } | |
383 | ||
384 | static void kw_i2c_close(struct pmac_i2c_bus *bus) | |
385 | { | |
386 | struct pmac_i2c_host_kw *host = bus->hostdata; | |
76a5b8bb | 387 | mutex_unlock(&host->mutex); |
730745a5 BH |
388 | } |
389 | ||
390 | static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, | |
391 | u32 subaddr, u8 *data, int len) | |
392 | { | |
393 | struct pmac_i2c_host_kw *host = bus->hostdata; | |
14cf11af | 394 | u8 mode_reg = host->speed; |
a28d3af2 | 395 | int use_irq = host->irq != NO_IRQ && !bus->polled; |
14cf11af PM |
396 | |
397 | /* Setup mode & subaddress if any */ | |
730745a5 BH |
398 | switch(bus->mode) { |
399 | case pmac_i2c_mode_dumb: | |
14cf11af | 400 | return -EINVAL; |
730745a5 | 401 | case pmac_i2c_mode_std: |
14cf11af | 402 | mode_reg |= KW_I2C_MODE_STANDARD; |
730745a5 BH |
403 | if (subsize != 0) |
404 | return -EINVAL; | |
14cf11af | 405 | break; |
730745a5 | 406 | case pmac_i2c_mode_stdsub: |
14cf11af | 407 | mode_reg |= KW_I2C_MODE_STANDARDSUB; |
730745a5 BH |
408 | if (subsize != 1) |
409 | return -EINVAL; | |
14cf11af | 410 | break; |
730745a5 | 411 | case pmac_i2c_mode_combined: |
14cf11af | 412 | mode_reg |= KW_I2C_MODE_COMBINED; |
730745a5 BH |
413 | if (subsize != 1) |
414 | return -EINVAL; | |
14cf11af PM |
415 | break; |
416 | } | |
417 | ||
418 | /* Setup channel & clear pending irqs */ | |
419 | kw_write_reg(reg_isr, kw_read_reg(reg_isr)); | |
730745a5 | 420 | kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); |
14cf11af PM |
421 | kw_write_reg(reg_status, 0); |
422 | ||
730745a5 BH |
423 | /* Set up address and r/w bit, strip possible stale bus number from |
424 | * address top bits | |
425 | */ | |
426 | kw_write_reg(reg_addr, addrdir & 0xff); | |
14cf11af PM |
427 | |
428 | /* Set up the sub address */ | |
429 | if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB | |
430 | || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) | |
431 | kw_write_reg(reg_subaddr, subaddr); | |
432 | ||
a28d3af2 BH |
433 | /* Prepare for async operations */ |
434 | host->data = data; | |
435 | host->len = len; | |
436 | host->state = state_addr; | |
437 | host->result = 0; | |
438 | host->rw = (addrdir & 1); | |
439 | host->polled = bus->polled; | |
440 | ||
441 | /* Enable interrupt if not using polled mode and interrupt is | |
442 | * available | |
443 | */ | |
444 | if (use_irq) { | |
445 | /* Clear completion */ | |
446 | INIT_COMPLETION(host->complete); | |
447 | /* Ack stale interrupts */ | |
448 | kw_write_reg(reg_isr, kw_read_reg(reg_isr)); | |
449 | /* Arm timeout */ | |
450 | host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; | |
451 | add_timer(&host->timeout_timer); | |
452 | /* Enable emission */ | |
453 | kw_write_reg(reg_ier, KW_I2C_IRQ_MASK); | |
454 | } | |
455 | ||
456 | /* Start sending address */ | |
14cf11af PM |
457 | kw_write_reg(reg_control, KW_I2C_CTL_XADDR); |
458 | ||
a28d3af2 BH |
459 | /* Wait for completion */ |
460 | if (use_irq) | |
461 | wait_for_completion(&host->complete); | |
462 | else { | |
463 | while(host->state != state_idle) { | |
464 | unsigned long flags; | |
465 | ||
466 | u8 isr = kw_i2c_wait_interrupt(host); | |
467 | spin_lock_irqsave(&host->lock, flags); | |
468 | kw_i2c_handle_interrupt(host, isr); | |
469 | spin_unlock_irqrestore(&host->lock, flags); | |
470 | } | |
14cf11af PM |
471 | } |
472 | ||
a28d3af2 BH |
473 | /* Disable emission */ |
474 | kw_write_reg(reg_ier, 0); | |
475 | ||
476 | return host->result; | |
14cf11af PM |
477 | } |
478 | ||
730745a5 | 479 | static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) |
14cf11af | 480 | { |
730745a5 | 481 | struct pmac_i2c_host_kw *host; |
018a3d1d JK |
482 | const u32 *psteps, *prate, *addrp; |
483 | u32 steps; | |
14cf11af | 484 | |
730745a5 | 485 | host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL); |
14cf11af PM |
486 | if (host == NULL) { |
487 | printk(KERN_ERR "low_i2c: Can't allocate host for %s\n", | |
488 | np->full_name); | |
730745a5 | 489 | return NULL; |
14cf11af | 490 | } |
14cf11af | 491 | |
51d3082f BH |
492 | /* Apple is kind enough to provide a valid AAPL,address property |
493 | * on all i2c keywest nodes so far ... we would have to fallback | |
494 | * to macio parsing if that wasn't the case | |
495 | */ | |
e2eb6392 | 496 | addrp = of_get_property(np, "AAPL,address", NULL); |
51d3082f BH |
497 | if (addrp == NULL) { |
498 | printk(KERN_ERR "low_i2c: Can't find address for %s\n", | |
499 | np->full_name); | |
730745a5 BH |
500 | kfree(host); |
501 | return NULL; | |
51d3082f | 502 | } |
76a5b8bb | 503 | mutex_init(&host->mutex); |
a28d3af2 BH |
504 | init_completion(&host->complete); |
505 | spin_lock_init(&host->lock); | |
506 | init_timer(&host->timeout_timer); | |
507 | host->timeout_timer.function = kw_i2c_timeout; | |
508 | host->timeout_timer.data = (unsigned long)host; | |
509 | ||
e2eb6392 | 510 | psteps = of_get_property(np, "AAPL,address-step", NULL); |
14cf11af PM |
511 | steps = psteps ? (*psteps) : 0x10; |
512 | for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) | |
513 | steps >>= 1; | |
14cf11af | 514 | /* Select interface rate */ |
51d3082f | 515 | host->speed = KW_I2C_MODE_25KHZ; |
e2eb6392 | 516 | prate = of_get_property(np, "AAPL,i2c-rate", NULL); |
14cf11af PM |
517 | if (prate) switch(*prate) { |
518 | case 100: | |
519 | host->speed = KW_I2C_MODE_100KHZ; | |
520 | break; | |
521 | case 50: | |
522 | host->speed = KW_I2C_MODE_50KHZ; | |
523 | break; | |
524 | case 25: | |
525 | host->speed = KW_I2C_MODE_25KHZ; | |
526 | break; | |
527 | } | |
0ebfff14 BH |
528 | host->irq = irq_of_parse_and_map(np, 0); |
529 | if (host->irq == NO_IRQ) | |
530 | printk(KERN_WARNING | |
531 | "low_i2c: Failed to map interrupt for %s\n", | |
532 | np->full_name); | |
14cf11af | 533 | |
51d3082f | 534 | host->base = ioremap((*addrp), 0x1000); |
a28d3af2 BH |
535 | if (host->base == NULL) { |
536 | printk(KERN_ERR "low_i2c: Can't map registers for %s\n", | |
537 | np->full_name); | |
538 | kfree(host); | |
539 | return NULL; | |
540 | } | |
541 | ||
60162e49 | 542 | /* Make sure IRQ is disabled */ |
a28d3af2 BH |
543 | kw_write_reg(reg_ier, 0); |
544 | ||
ba461f09 | 545 | /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't |
11a50873 BH |
546 | * want that interrupt disabled between the 2 passes of driver |
547 | * suspend or we'll have issues running the pfuncs | |
548 | */ | |
ba461f09 IC |
549 | if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND, |
550 | "keywest i2c", host)) | |
a28d3af2 BH |
551 | host->irq = NO_IRQ; |
552 | ||
553 | printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", | |
554 | *addrp, host->irq, np->full_name); | |
730745a5 BH |
555 | |
556 | return host; | |
14cf11af PM |
557 | } |
558 | ||
730745a5 BH |
559 | |
560 | static void __init kw_i2c_add(struct pmac_i2c_host_kw *host, | |
561 | struct device_node *controller, | |
562 | struct device_node *busnode, | |
563 | int channel) | |
564 | { | |
565 | struct pmac_i2c_bus *bus; | |
566 | ||
567 | bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL); | |
568 | if (bus == NULL) | |
569 | return; | |
570 | ||
571 | bus->controller = of_node_get(controller); | |
572 | bus->busnode = of_node_get(busnode); | |
573 | bus->type = pmac_i2c_bus_keywest; | |
574 | bus->hostdata = host; | |
575 | bus->channel = channel; | |
576 | bus->mode = pmac_i2c_mode_std; | |
577 | bus->open = kw_i2c_open; | |
578 | bus->close = kw_i2c_close; | |
579 | bus->xfer = kw_i2c_xfer; | |
76a5b8bb | 580 | mutex_init(&bus->mutex); |
730745a5 BH |
581 | if (controller == busnode) |
582 | bus->flags = pmac_i2c_multibus; | |
583 | list_add(&bus->link, &pmac_i2c_busses); | |
584 | ||
585 | printk(KERN_INFO " channel %d bus %s\n", channel, | |
586 | (controller == busnode) ? "<multibus>" : busnode->full_name); | |
587 | } | |
588 | ||
589 | static void __init kw_i2c_probe(void) | |
590 | { | |
591 | struct device_node *np, *child, *parent; | |
592 | ||
593 | /* Probe keywest-i2c busses */ | |
dc2e4258 | 594 | for_each_compatible_node(np, "i2c","keywest-i2c") { |
730745a5 | 595 | struct pmac_i2c_host_kw *host; |
213972e9 | 596 | int multibus; |
730745a5 BH |
597 | |
598 | /* Found one, init a host structure */ | |
599 | host = kw_i2c_host_init(np); | |
600 | if (host == NULL) | |
601 | continue; | |
602 | ||
603 | /* Now check if we have a multibus setup (old style) or if we | |
604 | * have proper bus nodes. Note that the "new" way (proper bus | |
605 | * nodes) might cause us to not create some busses that are | |
606 | * kept hidden in the device-tree. In the future, we might | |
607 | * want to work around that by creating busses without a node | |
608 | * but not for now | |
609 | */ | |
610 | child = of_get_next_child(np, NULL); | |
611 | multibus = !child || strcmp(child->name, "i2c-bus"); | |
612 | of_node_put(child); | |
613 | ||
614 | /* For a multibus setup, we get the bus count based on the | |
615 | * parent type | |
616 | */ | |
617 | if (multibus) { | |
213972e9 | 618 | int chans, i; |
619 | ||
730745a5 BH |
620 | parent = of_get_parent(np); |
621 | if (parent == NULL) | |
622 | continue; | |
623 | chans = parent->name[0] == 'u' ? 2 : 1; | |
624 | for (i = 0; i < chans; i++) | |
625 | kw_i2c_add(host, np, np, i); | |
626 | } else { | |
627 | for (child = NULL; | |
628 | (child = of_get_next_child(np, child)) != NULL;) { | |
e2eb6392 | 629 | const u32 *reg = of_get_property(child, |
018a3d1d | 630 | "reg", NULL); |
730745a5 BH |
631 | if (reg == NULL) |
632 | continue; | |
633 | kw_i2c_add(host, np, child, *reg); | |
634 | } | |
635 | } | |
636 | } | |
637 | } | |
638 | ||
639 | ||
14cf11af PM |
640 | /* |
641 | * | |
642 | * PMU implementation | |
643 | * | |
644 | */ | |
645 | ||
14cf11af PM |
646 | #ifdef CONFIG_ADB_PMU |
647 | ||
730745a5 BH |
648 | /* |
649 | * i2c command block to the PMU | |
650 | */ | |
651 | struct pmu_i2c_hdr { | |
652 | u8 bus; | |
653 | u8 mode; | |
654 | u8 bus2; | |
655 | u8 address; | |
656 | u8 sub_addr; | |
657 | u8 comb_addr; | |
658 | u8 count; | |
659 | u8 data[]; | |
660 | }; | |
661 | ||
662 | static void pmu_i2c_complete(struct adb_request *req) | |
14cf11af | 663 | { |
730745a5 | 664 | complete(req->arg); |
14cf11af PM |
665 | } |
666 | ||
730745a5 BH |
667 | static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, |
668 | u32 subaddr, u8 *data, int len) | |
14cf11af | 669 | { |
730745a5 BH |
670 | struct adb_request *req = bus->hostdata; |
671 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1]; | |
672 | struct completion comp; | |
673 | int read = addrdir & 1; | |
674 | int retry; | |
675 | int rc = 0; | |
14cf11af | 676 | |
730745a5 BH |
677 | /* For now, limit ourselves to 16 bytes transfers */ |
678 | if (len > 16) | |
679 | return -EINVAL; | |
680 | ||
681 | init_completion(&comp); | |
682 | ||
683 | for (retry = 0; retry < 16; retry++) { | |
684 | memset(req, 0, sizeof(struct adb_request)); | |
685 | hdr->bus = bus->channel; | |
686 | hdr->count = len; | |
687 | ||
688 | switch(bus->mode) { | |
689 | case pmac_i2c_mode_std: | |
690 | if (subsize != 0) | |
691 | return -EINVAL; | |
692 | hdr->address = addrdir; | |
693 | hdr->mode = PMU_I2C_MODE_SIMPLE; | |
694 | break; | |
695 | case pmac_i2c_mode_stdsub: | |
696 | case pmac_i2c_mode_combined: | |
697 | if (subsize != 1) | |
698 | return -EINVAL; | |
699 | hdr->address = addrdir & 0xfe; | |
700 | hdr->comb_addr = addrdir; | |
701 | hdr->sub_addr = subaddr; | |
702 | if (bus->mode == pmac_i2c_mode_stdsub) | |
703 | hdr->mode = PMU_I2C_MODE_STDSUB; | |
704 | else | |
705 | hdr->mode = PMU_I2C_MODE_COMBINED; | |
706 | break; | |
707 | default: | |
708 | return -EINVAL; | |
709 | } | |
710 | ||
711 | INIT_COMPLETION(comp); | |
712 | req->data[0] = PMU_I2C_CMD; | |
713 | req->reply[0] = 0xff; | |
714 | req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; | |
715 | req->done = pmu_i2c_complete; | |
716 | req->arg = ∁ | |
a28d3af2 | 717 | if (!read && len) { |
730745a5 BH |
718 | memcpy(hdr->data, data, len); |
719 | req->nbytes += len; | |
720 | } | |
721 | rc = pmu_queue_request(req); | |
722 | if (rc) | |
723 | return rc; | |
724 | wait_for_completion(&comp); | |
725 | if (req->reply[0] == PMU_I2C_STATUS_OK) | |
726 | break; | |
727 | msleep(15); | |
14cf11af | 728 | } |
730745a5 BH |
729 | if (req->reply[0] != PMU_I2C_STATUS_OK) |
730 | return -EIO; | |
14cf11af | 731 | |
730745a5 BH |
732 | for (retry = 0; retry < 16; retry++) { |
733 | memset(req, 0, sizeof(struct adb_request)); | |
734 | ||
735 | /* I know that looks like a lot, slow as hell, but darwin | |
736 | * does it so let's be on the safe side for now | |
737 | */ | |
738 | msleep(15); | |
739 | ||
740 | hdr->bus = PMU_I2C_BUS_STATUS; | |
741 | ||
742 | INIT_COMPLETION(comp); | |
743 | req->data[0] = PMU_I2C_CMD; | |
744 | req->reply[0] = 0xff; | |
745 | req->nbytes = 2; | |
746 | req->done = pmu_i2c_complete; | |
747 | req->arg = ∁ | |
748 | rc = pmu_queue_request(req); | |
749 | if (rc) | |
750 | return rc; | |
751 | wait_for_completion(&comp); | |
752 | ||
753 | if (req->reply[0] == PMU_I2C_STATUS_OK && !read) | |
754 | return 0; | |
755 | if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) { | |
756 | int rlen = req->reply_len - 1; | |
757 | ||
758 | if (rlen != len) { | |
759 | printk(KERN_WARNING "low_i2c: PMU returned %d" | |
760 | " bytes, expected %d !\n", rlen, len); | |
761 | return -EIO; | |
762 | } | |
a28d3af2 BH |
763 | if (len) |
764 | memcpy(data, &req->reply[1], len); | |
730745a5 BH |
765 | return 0; |
766 | } | |
767 | } | |
768 | return -EIO; | |
769 | } | |
770 | ||
771 | static void __init pmu_i2c_probe(void) | |
772 | { | |
773 | struct pmac_i2c_bus *bus; | |
774 | struct device_node *busnode; | |
775 | int channel, sz; | |
776 | ||
777 | if (!pmu_present()) | |
778 | return; | |
779 | ||
780 | /* There might or might not be a "pmu-i2c" node, we use that | |
781 | * or via-pmu itself, whatever we find. I haven't seen a machine | |
782 | * with separate bus nodes, so we assume a multibus setup | |
783 | */ | |
784 | busnode = of_find_node_by_name(NULL, "pmu-i2c"); | |
785 | if (busnode == NULL) | |
786 | busnode = of_find_node_by_name(NULL, "via-pmu"); | |
787 | if (busnode == NULL) | |
788 | return; | |
789 | ||
790 | printk(KERN_INFO "PMU i2c %s\n", busnode->full_name); | |
791 | ||
792 | /* | |
793 | * We add bus 1 and 2 only for now, bus 0 is "special" | |
794 | */ | |
795 | for (channel = 1; channel <= 2; channel++) { | |
796 | sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request); | |
797 | bus = kzalloc(sz, GFP_KERNEL); | |
798 | if (bus == NULL) | |
799 | return; | |
800 | ||
801 | bus->controller = busnode; | |
802 | bus->busnode = busnode; | |
803 | bus->type = pmac_i2c_bus_pmu; | |
804 | bus->channel = channel; | |
805 | bus->mode = pmac_i2c_mode_std; | |
806 | bus->hostdata = bus + 1; | |
807 | bus->xfer = pmu_i2c_xfer; | |
76a5b8bb | 808 | mutex_init(&bus->mutex); |
730745a5 BH |
809 | bus->flags = pmac_i2c_multibus; |
810 | list_add(&bus->link, &pmac_i2c_busses); | |
811 | ||
812 | printk(KERN_INFO " channel %d bus <multibus>\n", channel); | |
813 | } | |
14cf11af PM |
814 | } |
815 | ||
816 | #endif /* CONFIG_ADB_PMU */ | |
817 | ||
730745a5 BH |
818 | |
819 | /* | |
820 | * | |
821 | * SMU implementation | |
822 | * | |
823 | */ | |
824 | ||
825 | #ifdef CONFIG_PMAC_SMU | |
826 | ||
827 | static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc) | |
14cf11af | 828 | { |
730745a5 BH |
829 | complete(misc); |
830 | } | |
14cf11af | 831 | |
730745a5 BH |
832 | static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, |
833 | u32 subaddr, u8 *data, int len) | |
834 | { | |
835 | struct smu_i2c_cmd *cmd = bus->hostdata; | |
836 | struct completion comp; | |
837 | int read = addrdir & 1; | |
838 | int rc = 0; | |
839 | ||
a28d3af2 BH |
840 | if ((read && len > SMU_I2C_READ_MAX) || |
841 | ((!read) && len > SMU_I2C_WRITE_MAX)) | |
842 | return -EINVAL; | |
843 | ||
730745a5 BH |
844 | memset(cmd, 0, sizeof(struct smu_i2c_cmd)); |
845 | cmd->info.bus = bus->channel; | |
846 | cmd->info.devaddr = addrdir; | |
847 | cmd->info.datalen = len; | |
848 | ||
849 | switch(bus->mode) { | |
850 | case pmac_i2c_mode_std: | |
851 | if (subsize != 0) | |
852 | return -EINVAL; | |
853 | cmd->info.type = SMU_I2C_TRANSFER_SIMPLE; | |
854 | break; | |
855 | case pmac_i2c_mode_stdsub: | |
856 | case pmac_i2c_mode_combined: | |
857 | if (subsize > 3 || subsize < 1) | |
858 | return -EINVAL; | |
859 | cmd->info.sublen = subsize; | |
860 | /* that's big-endian only but heh ! */ | |
861 | memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize), | |
862 | subsize); | |
863 | if (bus->mode == pmac_i2c_mode_stdsub) | |
864 | cmd->info.type = SMU_I2C_TRANSFER_STDSUB; | |
865 | else | |
866 | cmd->info.type = SMU_I2C_TRANSFER_COMBINED; | |
867 | break; | |
868 | default: | |
869 | return -EINVAL; | |
14cf11af | 870 | } |
a28d3af2 | 871 | if (!read && len) |
730745a5 BH |
872 | memcpy(cmd->info.data, data, len); |
873 | ||
874 | init_completion(&comp); | |
875 | cmd->done = smu_i2c_complete; | |
876 | cmd->misc = ∁ | |
877 | rc = smu_queue_i2c(cmd); | |
878 | if (rc < 0) | |
879 | return rc; | |
880 | wait_for_completion(&comp); | |
881 | rc = cmd->status; | |
882 | ||
a28d3af2 | 883 | if (read && len) |
730745a5 BH |
884 | memcpy(data, cmd->info.data, len); |
885 | return rc < 0 ? rc : 0; | |
886 | } | |
14cf11af | 887 | |
730745a5 BH |
888 | static void __init smu_i2c_probe(void) |
889 | { | |
890 | struct device_node *controller, *busnode; | |
891 | struct pmac_i2c_bus *bus; | |
018a3d1d | 892 | const u32 *reg; |
730745a5 BH |
893 | int sz; |
894 | ||
895 | if (!smu_present()) | |
896 | return; | |
897 | ||
a28d3af2 | 898 | controller = of_find_node_by_name(NULL, "smu-i2c-control"); |
730745a5 BH |
899 | if (controller == NULL) |
900 | controller = of_find_node_by_name(NULL, "smu"); | |
901 | if (controller == NULL) | |
902 | return; | |
903 | ||
904 | printk(KERN_INFO "SMU i2c %s\n", controller->full_name); | |
905 | ||
906 | /* Look for childs, note that they might not be of the right | |
25985edc | 907 | * type as older device trees mix i2c busses and other things |
730745a5 BH |
908 | * at the same level |
909 | */ | |
910 | for (busnode = NULL; | |
911 | (busnode = of_get_next_child(controller, busnode)) != NULL;) { | |
912 | if (strcmp(busnode->type, "i2c") && | |
913 | strcmp(busnode->type, "i2c-bus")) | |
914 | continue; | |
e2eb6392 | 915 | reg = of_get_property(busnode, "reg", NULL); |
730745a5 BH |
916 | if (reg == NULL) |
917 | continue; | |
918 | ||
919 | sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd); | |
920 | bus = kzalloc(sz, GFP_KERNEL); | |
921 | if (bus == NULL) | |
922 | return; | |
923 | ||
924 | bus->controller = controller; | |
925 | bus->busnode = of_node_get(busnode); | |
926 | bus->type = pmac_i2c_bus_smu; | |
927 | bus->channel = *reg; | |
928 | bus->mode = pmac_i2c_mode_std; | |
929 | bus->hostdata = bus + 1; | |
930 | bus->xfer = smu_i2c_xfer; | |
76a5b8bb | 931 | mutex_init(&bus->mutex); |
730745a5 BH |
932 | bus->flags = 0; |
933 | list_add(&bus->link, &pmac_i2c_busses); | |
934 | ||
935 | printk(KERN_INFO " channel %x bus %s\n", | |
936 | bus->channel, busnode->full_name); | |
937 | } | |
938 | } | |
939 | ||
940 | #endif /* CONFIG_PMAC_SMU */ | |
941 | ||
942 | /* | |
943 | * | |
944 | * Core code | |
945 | * | |
946 | */ | |
947 | ||
948 | ||
949 | struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node) | |
950 | { | |
951 | struct device_node *p = of_node_get(node); | |
952 | struct device_node *prev = NULL; | |
953 | struct pmac_i2c_bus *bus; | |
954 | ||
955 | while(p) { | |
956 | list_for_each_entry(bus, &pmac_i2c_busses, link) { | |
957 | if (p == bus->busnode) { | |
958 | if (prev && bus->flags & pmac_i2c_multibus) { | |
018a3d1d | 959 | const u32 *reg; |
e2eb6392 SR |
960 | reg = of_get_property(prev, "reg", |
961 | NULL); | |
730745a5 BH |
962 | if (!reg) |
963 | continue; | |
964 | if (((*reg) >> 8) != bus->channel) | |
965 | continue; | |
966 | } | |
967 | of_node_put(p); | |
968 | of_node_put(prev); | |
969 | return bus; | |
970 | } | |
971 | } | |
972 | of_node_put(prev); | |
973 | prev = p; | |
974 | p = of_get_parent(p); | |
975 | } | |
976 | return NULL; | |
977 | } | |
978 | EXPORT_SYMBOL_GPL(pmac_i2c_find_bus); | |
979 | ||
980 | u8 pmac_i2c_get_dev_addr(struct device_node *device) | |
981 | { | |
e2eb6392 | 982 | const u32 *reg = of_get_property(device, "reg", NULL); |
730745a5 BH |
983 | |
984 | if (reg == NULL) | |
985 | return 0; | |
986 | ||
987 | return (*reg) & 0xff; | |
988 | } | |
989 | EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr); | |
990 | ||
991 | struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus) | |
992 | { | |
993 | return bus->controller; | |
994 | } | |
995 | EXPORT_SYMBOL_GPL(pmac_i2c_get_controller); | |
996 | ||
997 | struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus) | |
998 | { | |
999 | return bus->busnode; | |
1000 | } | |
1001 | EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node); | |
1002 | ||
1003 | int pmac_i2c_get_type(struct pmac_i2c_bus *bus) | |
1004 | { | |
1005 | return bus->type; | |
1006 | } | |
1007 | EXPORT_SYMBOL_GPL(pmac_i2c_get_type); | |
1008 | ||
1009 | int pmac_i2c_get_flags(struct pmac_i2c_bus *bus) | |
1010 | { | |
1011 | return bus->flags; | |
1012 | } | |
1013 | EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); | |
14cf11af | 1014 | |
a28d3af2 BH |
1015 | int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) |
1016 | { | |
1017 | return bus->channel; | |
1018 | } | |
1019 | EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); | |
1020 | ||
1021 | ||
730745a5 BH |
1022 | struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) |
1023 | { | |
6dfa5ca3 | 1024 | return &bus->adapter; |
730745a5 BH |
1025 | } |
1026 | EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); | |
1027 | ||
a28d3af2 BH |
1028 | struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) |
1029 | { | |
1030 | struct pmac_i2c_bus *bus; | |
1031 | ||
1032 | list_for_each_entry(bus, &pmac_i2c_busses, link) | |
6dfa5ca3 | 1033 | if (&bus->adapter == adapter) |
a28d3af2 BH |
1034 | return bus; |
1035 | return NULL; | |
1036 | } | |
1037 | EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus); | |
1038 | ||
1d0bd717 | 1039 | int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) |
730745a5 BH |
1040 | { |
1041 | struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev); | |
1042 | ||
1043 | if (bus == NULL) | |
1044 | return 0; | |
6dfa5ca3 | 1045 | return (&bus->adapter == adapter); |
730745a5 BH |
1046 | } |
1047 | EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); | |
14cf11af PM |
1048 | |
1049 | int pmac_low_i2c_lock(struct device_node *np) | |
1050 | { | |
730745a5 | 1051 | struct pmac_i2c_bus *bus, *found = NULL; |
14cf11af | 1052 | |
730745a5 BH |
1053 | list_for_each_entry(bus, &pmac_i2c_busses, link) { |
1054 | if (np == bus->controller) { | |
1055 | found = bus; | |
1056 | break; | |
1057 | } | |
1058 | } | |
1059 | if (!found) | |
14cf11af | 1060 | return -ENODEV; |
730745a5 | 1061 | return pmac_i2c_open(bus, 0); |
14cf11af | 1062 | } |
730745a5 | 1063 | EXPORT_SYMBOL_GPL(pmac_low_i2c_lock); |
14cf11af PM |
1064 | |
1065 | int pmac_low_i2c_unlock(struct device_node *np) | |
1066 | { | |
730745a5 | 1067 | struct pmac_i2c_bus *bus, *found = NULL; |
14cf11af | 1068 | |
730745a5 BH |
1069 | list_for_each_entry(bus, &pmac_i2c_busses, link) { |
1070 | if (np == bus->controller) { | |
1071 | found = bus; | |
1072 | break; | |
1073 | } | |
1074 | } | |
1075 | if (!found) | |
14cf11af | 1076 | return -ENODEV; |
730745a5 | 1077 | pmac_i2c_close(bus); |
14cf11af PM |
1078 | return 0; |
1079 | } | |
730745a5 | 1080 | EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock); |
14cf11af PM |
1081 | |
1082 | ||
730745a5 | 1083 | int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled) |
14cf11af | 1084 | { |
730745a5 BH |
1085 | int rc; |
1086 | ||
76a5b8bb | 1087 | mutex_lock(&bus->mutex); |
a28d3af2 | 1088 | bus->polled = polled || pmac_i2c_force_poll; |
730745a5 BH |
1089 | bus->opened = 1; |
1090 | bus->mode = pmac_i2c_mode_std; | |
1091 | if (bus->open && (rc = bus->open(bus)) != 0) { | |
1092 | bus->opened = 0; | |
76a5b8bb | 1093 | mutex_unlock(&bus->mutex); |
730745a5 BH |
1094 | return rc; |
1095 | } | |
1096 | return 0; | |
1097 | } | |
1098 | EXPORT_SYMBOL_GPL(pmac_i2c_open); | |
14cf11af | 1099 | |
730745a5 BH |
1100 | void pmac_i2c_close(struct pmac_i2c_bus *bus) |
1101 | { | |
1102 | WARN_ON(!bus->opened); | |
1103 | if (bus->close) | |
1104 | bus->close(bus); | |
1105 | bus->opened = 0; | |
76a5b8bb | 1106 | mutex_unlock(&bus->mutex); |
730745a5 BH |
1107 | } |
1108 | EXPORT_SYMBOL_GPL(pmac_i2c_close); | |
14cf11af | 1109 | |
730745a5 BH |
1110 | int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode) |
1111 | { | |
1112 | WARN_ON(!bus->opened); | |
14cf11af | 1113 | |
730745a5 BH |
1114 | /* Report me if you see the error below as there might be a new |
1115 | * "combined4" mode that I need to implement for the SMU bus | |
1116 | */ | |
1117 | if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) { | |
1118 | printk(KERN_ERR "low_i2c: Invalid mode %d requested on" | |
1119 | " bus %s !\n", mode, bus->busnode->full_name); | |
1120 | return -EINVAL; | |
1121 | } | |
1122 | bus->mode = mode; | |
14cf11af PM |
1123 | |
1124 | return 0; | |
1125 | } | |
730745a5 | 1126 | EXPORT_SYMBOL_GPL(pmac_i2c_setmode); |
14cf11af | 1127 | |
730745a5 BH |
1128 | int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, |
1129 | u32 subaddr, u8 *data, int len) | |
14cf11af | 1130 | { |
730745a5 | 1131 | int rc; |
14cf11af | 1132 | |
730745a5 | 1133 | WARN_ON(!bus->opened); |
14cf11af | 1134 | |
730745a5 BH |
1135 | DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x," |
1136 | " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize, | |
1137 | subaddr, len, bus->busnode->full_name); | |
14cf11af | 1138 | |
730745a5 BH |
1139 | rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len); |
1140 | ||
1141 | #ifdef DEBUG | |
1142 | if (rc) | |
1143 | DBG("xfer error %d\n", rc); | |
1144 | #endif | |
1145 | return rc; | |
14cf11af | 1146 | } |
730745a5 | 1147 | EXPORT_SYMBOL_GPL(pmac_i2c_xfer); |
14cf11af | 1148 | |
5b9ca526 BH |
1149 | /* some quirks for platform function decoding */ |
1150 | enum { | |
1151 | pmac_i2c_quirk_invmask = 0x00000001u, | |
5a47d749 | 1152 | pmac_i2c_quirk_skip = 0x00000002u, |
5b9ca526 BH |
1153 | }; |
1154 | ||
1155 | static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, | |
1156 | int quirks)) | |
1157 | { | |
1158 | struct pmac_i2c_bus *bus; | |
1159 | struct device_node *np; | |
1160 | static struct whitelist_ent { | |
1161 | char *name; | |
1162 | char *compatible; | |
1163 | int quirks; | |
1164 | } whitelist[] = { | |
1165 | /* XXX Study device-tree's & apple drivers are get the quirks | |
1166 | * right ! | |
1167 | */ | |
5a47d749 BH |
1168 | /* Workaround: It seems that running the clockspreading |
1169 | * properties on the eMac will cause lockups during boot. | |
1170 | * The machine seems to work fine without that. So for now, | |
1171 | * let's make sure i2c-hwclock doesn't match about "imic" | |
1172 | * clocks and we'll figure out if we really need to do | |
1173 | * something special about those later. | |
1174 | */ | |
1175 | { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, | |
1176 | { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, | |
5b9ca526 BH |
1177 | { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, |
1178 | { "i2c-cpu-voltage", NULL, 0}, | |
1179 | { "temp-monitor", NULL, 0 }, | |
1180 | { "supply-monitor", NULL, 0 }, | |
1181 | { NULL, NULL, 0 }, | |
1182 | }; | |
1183 | ||
1184 | /* Only some devices need to have platform functions instanciated | |
1185 | * here. For now, we have a table. Others, like 9554 i2c GPIOs used | |
1186 | * on Xserve, if we ever do a driver for them, will use their own | |
1187 | * platform function instance | |
1188 | */ | |
1189 | list_for_each_entry(bus, &pmac_i2c_busses, link) { | |
1190 | for (np = NULL; | |
1191 | (np = of_get_next_child(bus->busnode, np)) != NULL;) { | |
1192 | struct whitelist_ent *p; | |
1193 | /* If multibus, check if device is on that bus */ | |
1194 | if (bus->flags & pmac_i2c_multibus) | |
1195 | if (bus != pmac_i2c_find_bus(np)) | |
1196 | continue; | |
1197 | for (p = whitelist; p->name != NULL; p++) { | |
1198 | if (strcmp(np->name, p->name)) | |
1199 | continue; | |
1200 | if (p->compatible && | |
55b61fec | 1201 | !of_device_is_compatible(np, p->compatible)) |
5b9ca526 | 1202 | continue; |
5a47d749 BH |
1203 | if (p->quirks & pmac_i2c_quirk_skip) |
1204 | break; | |
5b9ca526 BH |
1205 | callback(np, p->quirks); |
1206 | break; | |
1207 | } | |
1208 | } | |
1209 | } | |
1210 | } | |
1211 | ||
1212 | #define MAX_I2C_DATA 64 | |
1213 | ||
1214 | struct pmac_i2c_pf_inst | |
1215 | { | |
1216 | struct pmac_i2c_bus *bus; | |
1217 | u8 addr; | |
1218 | u8 buffer[MAX_I2C_DATA]; | |
1219 | u8 scratch[MAX_I2C_DATA]; | |
1220 | int bytes; | |
1221 | int quirks; | |
1222 | }; | |
1223 | ||
1224 | static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args) | |
1225 | { | |
1226 | struct pmac_i2c_pf_inst *inst; | |
1227 | struct pmac_i2c_bus *bus; | |
1228 | ||
1229 | bus = pmac_i2c_find_bus(func->node); | |
1230 | if (bus == NULL) { | |
1231 | printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n", | |
1232 | func->node->full_name); | |
1233 | return NULL; | |
1234 | } | |
1235 | if (pmac_i2c_open(bus, 0)) { | |
1236 | printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n", | |
1237 | func->node->full_name); | |
1238 | return NULL; | |
1239 | } | |
1240 | ||
1241 | /* XXX might need GFP_ATOMIC when called during the suspend process, | |
1242 | * but then, there are already lots of issues with suspending when | |
1243 | * near OOM that need to be resolved, the allocator itself should | |
1244 | * probably make GFP_NOIO implicit during suspend | |
1245 | */ | |
1246 | inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); | |
1247 | if (inst == NULL) { | |
1248 | pmac_i2c_close(bus); | |
1249 | return NULL; | |
1250 | } | |
1251 | inst->bus = bus; | |
1252 | inst->addr = pmac_i2c_get_dev_addr(func->node); | |
1253 | inst->quirks = (int)(long)func->driver_data; | |
1254 | return inst; | |
1255 | } | |
1256 | ||
1257 | static void pmac_i2c_do_end(struct pmf_function *func, void *instdata) | |
1258 | { | |
1259 | struct pmac_i2c_pf_inst *inst = instdata; | |
1260 | ||
1261 | if (inst == NULL) | |
1262 | return; | |
1263 | pmac_i2c_close(inst->bus); | |
213972e9 | 1264 | kfree(inst); |
5b9ca526 BH |
1265 | } |
1266 | ||
1267 | static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len) | |
1268 | { | |
1269 | struct pmac_i2c_pf_inst *inst = instdata; | |
1270 | ||
1271 | inst->bytes = len; | |
1272 | return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0, | |
1273 | inst->buffer, len); | |
1274 | } | |
1275 | ||
1276 | static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data) | |
1277 | { | |
1278 | struct pmac_i2c_pf_inst *inst = instdata; | |
1279 | ||
1280 | return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, | |
1281 | (u8 *)data, len); | |
1282 | } | |
1283 | ||
1284 | /* This function is used to do the masking & OR'ing for the "rmw" type | |
1285 | * callbacks. Ze should apply the mask and OR in the values in the | |
1286 | * buffer before writing back. The problem is that it seems that | |
1287 | * various darwin drivers implement the mask/or differently, thus | |
1288 | * we need to check the quirks first | |
1289 | */ | |
1290 | static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst, | |
1291 | u32 len, const u8 *mask, const u8 *val) | |
1292 | { | |
1293 | int i; | |
1294 | ||
1295 | if (inst->quirks & pmac_i2c_quirk_invmask) { | |
1296 | for (i = 0; i < len; i ++) | |
1297 | inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i]; | |
1298 | } else { | |
1299 | for (i = 0; i < len; i ++) | |
1300 | inst->scratch[i] = (inst->buffer[i] & ~mask[i]) | |
1301 | | (val[i] & mask[i]); | |
1302 | } | |
1303 | } | |
1304 | ||
1305 | static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen, | |
1306 | u32 totallen, const u8 *maskdata, | |
1307 | const u8 *valuedata) | |
1308 | { | |
1309 | struct pmac_i2c_pf_inst *inst = instdata; | |
1310 | ||
1311 | if (masklen > inst->bytes || valuelen > inst->bytes || | |
1312 | totallen > inst->bytes || valuelen > masklen) | |
1313 | return -EINVAL; | |
1314 | ||
1315 | pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); | |
1316 | ||
1317 | return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, | |
1318 | inst->scratch, totallen); | |
1319 | } | |
1320 | ||
1321 | static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len) | |
1322 | { | |
1323 | struct pmac_i2c_pf_inst *inst = instdata; | |
1324 | ||
1325 | inst->bytes = len; | |
1326 | return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr, | |
1327 | inst->buffer, len); | |
1328 | } | |
1329 | ||
1330 | static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len, | |
1331 | const u8 *data) | |
1332 | { | |
1333 | struct pmac_i2c_pf_inst *inst = instdata; | |
1334 | ||
1335 | return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, | |
1336 | subaddr, (u8 *)data, len); | |
1337 | } | |
1338 | ||
1339 | static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode) | |
1340 | { | |
1341 | struct pmac_i2c_pf_inst *inst = instdata; | |
1342 | ||
1343 | return pmac_i2c_setmode(inst->bus, mode); | |
1344 | } | |
1345 | ||
1346 | static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen, | |
1347 | u32 valuelen, u32 totallen, const u8 *maskdata, | |
1348 | const u8 *valuedata) | |
1349 | { | |
1350 | struct pmac_i2c_pf_inst *inst = instdata; | |
1351 | ||
1352 | if (masklen > inst->bytes || valuelen > inst->bytes || | |
1353 | totallen > inst->bytes || valuelen > masklen) | |
1354 | return -EINVAL; | |
1355 | ||
1356 | pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); | |
1357 | ||
1358 | return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, | |
1359 | subaddr, inst->scratch, totallen); | |
1360 | } | |
1361 | ||
1362 | static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len, | |
1363 | const u8 *maskdata, | |
1364 | const u8 *valuedata) | |
1365 | { | |
1366 | struct pmac_i2c_pf_inst *inst = instdata; | |
1367 | int i, match; | |
1368 | ||
1369 | /* Get return value pointer, it's assumed to be a u32 */ | |
1370 | if (!args || !args->count || !args->u[0].p) | |
1371 | return -EINVAL; | |
1372 | ||
1373 | /* Check buffer */ | |
1374 | if (len > inst->bytes) | |
1375 | return -EINVAL; | |
1376 | ||
1377 | for (i = 0, match = 1; match && i < len; i ++) | |
1378 | if ((inst->buffer[i] & maskdata[i]) != valuedata[i]) | |
1379 | match = 0; | |
1380 | *args->u[0].p = match; | |
1381 | return 0; | |
1382 | } | |
1383 | ||
1384 | static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration) | |
1385 | { | |
1386 | msleep((duration + 999) / 1000); | |
1387 | return 0; | |
1388 | } | |
1389 | ||
1390 | ||
1391 | static struct pmf_handlers pmac_i2c_pfunc_handlers = { | |
1392 | .begin = pmac_i2c_do_begin, | |
1393 | .end = pmac_i2c_do_end, | |
1394 | .read_i2c = pmac_i2c_do_read, | |
1395 | .write_i2c = pmac_i2c_do_write, | |
1396 | .rmw_i2c = pmac_i2c_do_rmw, | |
1397 | .read_i2c_sub = pmac_i2c_do_read_sub, | |
1398 | .write_i2c_sub = pmac_i2c_do_write_sub, | |
1399 | .rmw_i2c_sub = pmac_i2c_do_rmw_sub, | |
1400 | .set_i2c_mode = pmac_i2c_do_set_mode, | |
1401 | .mask_and_compare = pmac_i2c_do_mask_and_comp, | |
1402 | .delay = pmac_i2c_do_delay, | |
1403 | }; | |
1404 | ||
1405 | static void __init pmac_i2c_dev_create(struct device_node *np, int quirks) | |
1406 | { | |
1407 | DBG("dev_create(%s)\n", np->full_name); | |
1408 | ||
1409 | pmf_register_driver(np, &pmac_i2c_pfunc_handlers, | |
1410 | (void *)(long)quirks); | |
1411 | } | |
1412 | ||
1413 | static void __init pmac_i2c_dev_init(struct device_node *np, int quirks) | |
1414 | { | |
1415 | DBG("dev_create(%s)\n", np->full_name); | |
1416 | ||
1417 | pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL); | |
1418 | } | |
1419 | ||
1420 | static void pmac_i2c_dev_suspend(struct device_node *np, int quirks) | |
1421 | { | |
1422 | DBG("dev_suspend(%s)\n", np->full_name); | |
1423 | pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL); | |
1424 | } | |
1425 | ||
1426 | static void pmac_i2c_dev_resume(struct device_node *np, int quirks) | |
1427 | { | |
1428 | DBG("dev_resume(%s)\n", np->full_name); | |
1429 | pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL); | |
1430 | } | |
1431 | ||
1432 | void pmac_pfunc_i2c_suspend(void) | |
1433 | { | |
1434 | pmac_i2c_devscan(pmac_i2c_dev_suspend); | |
1435 | } | |
1436 | ||
1437 | void pmac_pfunc_i2c_resume(void) | |
1438 | { | |
1439 | pmac_i2c_devscan(pmac_i2c_dev_resume); | |
1440 | } | |
1441 | ||
730745a5 | 1442 | /* |
5b9ca526 BH |
1443 | * Initialize us: probe all i2c busses on the machine, instantiate |
1444 | * busses and platform functions as needed. | |
730745a5 BH |
1445 | */ |
1446 | /* This is non-static as it might be called early by smp code */ | |
1447 | int __init pmac_i2c_init(void) | |
14cf11af | 1448 | { |
730745a5 | 1449 | static int i2c_inited; |
14cf11af | 1450 | |
730745a5 BH |
1451 | if (i2c_inited) |
1452 | return 0; | |
1453 | i2c_inited = 1; | |
14cf11af | 1454 | |
730745a5 BH |
1455 | /* Probe keywest-i2c busses */ |
1456 | kw_i2c_probe(); | |
14cf11af | 1457 | |
730745a5 | 1458 | #ifdef CONFIG_ADB_PMU |
a28d3af2 | 1459 | /* Probe PMU i2c busses */ |
730745a5 BH |
1460 | pmu_i2c_probe(); |
1461 | #endif | |
14cf11af | 1462 | |
730745a5 | 1463 | #ifdef CONFIG_PMAC_SMU |
a28d3af2 | 1464 | /* Probe SMU i2c busses */ |
730745a5 BH |
1465 | smu_i2c_probe(); |
1466 | #endif | |
5b9ca526 BH |
1467 | |
1468 | /* Now add plaform functions for some known devices */ | |
1469 | pmac_i2c_devscan(pmac_i2c_dev_create); | |
1470 | ||
730745a5 | 1471 | return 0; |
14cf11af | 1472 | } |
d518b717 | 1473 | machine_arch_initcall(powermac, pmac_i2c_init); |
14cf11af | 1474 | |
a28d3af2 BH |
1475 | /* Since pmac_i2c_init can be called too early for the platform device |
1476 | * registration, we need to do it at a later time. In our case, subsys | |
1477 | * happens to fit well, though I agree it's a bit of a hack... | |
1478 | */ | |
1479 | static int __init pmac_i2c_create_platform_devices(void) | |
1480 | { | |
1481 | struct pmac_i2c_bus *bus; | |
1482 | int i = 0; | |
1483 | ||
1484 | /* In the case where we are initialized from smp_init(), we must | |
1485 | * not use the timer (and thus the irq). It's safe from now on | |
1486 | * though | |
1487 | */ | |
1488 | pmac_i2c_force_poll = 0; | |
1489 | ||
1490 | /* Create platform devices */ | |
1491 | list_for_each_entry(bus, &pmac_i2c_busses, link) { | |
1492 | bus->platform_dev = | |
1493 | platform_device_alloc("i2c-powermac", i++); | |
1494 | if (bus->platform_dev == NULL) | |
1495 | return -ENOMEM; | |
1496 | bus->platform_dev->dev.platform_data = bus; | |
1497 | platform_device_add(bus->platform_dev); | |
1498 | } | |
1499 | ||
5b9ca526 BH |
1500 | /* Now call platform "init" functions */ |
1501 | pmac_i2c_devscan(pmac_i2c_dev_init); | |
1502 | ||
a28d3af2 BH |
1503 | return 0; |
1504 | } | |
d518b717 | 1505 | machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices); |