Commit | Line | Data |
---|---|---|
14cf11af | 1 | /* |
35499c01 | 2 | * Powermac setup and early boot code plus other random bits. |
14cf11af PM |
3 | * |
4 | * PowerPC version | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
6 | * | |
7 | * Adapted for Power Macintosh by Paul Mackerras | |
35499c01 | 8 | * Copyright (C) 1996 Paul Mackerras (paulus@samba.org) |
14cf11af PM |
9 | * |
10 | * Derived from "arch/alpha/kernel/setup.c" | |
11 | * Copyright (C) 1995 Linus Torvalds | |
12 | * | |
13 | * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org) | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | */ | |
21 | ||
22 | /* | |
23 | * bootup setup stuff.. | |
24 | */ | |
25 | ||
14cf11af PM |
26 | #include <linux/init.h> |
27 | #include <linux/errno.h> | |
28 | #include <linux/sched.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/mm.h> | |
31 | #include <linux/stddef.h> | |
32 | #include <linux/unistd.h> | |
33 | #include <linux/ptrace.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/user.h> | |
36 | #include <linux/a.out.h> | |
37 | #include <linux/tty.h> | |
38 | #include <linux/string.h> | |
39 | #include <linux/delay.h> | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/major.h> | |
42 | #include <linux/initrd.h> | |
43 | #include <linux/vt_kern.h> | |
44 | #include <linux/console.h> | |
45 | #include <linux/ide.h> | |
46 | #include <linux/pci.h> | |
47 | #include <linux/adb.h> | |
48 | #include <linux/cuda.h> | |
49 | #include <linux/pmu.h> | |
50 | #include <linux/irq.h> | |
51 | #include <linux/seq_file.h> | |
52 | #include <linux/root_dev.h> | |
53 | #include <linux/bitops.h> | |
54 | #include <linux/suspend.h> | |
55 | ||
56 | #include <asm/reg.h> | |
57 | #include <asm/sections.h> | |
58 | #include <asm/prom.h> | |
59 | #include <asm/system.h> | |
60 | #include <asm/pgtable.h> | |
61 | #include <asm/io.h> | |
3d1229d6 | 62 | #include <asm/kexec.h> |
14cf11af PM |
63 | #include <asm/pci-bridge.h> |
64 | #include <asm/ohare.h> | |
65 | #include <asm/mediabay.h> | |
66 | #include <asm/machdep.h> | |
67 | #include <asm/dma.h> | |
14cf11af PM |
68 | #include <asm/cputable.h> |
69 | #include <asm/btext.h> | |
70 | #include <asm/pmac_feature.h> | |
71 | #include <asm/time.h> | |
72 | #include <asm/of_device.h> | |
7eebde70 | 73 | #include <asm/of_platform.h> |
14cf11af | 74 | #include <asm/mmu_context.h> |
35499c01 PM |
75 | #include <asm/iommu.h> |
76 | #include <asm/smu.h> | |
77 | #include <asm/pmc.h> | |
fbf1769d | 78 | #include <asm/lmb.h> |
51d3082f | 79 | #include <asm/udbg.h> |
14cf11af | 80 | |
3c3f42d6 | 81 | #include "pmac.h" |
14cf11af PM |
82 | |
83 | #undef SHOW_GATWICK_IRQS | |
84 | ||
14cf11af PM |
85 | int ppc_override_l2cr = 0; |
86 | int ppc_override_l2cr_value; | |
87 | int has_l2cache = 0; | |
88 | ||
d2515c80 | 89 | int pmac_newworld; |
9b6b563c | 90 | |
14cf11af PM |
91 | static int current_root_goodness = -1; |
92 | ||
35499c01 | 93 | extern struct machdep_calls pmac_md; |
14cf11af PM |
94 | |
95 | #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ | |
96 | ||
35499c01 PM |
97 | #ifdef CONFIG_PPC64 |
98 | #include <asm/udbg.h> | |
99 | int sccdbg; | |
14cf11af PM |
100 | #endif |
101 | ||
35499c01 PM |
102 | extern void zs_kgdb_hook(int tty_num); |
103 | ||
14cf11af | 104 | sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; |
35499c01 PM |
105 | EXPORT_SYMBOL(sys_ctrler); |
106 | ||
107 | #ifdef CONFIG_PMAC_SMU | |
108 | unsigned long smu_cmdbuf_abs; | |
109 | EXPORT_SYMBOL(smu_cmdbuf_abs); | |
110 | #endif | |
14cf11af PM |
111 | |
112 | #ifdef CONFIG_SMP | |
113 | extern struct smp_ops_t psurge_smp_ops; | |
114 | extern struct smp_ops_t core99_smp_ops; | |
115 | #endif /* CONFIG_SMP */ | |
116 | ||
0dd194d0 | 117 | static void pmac_show_cpuinfo(struct seq_file *m) |
14cf11af PM |
118 | { |
119 | struct device_node *np; | |
018a3d1d | 120 | const char *pp; |
14cf11af | 121 | int plen; |
0dd194d0 PM |
122 | int mbmodel; |
123 | unsigned int mbflags; | |
14cf11af PM |
124 | char* mbname; |
125 | ||
0dd194d0 PM |
126 | mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, |
127 | PMAC_MB_INFO_MODEL, 0); | |
128 | mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, | |
129 | PMAC_MB_INFO_FLAGS, 0); | |
130 | if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME, | |
131 | (long) &mbname) != 0) | |
14cf11af PM |
132 | mbname = "Unknown"; |
133 | ||
134 | /* find motherboard type */ | |
135 | seq_printf(m, "machine\t\t: "); | |
0dd194d0 | 136 | np = of_find_node_by_path("/"); |
14cf11af | 137 | if (np != NULL) { |
018a3d1d | 138 | pp = get_property(np, "model", NULL); |
14cf11af PM |
139 | if (pp != NULL) |
140 | seq_printf(m, "%s\n", pp); | |
141 | else | |
142 | seq_printf(m, "PowerMac\n"); | |
018a3d1d | 143 | pp = get_property(np, "compatible", &plen); |
14cf11af PM |
144 | if (pp != NULL) { |
145 | seq_printf(m, "motherboard\t:"); | |
146 | while (plen > 0) { | |
147 | int l = strlen(pp) + 1; | |
148 | seq_printf(m, " %s", pp); | |
149 | plen -= l; | |
150 | pp += l; | |
151 | } | |
152 | seq_printf(m, "\n"); | |
153 | } | |
0dd194d0 | 154 | of_node_put(np); |
14cf11af PM |
155 | } else |
156 | seq_printf(m, "PowerMac\n"); | |
157 | ||
158 | /* print parsed model */ | |
159 | seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname); | |
160 | seq_printf(m, "pmac flags\t: %08x\n", mbflags); | |
161 | ||
162 | /* find l2 cache info */ | |
0dd194d0 PM |
163 | np = of_find_node_by_name(NULL, "l2-cache"); |
164 | if (np == NULL) | |
165 | np = of_find_node_by_type(NULL, "cache"); | |
166 | if (np != NULL) { | |
018a3d1d JK |
167 | const unsigned int *ic = get_property(np, "i-cache-size", NULL); |
168 | const unsigned int *dc = get_property(np, "d-cache-size", NULL); | |
14cf11af PM |
169 | seq_printf(m, "L2 cache\t:"); |
170 | has_l2cache = 1; | |
171 | if (get_property(np, "cache-unified", NULL) != 0 && dc) { | |
172 | seq_printf(m, " %dK unified", *dc / 1024); | |
173 | } else { | |
174 | if (ic) | |
175 | seq_printf(m, " %dK instruction", *ic / 1024); | |
176 | if (dc) | |
177 | seq_printf(m, "%s %dK data", | |
178 | (ic? " +": ""), *dc / 1024); | |
179 | } | |
180 | pp = get_property(np, "ram-type", NULL); | |
181 | if (pp) | |
182 | seq_printf(m, " %s", pp); | |
183 | seq_printf(m, "\n"); | |
0dd194d0 | 184 | of_node_put(np); |
14cf11af PM |
185 | } |
186 | ||
187 | /* Indicate newworld/oldworld */ | |
188 | seq_printf(m, "pmac-generation\t: %s\n", | |
189 | pmac_newworld ? "NewWorld" : "OldWorld"); | |
14cf11af PM |
190 | } |
191 | ||
35499c01 PM |
192 | #ifndef CONFIG_ADB_CUDA |
193 | int find_via_cuda(void) | |
194 | { | |
195 | if (!find_devices("via-cuda")) | |
196 | return 0; | |
197 | printk("WARNING ! Your machine is CUDA-based but your kernel\n"); | |
198 | printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n"); | |
199 | return 0; | |
200 | } | |
201 | #endif | |
14cf11af | 202 | |
35499c01 PM |
203 | #ifndef CONFIG_ADB_PMU |
204 | int find_via_pmu(void) | |
14cf11af | 205 | { |
35499c01 PM |
206 | if (!find_devices("via-pmu")) |
207 | return 0; | |
208 | printk("WARNING ! Your machine is PMU-based but your kernel\n"); | |
209 | printk(" wasn't compiled with CONFIG_ADB_PMU option !\n"); | |
a575b807 | 210 | return 0; |
35499c01 PM |
211 | } |
212 | #endif | |
14cf11af | 213 | |
35499c01 PM |
214 | #ifndef CONFIG_PMAC_SMU |
215 | int smu_init(void) | |
216 | { | |
217 | /* should check and warn if SMU is present */ | |
218 | return 0; | |
219 | } | |
220 | #endif | |
14cf11af | 221 | |
35499c01 PM |
222 | #ifdef CONFIG_PPC32 |
223 | static volatile u32 *sysctrl_regs; | |
14cf11af | 224 | |
35499c01 PM |
225 | static void __init ohare_init(void) |
226 | { | |
14cf11af PM |
227 | /* this area has the CPU identification register |
228 | and some registers used by smp boards */ | |
229 | sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000); | |
14cf11af | 230 | |
35499c01 PM |
231 | /* |
232 | * Turn on the L2 cache. | |
233 | * We assume that we have a PSX memory controller iff | |
234 | * we have an ohare I/O controller. | |
235 | */ | |
236 | if (find_devices("ohare") != NULL) { | |
237 | if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) { | |
238 | if (sysctrl_regs[4] & 0x10) | |
239 | sysctrl_regs[4] |= 0x04000020; | |
240 | else | |
241 | sysctrl_regs[4] |= 0x04000000; | |
242 | if(has_l2cache) | |
243 | printk(KERN_INFO "Level 2 cache enabled\n"); | |
244 | } | |
245 | } | |
246 | } | |
14cf11af | 247 | |
35499c01 PM |
248 | static void __init l2cr_init(void) |
249 | { | |
14cf11af PM |
250 | /* Checks "l2cr-value" property in the registry */ |
251 | if (cpu_has_feature(CPU_FTR_L2CR)) { | |
252 | struct device_node *np = find_devices("cpus"); | |
253 | if (np == 0) | |
254 | np = find_type_devices("cpu"); | |
255 | if (np != 0) { | |
018a3d1d | 256 | const unsigned int *l2cr = |
14cf11af PM |
257 | get_property(np, "l2cr-value", NULL); |
258 | if (l2cr != 0) { | |
259 | ppc_override_l2cr = 1; | |
260 | ppc_override_l2cr_value = *l2cr; | |
261 | _set_L2CR(0); | |
262 | _set_L2CR(ppc_override_l2cr_value); | |
263 | } | |
264 | } | |
265 | } | |
266 | ||
267 | if (ppc_override_l2cr) | |
35499c01 PM |
268 | printk(KERN_INFO "L2CR overridden (0x%x), " |
269 | "backside cache is %s\n", | |
270 | ppc_override_l2cr_value, | |
271 | (ppc_override_l2cr_value & 0x80000000) | |
14cf11af | 272 | ? "enabled" : "disabled"); |
35499c01 PM |
273 | } |
274 | #endif | |
275 | ||
ff38e7c8 | 276 | static void __init pmac_setup_arch(void) |
35499c01 | 277 | { |
a575b807 | 278 | struct device_node *cpu, *ic; |
018a3d1d | 279 | const int *fp; |
35499c01 PM |
280 | unsigned long pvr; |
281 | ||
282 | pvr = PVR_VER(mfspr(SPRN_PVR)); | |
283 | ||
284 | /* Set loops_per_jiffy to a half-way reasonable value, | |
285 | for use until calibrate_delay gets called. */ | |
286 | loops_per_jiffy = 50000000 / HZ; | |
287 | cpu = of_find_node_by_type(NULL, "cpu"); | |
288 | if (cpu != NULL) { | |
018a3d1d | 289 | fp = get_property(cpu, "clock-frequency", NULL); |
35499c01 PM |
290 | if (fp != NULL) { |
291 | if (pvr >= 0x30 && pvr < 0x80) | |
292 | /* PPC970 etc. */ | |
293 | loops_per_jiffy = *fp / (3 * HZ); | |
294 | else if (pvr == 4 || pvr >= 8) | |
295 | /* 604, G3, G4 etc. */ | |
296 | loops_per_jiffy = *fp / HZ; | |
297 | else | |
298 | /* 601, 603, etc. */ | |
299 | loops_per_jiffy = *fp / (2 * HZ); | |
300 | } | |
301 | of_node_put(cpu); | |
302 | } | |
303 | ||
a575b807 | 304 | /* See if newworld or oldworld */ |
bfab1019 PM |
305 | for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) |
306 | if (get_property(ic, "interrupt-controller", NULL)) | |
307 | break; | |
d2515c80 OH |
308 | if (ic) { |
309 | pmac_newworld = 1; | |
a575b807 | 310 | of_node_put(ic); |
d2515c80 | 311 | } |
a575b807 | 312 | |
35499c01 PM |
313 | /* Lookup PCI hosts */ |
314 | pmac_pci_init(); | |
315 | ||
316 | #ifdef CONFIG_PPC32 | |
317 | ohare_init(); | |
318 | l2cr_init(); | |
319 | #endif /* CONFIG_PPC32 */ | |
320 | ||
14cf11af PM |
321 | #ifdef CONFIG_KGDB |
322 | zs_kgdb_hook(0); | |
323 | #endif | |
324 | ||
14cf11af | 325 | find_via_cuda(); |
14cf11af | 326 | find_via_pmu(); |
35499c01 PM |
327 | smu_init(); |
328 | ||
91c33d28 | 329 | #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64) |
14cf11af PM |
330 | pmac_nvram_init(); |
331 | #endif | |
35499c01 PM |
332 | |
333 | #ifdef CONFIG_PPC32 | |
14cf11af PM |
334 | #ifdef CONFIG_BLK_DEV_INITRD |
335 | if (initrd_start) | |
336 | ROOT_DEV = Root_RAM0; | |
337 | else | |
338 | #endif | |
339 | ROOT_DEV = DEFAULT_ROOT_DEVICE; | |
35499c01 | 340 | #endif |
14cf11af PM |
341 | |
342 | #ifdef CONFIG_SMP | |
343 | /* Check for Core99 */ | |
1beb6a7d | 344 | if (find_devices("uni-n") || find_devices("u3") || find_devices("u4")) |
7ed476d1 | 345 | smp_ops = &core99_smp_ops; |
35499c01 | 346 | #ifdef CONFIG_PPC32 |
14cf11af | 347 | else |
7ed476d1 | 348 | smp_ops = &psurge_smp_ops; |
35499c01 | 349 | #endif |
14cf11af | 350 | #endif /* CONFIG_SMP */ |
e8222502 BH |
351 | |
352 | #ifdef CONFIG_ADB | |
353 | if (strstr(cmd_line, "adb_sync")) { | |
354 | extern int __adb_probe_sync; | |
355 | __adb_probe_sync = 1; | |
356 | } | |
357 | #endif /* CONFIG_ADB */ | |
14cf11af PM |
358 | } |
359 | ||
9b6b563c PM |
360 | char *bootpath; |
361 | char *bootdevice; | |
14cf11af PM |
362 | void *boot_host; |
363 | int boot_target; | |
364 | int boot_part; | |
fd6e7d2d | 365 | static dev_t boot_dev; |
14cf11af PM |
366 | |
367 | #ifdef CONFIG_SCSI | |
35499c01 | 368 | void __init note_scsi_host(struct device_node *node, void *host) |
14cf11af PM |
369 | { |
370 | int l; | |
371 | char *p; | |
372 | ||
373 | l = strlen(node->full_name); | |
374 | if (bootpath != NULL && bootdevice != NULL | |
375 | && strncmp(node->full_name, bootdevice, l) == 0 | |
376 | && (bootdevice[l] == '/' || bootdevice[l] == 0)) { | |
377 | boot_host = host; | |
378 | /* | |
379 | * There's a bug in OF 1.0.5. (Why am I not surprised.) | |
380 | * If you pass a path like scsi/sd@1:0 to canon, it returns | |
381 | * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0 | |
382 | * That is, the scsi target number doesn't get preserved. | |
383 | * So we pick the target number out of bootpath and use that. | |
384 | */ | |
385 | p = strstr(bootpath, "/sd@"); | |
386 | if (p != NULL) { | |
387 | p += 4; | |
388 | boot_target = simple_strtoul(p, NULL, 10); | |
389 | p = strchr(p, ':'); | |
390 | if (p != NULL) | |
391 | boot_part = simple_strtoul(p + 1, NULL, 10); | |
392 | } | |
393 | } | |
394 | } | |
9b6b563c | 395 | EXPORT_SYMBOL(note_scsi_host); |
14cf11af PM |
396 | #endif |
397 | ||
398 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
35499c01 | 399 | static dev_t __init find_ide_boot(void) |
14cf11af PM |
400 | { |
401 | char *p; | |
402 | int n; | |
403 | dev_t __init pmac_find_ide_boot(char *bootdevice, int n); | |
404 | ||
405 | if (bootdevice == NULL) | |
406 | return 0; | |
407 | p = strrchr(bootdevice, '/'); | |
408 | if (p == NULL) | |
409 | return 0; | |
410 | n = p - bootdevice; | |
411 | ||
412 | return pmac_find_ide_boot(bootdevice, n); | |
413 | } | |
414 | #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */ | |
415 | ||
35499c01 | 416 | static void __init find_boot_device(void) |
14cf11af PM |
417 | { |
418 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
419 | boot_dev = find_ide_boot(); | |
420 | #endif | |
421 | } | |
422 | ||
14cf11af PM |
423 | /* TODO: Merge the suspend-to-ram with the common code !!! |
424 | * currently, this is a stub implementation for suspend-to-disk | |
425 | * only | |
426 | */ | |
427 | ||
428 | #ifdef CONFIG_SOFTWARE_SUSPEND | |
429 | ||
430 | static int pmac_pm_prepare(suspend_state_t state) | |
431 | { | |
432 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | static int pmac_pm_enter(suspend_state_t state) | |
438 | { | |
439 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
440 | ||
441 | /* Giveup the lazy FPU & vec so we don't have to back them | |
442 | * up from the low level code | |
443 | */ | |
444 | enable_kernel_fp(); | |
445 | ||
446 | #ifdef CONFIG_ALTIVEC | |
400d2212 | 447 | if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) |
14cf11af PM |
448 | enable_kernel_altivec(); |
449 | #endif /* CONFIG_ALTIVEC */ | |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
454 | static int pmac_pm_finish(suspend_state_t state) | |
455 | { | |
456 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
457 | ||
458 | /* Restore userland MMU context */ | |
6218a761 | 459 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
14cf11af PM |
460 | |
461 | return 0; | |
462 | } | |
463 | ||
0fba3a1f JB |
464 | static int pmac_pm_valid(suspend_state_t state) |
465 | { | |
466 | switch (state) { | |
467 | case PM_SUSPEND_DISK: | |
468 | return 1; | |
469 | /* can't do any other states via generic mechanism yet */ | |
470 | default: | |
471 | return 0; | |
472 | } | |
473 | } | |
474 | ||
14cf11af PM |
475 | static struct pm_ops pmac_pm_ops = { |
476 | .pm_disk_mode = PM_DISK_SHUTDOWN, | |
477 | .prepare = pmac_pm_prepare, | |
478 | .enter = pmac_pm_enter, | |
479 | .finish = pmac_pm_finish, | |
0fba3a1f | 480 | .valid = pmac_pm_valid, |
14cf11af PM |
481 | }; |
482 | ||
483 | #endif /* CONFIG_SOFTWARE_SUSPEND */ | |
484 | ||
35499c01 PM |
485 | static int initializing = 1; |
486 | ||
14cf11af PM |
487 | static int pmac_late_init(void) |
488 | { | |
489 | initializing = 0; | |
490 | #ifdef CONFIG_SOFTWARE_SUSPEND | |
491 | pm_set_ops(&pmac_pm_ops); | |
492 | #endif /* CONFIG_SOFTWARE_SUSPEND */ | |
493 | return 0; | |
494 | } | |
495 | ||
496 | late_initcall(pmac_late_init); | |
497 | ||
498 | /* can't be __init - can be called whenever a disk is first accessed */ | |
35499c01 | 499 | void note_bootable_part(dev_t dev, int part, int goodness) |
14cf11af PM |
500 | { |
501 | static int found_boot = 0; | |
502 | char *p; | |
503 | ||
504 | if (!initializing) | |
505 | return; | |
506 | if ((goodness <= current_root_goodness) && | |
507 | ROOT_DEV != DEFAULT_ROOT_DEVICE) | |
508 | return; | |
509 | p = strstr(saved_command_line, "root="); | |
510 | if (p != NULL && (p == saved_command_line || p[-1] == ' ')) | |
511 | return; | |
512 | ||
513 | if (!found_boot) { | |
514 | find_boot_device(); | |
515 | found_boot = 1; | |
516 | } | |
517 | if (!boot_dev || dev == boot_dev) { | |
518 | ROOT_DEV = dev + part; | |
519 | boot_dev = 0; | |
520 | current_root_goodness = goodness; | |
521 | } | |
522 | } | |
523 | ||
14cf11af | 524 | #ifdef CONFIG_ADB_CUDA |
35499c01 PM |
525 | static void cuda_restart(void) |
526 | { | |
14cf11af | 527 | struct adb_request req; |
14cf11af | 528 | |
35499c01 PM |
529 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); |
530 | for (;;) | |
531 | cuda_poll(); | |
532 | } | |
533 | ||
534 | static void cuda_shutdown(void) | |
535 | { | |
536 | struct adb_request req; | |
537 | ||
538 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); | |
539 | for (;;) | |
540 | cuda_poll(); | |
541 | } | |
542 | ||
543 | #else | |
544 | #define cuda_restart() | |
545 | #define cuda_shutdown() | |
546 | #endif | |
547 | ||
548 | #ifndef CONFIG_ADB_PMU | |
549 | #define pmu_restart() | |
550 | #define pmu_shutdown() | |
551 | #endif | |
552 | ||
553 | #ifndef CONFIG_PMAC_SMU | |
554 | #define smu_restart() | |
555 | #define smu_shutdown() | |
556 | #endif | |
557 | ||
558 | static void pmac_restart(char *cmd) | |
559 | { | |
14cf11af | 560 | switch (sys_ctrler) { |
14cf11af | 561 | case SYS_CTRLER_CUDA: |
35499c01 | 562 | cuda_restart(); |
14cf11af | 563 | break; |
14cf11af PM |
564 | case SYS_CTRLER_PMU: |
565 | pmu_restart(); | |
566 | break; | |
35499c01 PM |
567 | case SYS_CTRLER_SMU: |
568 | smu_restart(); | |
569 | break; | |
14cf11af PM |
570 | default: ; |
571 | } | |
572 | } | |
573 | ||
35499c01 | 574 | static void pmac_power_off(void) |
14cf11af | 575 | { |
14cf11af | 576 | switch (sys_ctrler) { |
14cf11af | 577 | case SYS_CTRLER_CUDA: |
35499c01 | 578 | cuda_shutdown(); |
14cf11af | 579 | break; |
14cf11af PM |
580 | case SYS_CTRLER_PMU: |
581 | pmu_shutdown(); | |
582 | break; | |
35499c01 PM |
583 | case SYS_CTRLER_SMU: |
584 | smu_shutdown(); | |
585 | break; | |
14cf11af PM |
586 | default: ; |
587 | } | |
588 | } | |
589 | ||
590 | static void | |
591 | pmac_halt(void) | |
592 | { | |
593 | pmac_power_off(); | |
594 | } | |
595 | ||
35499c01 PM |
596 | /* |
597 | * Early initialization. | |
598 | */ | |
599 | static void __init pmac_init_early(void) | |
600 | { | |
51d3082f BH |
601 | /* Enable early btext debug if requested */ |
602 | if (strstr(cmd_line, "btextdbg")) { | |
603 | udbg_adb_init_early(); | |
604 | register_early_udbg_console(); | |
35499c01 PM |
605 | } |
606 | ||
51d3082f BH |
607 | /* Probe motherboard chipset */ |
608 | pmac_feature_init(); | |
609 | ||
51d3082f BH |
610 | /* Initialize debug stuff */ |
611 | udbg_scc_init(!!strstr(cmd_line, "sccdbg")); | |
612 | udbg_adb_init(!!strstr(cmd_line, "btextdbg")); | |
613 | ||
614 | #ifdef CONFIG_PPC64 | |
1beb6a7d | 615 | iommu_init_early_dart(); |
35499c01 PM |
616 | #endif |
617 | } | |
618 | ||
35499c01 PM |
619 | /* |
620 | * pmac has no legacy IO, anything calling this function has to | |
621 | * fail or bad things will happen | |
622 | */ | |
623 | static int pmac_check_legacy_ioport(unsigned int baseport) | |
624 | { | |
625 | return -ENODEV; | |
626 | } | |
627 | ||
628 | static int __init pmac_declare_of_platform_devices(void) | |
14cf11af | 629 | { |
a28d3af2 | 630 | struct device_node *np; |
14cf11af | 631 | |
e8222502 BH |
632 | if (machine_is(chrp)) |
633 | return -1; | |
634 | ||
635 | if (!machine_is(powermac)) | |
636 | return 0; | |
637 | ||
730745a5 | 638 | np = of_find_node_by_name(NULL, "valkyrie"); |
35499c01 PM |
639 | if (np) |
640 | of_platform_device_create(np, "valkyrie", NULL); | |
730745a5 | 641 | np = of_find_node_by_name(NULL, "platinum"); |
35499c01 PM |
642 | if (np) |
643 | of_platform_device_create(np, "platinum", NULL); | |
35499c01 PM |
644 | np = of_find_node_by_type(NULL, "smu"); |
645 | if (np) { | |
646 | of_platform_device_create(np, "smu", NULL); | |
647 | of_node_put(np); | |
648 | } | |
14cf11af PM |
649 | |
650 | return 0; | |
651 | } | |
652 | ||
653 | device_initcall(pmac_declare_of_platform_devices); | |
35499c01 PM |
654 | |
655 | /* | |
656 | * Called very early, MMU is off, device-tree isn't unflattened | |
657 | */ | |
e8222502 | 658 | static int __init pmac_probe(void) |
35499c01 | 659 | { |
e8222502 BH |
660 | unsigned long root = of_get_flat_dt_root(); |
661 | ||
662 | if (!of_flat_dt_is_compatible(root, "Power Macintosh") && | |
663 | !of_flat_dt_is_compatible(root, "MacRISC")) | |
35499c01 PM |
664 | return 0; |
665 | ||
e8222502 | 666 | #ifdef CONFIG_PPC64 |
35499c01 PM |
667 | /* |
668 | * On U3, the DART (iommu) must be allocated now since it | |
669 | * has an impact on htab_initialize (due to the large page it | |
670 | * occupies having to be broken up so the DART itself is not | |
671 | * part of the cacheable linar mapping | |
672 | */ | |
1beb6a7d | 673 | alloc_dart_table(); |
7d0daae4 ME |
674 | |
675 | hpte_init_native(); | |
35499c01 PM |
676 | #endif |
677 | ||
e8222502 BH |
678 | #ifdef CONFIG_PPC32 |
679 | /* isa_io_base gets set in pmac_pci_init */ | |
e8222502 BH |
680 | ISA_DMA_THRESHOLD = ~0L; |
681 | DMA_MODE_READ = 1; | |
682 | DMA_MODE_WRITE = 2; | |
683 | ||
684 | #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) | |
685 | #ifdef CONFIG_BLK_DEV_IDE_PMAC | |
686 | ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; | |
687 | ppc_ide_md.default_io_base = pmac_ide_get_base; | |
688 | #endif /* CONFIG_BLK_DEV_IDE_PMAC */ | |
689 | #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ | |
690 | ||
691 | #endif /* CONFIG_PPC32 */ | |
692 | ||
35499c01 PM |
693 | #ifdef CONFIG_PMAC_SMU |
694 | /* | |
695 | * SMU based G5s need some memory below 2Gb, at least the current | |
696 | * driver needs that. We have to allocate it now. We allocate 4k | |
697 | * (1 small page) for now. | |
698 | */ | |
699 | smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL); | |
700 | #endif /* CONFIG_PMAC_SMU */ | |
701 | ||
702 | return 1; | |
703 | } | |
704 | ||
705 | #ifdef CONFIG_PPC64 | |
51d3082f BH |
706 | /* Move that to pci.c */ |
707 | static int pmac_pci_probe_mode(struct pci_bus *bus) | |
35499c01 PM |
708 | { |
709 | struct device_node *node = bus->sysdata; | |
710 | ||
711 | /* We need to use normal PCI probing for the AGP bus, | |
1beb6a7d BH |
712 | * since the device for the AGP bridge isn't in the tree. |
713 | */ | |
714 | if (bus->self == NULL && (device_is_compatible(node, "u3-agp") || | |
715 | device_is_compatible(node, "u4-pcie"))) | |
35499c01 | 716 | return PCI_PROBE_NORMAL; |
35499c01 PM |
717 | return PCI_PROBE_DEVTREE; |
718 | } | |
719 | #endif | |
720 | ||
e8222502 BH |
721 | define_machine(powermac) { |
722 | .name = "PowerMac", | |
35499c01 PM |
723 | .probe = pmac_probe, |
724 | .setup_arch = pmac_setup_arch, | |
725 | .init_early = pmac_init_early, | |
726 | .show_cpuinfo = pmac_show_cpuinfo, | |
35499c01 | 727 | .init_IRQ = pmac_pic_init, |
cc5d0189 | 728 | .get_irq = NULL, /* changed later */ |
f90bb153 | 729 | .pci_irq_fixup = pmac_pci_irq_fixup, |
35499c01 PM |
730 | .restart = pmac_restart, |
731 | .power_off = pmac_power_off, | |
732 | .halt = pmac_halt, | |
733 | .time_init = pmac_time_init, | |
734 | .get_boot_time = pmac_get_boot_time, | |
735 | .set_rtc_time = pmac_set_rtc_time, | |
736 | .get_rtc_time = pmac_get_rtc_time, | |
737 | .calibrate_decr = pmac_calibrate_decr, | |
738 | .feature_call = pmac_do_feature_call, | |
739 | .check_legacy_ioport = pmac_check_legacy_ioport, | |
be6b8439 | 740 | .progress = udbg_progress, |
35499c01 | 741 | #ifdef CONFIG_PPC64 |
51d3082f | 742 | .pci_probe_mode = pmac_pci_probe_mode, |
a0652fc9 | 743 | .power_save = power4_idle, |
35499c01 | 744 | .enable_pmcs = power4_enable_pmcs, |
3d1229d6 ME |
745 | #ifdef CONFIG_KEXEC |
746 | .machine_kexec = default_machine_kexec, | |
747 | .machine_kexec_prepare = default_machine_kexec_prepare, | |
cc532915 | 748 | .machine_crash_shutdown = default_machine_crash_shutdown, |
35499c01 | 749 | #endif |
3d1229d6 | 750 | #endif /* CONFIG_PPC64 */ |
35499c01 PM |
751 | #ifdef CONFIG_PPC32 |
752 | .pcibios_enable_device_hook = pmac_pci_enable_device_hook, | |
753 | .pcibios_after_init = pmac_pcibios_after_init, | |
754 | .phys_mem_access_prot = pci_phys_mem_access_prot, | |
755 | #endif | |
e8222502 BH |
756 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) |
757 | .cpu_die = generic_mach_cpu_die, | |
758 | #endif | |
35499c01 | 759 | }; |