Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/ppc/platforms/setup.c | |
3 | * | |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * | |
8 | * Support for PReP (Motorola MTX/MVME) | |
9 | * by Troy Benjegerdes (hozer@drgw.net) | |
10 | */ | |
11 | ||
12 | /* | |
13 | * bootup setup stuff.. | |
14 | */ | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/stddef.h> | |
24 | #include <linux/unistd.h> | |
25 | #include <linux/ptrace.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/user.h> | |
28 | #include <linux/a.out.h> | |
29 | #include <linux/tty.h> | |
30 | #include <linux/major.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/reboot.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/initrd.h> | |
35 | #include <linux/ioport.h> | |
36 | #include <linux/console.h> | |
37 | #include <linux/timex.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/ide.h> | |
40 | #include <linux/seq_file.h> | |
41 | #include <linux/root_dev.h> | |
42 | ||
43 | #include <asm/sections.h> | |
44 | #include <asm/mmu.h> | |
45 | #include <asm/processor.h> | |
46 | #include <asm/residual.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/pgtable.h> | |
49 | #include <asm/cache.h> | |
50 | #include <asm/dma.h> | |
51 | #include <asm/machdep.h> | |
52 | #include <asm/mc146818rtc.h> | |
53 | #include <asm/mk48t59.h> | |
54 | #include <asm/prep_nvram.h> | |
55 | #include <asm/raven.h> | |
56 | #include <asm/vga.h> | |
57 | #include <asm/time.h> | |
58 | #include <asm/mpc10x.h> | |
59 | #include <asm/i8259.h> | |
60 | #include <asm/open_pic.h> | |
61 | #include <asm/pci-bridge.h> | |
62 | #include <asm/todc.h> | |
63 | ||
26ef5c09 DG |
64 | /* prep registers for L2 */ |
65 | #define CACHECRBA 0x80000823 /* Cache configuration register address */ | |
66 | #define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */ | |
67 | #define L2CACHE_512KB 0x00 /* 512KB */ | |
68 | #define L2CACHE_256KB 0x01 /* 256KB */ | |
69 | #define L2CACHE_1MB 0x02 /* 1MB */ | |
70 | #define L2CACHE_NONE 0x03 /* NONE */ | |
71 | #define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */ | |
72 | ||
1da177e4 LT |
73 | TODC_ALLOC(); |
74 | ||
75 | unsigned char ucSystemType; | |
76 | unsigned char ucBoardRev; | |
77 | unsigned char ucBoardRevMaj, ucBoardRevMin; | |
78 | ||
79 | extern unsigned char prep_nvram_read_val(int addr); | |
80 | extern void prep_nvram_write_val(int addr, | |
81 | unsigned char val); | |
82 | extern unsigned char rs_nvram_read_val(int addr); | |
83 | extern void rs_nvram_write_val(int addr, | |
84 | unsigned char val); | |
85 | extern void ibm_prep_init(void); | |
86 | ||
87 | extern void prep_find_bridges(void); | |
88 | ||
89 | int _prep_type; | |
90 | ||
91 | extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); | |
92 | extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); | |
93 | extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); | |
94 | extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); | |
95 | extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); | |
96 | ||
97 | ||
98 | #define cached_21 (((char *)(ppc_cached_irq_mask))[3]) | |
99 | #define cached_A1 (((char *)(ppc_cached_irq_mask))[2]) | |
100 | ||
1da177e4 LT |
101 | #ifdef CONFIG_SOUND_CS4232 |
102 | long ppc_cs4232_dma, ppc_cs4232_dma2; | |
103 | #endif | |
104 | ||
105 | extern PTE *Hash, *Hash_end; | |
106 | extern unsigned long Hash_size, Hash_mask; | |
107 | extern int probingmem; | |
108 | extern unsigned long loops_per_jiffy; | |
109 | ||
110 | #ifdef CONFIG_SOUND_CS4232 | |
111 | EXPORT_SYMBOL(ppc_cs4232_dma); | |
112 | EXPORT_SYMBOL(ppc_cs4232_dma2); | |
113 | #endif | |
114 | ||
115 | /* useful ISA ports */ | |
116 | #define PREP_SYSCTL 0x81c | |
117 | /* present in the IBM reference design; possibly identical in Mot boxes: */ | |
118 | #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */ | |
119 | #define PREP_IBM_SIMM_PRESENCE 0x804 | |
120 | #define PREP_IBM_EQUIPMENT 0x80c | |
121 | #define PREP_IBM_L2INFO 0x80d | |
122 | #define PREP_IBM_PM1 0x82a /* power management register 1 */ | |
123 | #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */ | |
124 | #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */ | |
125 | ||
126 | /* Equipment Present Register masks: */ | |
127 | #define PREP_IBM_EQUIPMENT_RESERVED 0x80 | |
128 | #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40 | |
129 | #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08 | |
130 | #define PREP_IBM_EQUIPMENT_L2_256 0x04 | |
131 | #define PREP_IBM_EQUIPMENT_CPU 0x02 | |
132 | #define PREP_IBM_EQUIPMENT_L2 0x01 | |
133 | ||
134 | /* planar ID values: */ | |
135 | /* Sandalfoot/Sandalbow (6015/7020) */ | |
136 | #define PREP_IBM_SANDALFOOT 0xfc | |
137 | /* Woodfield, Thinkpad 850/860 (6042/7249) */ | |
138 | #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */ | |
139 | /* PowerSeries 830/850 (6050/6070) */ | |
140 | #define PREP_IBM_CAROLINA_IDE_0 0xf0 | |
141 | #define PREP_IBM_CAROLINA_IDE_1 0xf1 | |
142 | #define PREP_IBM_CAROLINA_IDE_2 0xf2 | |
143 | #define PREP_IBM_CAROLINA_IDE_3 0xf3 | |
144 | /* 7248-43P */ | |
145 | #define PREP_IBM_CAROLINA_SCSI_0 0xf4 | |
146 | #define PREP_IBM_CAROLINA_SCSI_1 0xf5 | |
147 | #define PREP_IBM_CAROLINA_SCSI_2 0xf6 | |
148 | #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */ | |
149 | /* Tiger1 (7043-140) */ | |
150 | #define PREP_IBM_TIGER1_133 0xd1 | |
151 | #define PREP_IBM_TIGER1_166 0xd2 | |
152 | #define PREP_IBM_TIGER1_180 0xd3 | |
153 | #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */ | |
154 | #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */ | |
155 | ||
156 | /* setup_ibm_pci: | |
157 | * set Motherboard_map_name, Motherboard_map, Motherboard_routes. | |
158 | * return 8259 edge/level masks. | |
159 | */ | |
160 | void (*setup_ibm_pci)(char *irq_lo, char *irq_hi); | |
161 | ||
162 | extern char *Motherboard_map_name; /* for use in *_cpuinfo */ | |
163 | ||
164 | /* | |
165 | * As found in the PReP reference implementation. | |
166 | * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP. | |
167 | */ | |
168 | static void __init | |
169 | prep_gen_enable_l2(void) | |
170 | { | |
171 | outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL); | |
172 | } | |
173 | ||
174 | /* Used by Carolina and Tiger1 */ | |
175 | static void __init | |
176 | prep_carolina_enable_l2(void) | |
177 | { | |
178 | outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL); | |
179 | } | |
180 | ||
181 | /* cpuinfo code common to all IBM PReP */ | |
f495a8bf | 182 | static void |
1da177e4 LT |
183 | prep_ibm_cpuinfo(struct seq_file *m) |
184 | { | |
185 | unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); | |
186 | ||
187 | seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name); | |
188 | ||
189 | seq_printf(m, "upgrade cpu\t: "); | |
190 | if (equip_reg & PREP_IBM_EQUIPMENT_CPU) { | |
191 | seq_printf(m, "not "); | |
192 | } | |
193 | seq_printf(m, "present\n"); | |
194 | ||
195 | /* print info about the SCSI fuse */ | |
196 | seq_printf(m, "scsi fuse\t: "); | |
197 | if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE) | |
198 | seq_printf(m, "ok"); | |
199 | else | |
200 | seq_printf(m, "bad"); | |
201 | seq_printf(m, "\n"); | |
202 | ||
203 | /* print info about SIMMs */ | |
204 | if (have_residual_data) { | |
205 | int i; | |
206 | seq_printf(m, "simms\t\t: "); | |
207 | for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) { | |
208 | if (res->Memories[i].SIMMSize != 0) | |
209 | seq_printf(m, "%d:%ldMiB ", i, | |
210 | (res->Memories[i].SIMMSize > 1024) ? | |
211 | res->Memories[i].SIMMSize>>20 : | |
212 | res->Memories[i].SIMMSize); | |
213 | } | |
214 | seq_printf(m, "\n"); | |
215 | } | |
216 | } | |
217 | ||
f495a8bf | 218 | static int |
1da177e4 LT |
219 | prep_gen_cpuinfo(struct seq_file *m) |
220 | { | |
221 | prep_ibm_cpuinfo(m); | |
222 | return 0; | |
223 | } | |
224 | ||
f495a8bf | 225 | static int |
1da177e4 LT |
226 | prep_sandalfoot_cpuinfo(struct seq_file *m) |
227 | { | |
228 | unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); | |
229 | ||
230 | prep_ibm_cpuinfo(m); | |
231 | ||
232 | /* report amount and type of L2 cache present */ | |
233 | seq_printf(m, "L2 cache\t: "); | |
234 | if (equip_reg & PREP_IBM_EQUIPMENT_L2) { | |
235 | seq_printf(m, "not present"); | |
236 | } else { | |
237 | if (equip_reg & PREP_IBM_EQUIPMENT_L2_256) | |
238 | seq_printf(m, "256KiB"); | |
239 | else | |
240 | seq_printf(m, "unknown size"); | |
241 | ||
242 | if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK) | |
243 | seq_printf(m, ", copy-back"); | |
244 | else | |
245 | seq_printf(m, ", write-through"); | |
246 | } | |
247 | seq_printf(m, "\n"); | |
248 | ||
249 | return 0; | |
250 | } | |
251 | ||
f495a8bf | 252 | static int |
1da177e4 LT |
253 | prep_thinkpad_cpuinfo(struct seq_file *m) |
254 | { | |
255 | unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); | |
256 | char *cpubus_speed, *pci_speed; | |
257 | ||
258 | prep_ibm_cpuinfo(m); | |
259 | ||
260 | /* report amount and type of L2 cache present */ | |
261 | seq_printf(m, "l2 cache\t: "); | |
262 | if ((equip_reg & 0x1) == 0) { | |
263 | switch ((equip_reg & 0xc) >> 2) { | |
264 | case 0x0: | |
265 | seq_printf(m, "128KiB look-aside 2-way write-through\n"); | |
266 | break; | |
267 | case 0x1: | |
268 | seq_printf(m, "512KiB look-aside direct-mapped write-back\n"); | |
269 | break; | |
270 | case 0x2: | |
271 | seq_printf(m, "256KiB look-aside 2-way write-through\n"); | |
272 | break; | |
273 | case 0x3: | |
274 | seq_printf(m, "256KiB look-aside direct-mapped write-back\n"); | |
275 | break; | |
276 | } | |
277 | } else { | |
278 | seq_printf(m, "not present\n"); | |
279 | } | |
280 | ||
281 | /* report bus speeds because we can */ | |
282 | if ((equip_reg & 0x80) == 0) { | |
283 | switch ((equip_reg & 0x30) >> 4) { | |
284 | case 0x1: | |
285 | cpubus_speed = "50"; | |
286 | pci_speed = "25"; | |
287 | break; | |
288 | case 0x3: | |
289 | cpubus_speed = "66"; | |
290 | pci_speed = "33"; | |
291 | break; | |
292 | default: | |
293 | cpubus_speed = "unknown"; | |
294 | pci_speed = "unknown"; | |
295 | break; | |
296 | } | |
297 | } else { | |
298 | switch ((equip_reg & 0x30) >> 4) { | |
299 | case 0x1: | |
300 | cpubus_speed = "25"; | |
301 | pci_speed = "25"; | |
302 | break; | |
303 | case 0x2: | |
304 | cpubus_speed = "60"; | |
305 | pci_speed = "30"; | |
306 | break; | |
307 | case 0x3: | |
308 | cpubus_speed = "33"; | |
309 | pci_speed = "33"; | |
310 | break; | |
311 | default: | |
312 | cpubus_speed = "unknown"; | |
313 | pci_speed = "unknown"; | |
314 | break; | |
315 | } | |
316 | } | |
317 | seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed); | |
318 | seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed); | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
f495a8bf | 323 | static int |
1da177e4 LT |
324 | prep_carolina_cpuinfo(struct seq_file *m) |
325 | { | |
326 | unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); | |
327 | ||
328 | prep_ibm_cpuinfo(m); | |
329 | ||
330 | /* report amount and type of L2 cache present */ | |
331 | seq_printf(m, "l2 cache\t: "); | |
332 | if ((equip_reg & 0x1) == 0) { | |
333 | unsigned int l2_reg = inb(PREP_IBM_L2INFO); | |
334 | ||
335 | /* L2 size */ | |
336 | if ((l2_reg & 0x60) == 0) | |
337 | seq_printf(m, "256KiB"); | |
338 | else if ((l2_reg & 0x60) == 0x20) | |
339 | seq_printf(m, "512KiB"); | |
340 | else | |
341 | seq_printf(m, "unknown size"); | |
342 | ||
343 | /* L2 type */ | |
344 | if ((l2_reg & 0x3) == 0) | |
345 | seq_printf(m, ", async"); | |
346 | else if ((l2_reg & 0x3) == 1) | |
347 | seq_printf(m, ", sync"); | |
348 | else | |
349 | seq_printf(m, ", unknown type"); | |
350 | ||
351 | seq_printf(m, "\n"); | |
352 | } else { | |
353 | seq_printf(m, "not present\n"); | |
354 | } | |
355 | ||
356 | return 0; | |
357 | } | |
358 | ||
f495a8bf | 359 | static int |
1da177e4 LT |
360 | prep_tiger1_cpuinfo(struct seq_file *m) |
361 | { | |
362 | unsigned int l2_reg = inb(PREP_IBM_L2INFO); | |
363 | ||
364 | prep_ibm_cpuinfo(m); | |
365 | ||
366 | /* report amount and type of L2 cache present */ | |
367 | seq_printf(m, "l2 cache\t: "); | |
368 | if ((l2_reg & 0xf) == 0xf) { | |
369 | seq_printf(m, "not present\n"); | |
370 | } else { | |
371 | if (l2_reg & 0x8) | |
372 | seq_printf(m, "async, "); | |
373 | else | |
374 | seq_printf(m, "sync burst, "); | |
375 | ||
376 | if (l2_reg & 0x4) | |
377 | seq_printf(m, "parity, "); | |
378 | else | |
379 | seq_printf(m, "no parity, "); | |
380 | ||
381 | switch (l2_reg & 0x3) { | |
382 | case 0x0: | |
383 | seq_printf(m, "256KiB\n"); | |
384 | break; | |
385 | case 0x1: | |
386 | seq_printf(m, "512KiB\n"); | |
387 | break; | |
388 | case 0x2: | |
389 | seq_printf(m, "1MiB\n"); | |
390 | break; | |
391 | default: | |
392 | seq_printf(m, "unknown size\n"); | |
393 | break; | |
394 | } | |
395 | } | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
400 | ||
401 | /* Used by all Motorola PReP */ | |
f495a8bf | 402 | static int |
1da177e4 LT |
403 | prep_mot_cpuinfo(struct seq_file *m) |
404 | { | |
405 | unsigned int cachew = *((unsigned char *)CACHECRBA); | |
406 | ||
407 | seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name); | |
408 | ||
409 | /* report amount and type of L2 cache present */ | |
410 | seq_printf(m, "l2 cache\t: "); | |
411 | switch (cachew & L2CACHE_MASK) { | |
412 | case L2CACHE_512KB: | |
413 | seq_printf(m, "512KiB"); | |
414 | break; | |
415 | case L2CACHE_256KB: | |
416 | seq_printf(m, "256KiB"); | |
417 | break; | |
418 | case L2CACHE_1MB: | |
419 | seq_printf(m, "1MiB"); | |
420 | break; | |
421 | case L2CACHE_NONE: | |
422 | seq_printf(m, "none\n"); | |
423 | goto no_l2; | |
424 | break; | |
425 | default: | |
426 | seq_printf(m, "%x\n", cachew); | |
427 | } | |
428 | ||
429 | seq_printf(m, ", parity %s", | |
430 | (cachew & L2CACHE_PARITY)? "enabled" : "disabled"); | |
431 | ||
432 | seq_printf(m, " SRAM:"); | |
433 | ||
434 | switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) { | |
435 | case 1: seq_printf(m, "synchronous, parity, flow-through\n"); | |
436 | break; | |
437 | case 2: seq_printf(m, "asynchronous, no parity\n"); | |
438 | break; | |
439 | case 3: seq_printf(m, "asynchronous, parity\n"); | |
440 | break; | |
441 | default:seq_printf(m, "synchronous, pipelined, no parity\n"); | |
442 | break; | |
443 | } | |
444 | ||
445 | no_l2: | |
446 | /* print info about SIMMs */ | |
447 | if (have_residual_data) { | |
448 | int i; | |
449 | seq_printf(m, "simms\t\t: "); | |
450 | for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) { | |
451 | if (res->Memories[i].SIMMSize != 0) | |
452 | seq_printf(m, "%d:%ldM ", i, | |
453 | (res->Memories[i].SIMMSize > 1024) ? | |
454 | res->Memories[i].SIMMSize>>20 : | |
455 | res->Memories[i].SIMMSize); | |
456 | } | |
457 | seq_printf(m, "\n"); | |
458 | } | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
f495a8bf | 463 | static void |
1da177e4 LT |
464 | prep_restart(char *cmd) |
465 | { | |
466 | #define PREP_SP92 0x92 /* Special Port 92 */ | |
467 | local_irq_disable(); /* no interrupts */ | |
468 | ||
469 | /* set exception prefix high - to the prom */ | |
470 | _nmask_and_or_msr(0, MSR_IP); | |
471 | ||
472 | /* make sure bit 0 (reset) is a 0 */ | |
473 | outb( inb(PREP_SP92) & ~1L , PREP_SP92); | |
474 | /* signal a reset to system control port A - soft reset */ | |
475 | outb( inb(PREP_SP92) | 1 , PREP_SP92); | |
476 | ||
477 | while ( 1 ) ; | |
478 | /* not reached */ | |
479 | #undef PREP_SP92 | |
480 | } | |
481 | ||
f495a8bf | 482 | static void |
1da177e4 LT |
483 | prep_halt(void) |
484 | { | |
485 | local_irq_disable(); /* no interrupts */ | |
486 | ||
487 | /* set exception prefix high - to the prom */ | |
488 | _nmask_and_or_msr(0, MSR_IP); | |
489 | ||
490 | while ( 1 ) ; | |
491 | /* not reached */ | |
492 | } | |
493 | ||
494 | /* Carrera is the power manager in the Thinkpads. Unfortunately not much is | |
495 | * known about it, so we can't power down. | |
496 | */ | |
f495a8bf | 497 | static void |
1da177e4 LT |
498 | prep_carrera_poweroff(void) |
499 | { | |
500 | prep_halt(); | |
501 | } | |
502 | ||
503 | /* | |
504 | * On most IBM PReP's, power management is handled by a Signetics 87c750 | |
505 | * behind the Utah component on the ISA bus. To access the 750 you must write | |
506 | * a series of nibbles to port 0x82a (decoded by the Utah). This is described | |
507 | * somewhat in the IBM Carolina Technical Specification. | |
508 | * -Hollis | |
509 | */ | |
f495a8bf | 510 | static void |
1da177e4 LT |
511 | utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) |
512 | { | |
513 | /* | |
514 | * byte1: 0 0 0 1 0 d a5 a4 | |
515 | * byte2: 0 0 0 1 a3 a2 a1 a0 | |
516 | * | |
517 | * d = the bit's value, enabled or disabled | |
518 | * (a5 a4 a3) = the byte number, minus 20 | |
519 | * (a2 a1 a0) = the bit number | |
520 | * | |
521 | * example: set the 5th bit of byte 21 (21.5) | |
522 | * a5 a4 a3 = 001 (byte 1) | |
523 | * a2 a1 a0 = 101 (bit 5) | |
524 | * | |
525 | * byte1 = 0001 0100 (0x14) | |
526 | * byte2 = 0001 1101 (0x1d) | |
527 | */ | |
528 | unsigned char byte1=0x10, byte2=0x10; | |
529 | ||
530 | /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */ | |
531 | bytenum -= 20; | |
532 | ||
533 | byte1 |= (!!value) << 2; /* set d */ | |
534 | byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */ | |
535 | ||
536 | byte2 |= (bytenum & 0x1) << 3; /* set a3 */ | |
537 | byte2 |= bitnum & 0x7; /* set a2, a1, a0 */ | |
538 | ||
539 | outb(byte1, PREP_IBM_PM1); /* first nibble */ | |
540 | mb(); | |
541 | udelay(100); /* important: let controller recover */ | |
542 | ||
543 | outb(byte2, PREP_IBM_PM1); /* second nibble */ | |
544 | mb(); | |
545 | udelay(100); /* important: let controller recover */ | |
546 | } | |
547 | ||
f495a8bf | 548 | static void |
1da177e4 LT |
549 | prep_sig750_poweroff(void) |
550 | { | |
551 | /* tweak the power manager found in most IBM PRePs (except Thinkpads) */ | |
552 | ||
553 | local_irq_disable(); | |
554 | /* set exception prefix high - to the prom */ | |
555 | _nmask_and_or_msr(0, MSR_IP); | |
556 | ||
557 | utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */ | |
558 | ||
559 | while (1) ; | |
560 | /* not reached */ | |
561 | } | |
562 | ||
f495a8bf | 563 | static int |
1da177e4 LT |
564 | prep_show_percpuinfo(struct seq_file *m, int i) |
565 | { | |
566 | /* PREP's without residual data will give incorrect values here */ | |
567 | seq_printf(m, "clock\t\t: "); | |
568 | if (have_residual_data) | |
569 | seq_printf(m, "%ldMHz\n", | |
570 | (res->VitalProductData.ProcessorHz > 1024) ? | |
571 | res->VitalProductData.ProcessorHz / 1000000 : | |
572 | res->VitalProductData.ProcessorHz); | |
573 | else | |
574 | seq_printf(m, "???\n"); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | ||
579 | #ifdef CONFIG_SOUND_CS4232 | |
580 | static long __init masktoint(unsigned int i) | |
581 | { | |
582 | int t = -1; | |
583 | while (i >> ++t) | |
584 | ; | |
585 | return (t-1); | |
586 | } | |
587 | ||
588 | /* | |
589 | * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h | |
590 | * to distinguish sound dma-channels from others. This is because | |
591 | * blocksize on 16 bit dma-channels 5,6,7 is 128k, but | |
592 | * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3 | |
593 | */ | |
594 | ||
595 | static void __init prep_init_sound(void) | |
596 | { | |
597 | PPC_DEVICE *audiodevice = NULL; | |
598 | ||
599 | /* | |
600 | * Get the needed resource informations from residual data. | |
601 | * | |
602 | */ | |
603 | if (have_residual_data) | |
604 | audiodevice = residual_find_device(~0, NULL, | |
605 | MultimediaController, AudioController, -1, 0); | |
606 | ||
607 | if (audiodevice != NULL) { | |
608 | PnP_TAG_PACKET *pkt; | |
609 | ||
610 | pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset], | |
611 | S5_Packet, 0); | |
612 | if (pkt != NULL) | |
613 | ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask); | |
614 | pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset], | |
615 | S5_Packet, 1); | |
616 | if (pkt != NULL) | |
617 | ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask); | |
618 | } | |
619 | ||
620 | /* | |
621 | * These are the PReP specs' defaults for the cs4231. We use these | |
622 | * as fallback incase we don't have residual data. | |
623 | * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7 | |
624 | * will use the other values. | |
625 | */ | |
626 | if (audiodevice == NULL) { | |
627 | switch (_prep_type) { | |
628 | case _PREP_IBM: | |
629 | ppc_cs4232_dma = 1; | |
630 | ppc_cs4232_dma2 = -1; | |
631 | break; | |
632 | default: | |
633 | ppc_cs4232_dma = 6; | |
634 | ppc_cs4232_dma2 = 7; | |
635 | } | |
636 | } | |
637 | ||
638 | /* | |
639 | * Find a way to push these informations to the cs4232 driver | |
640 | * Give it out with printk, when not in cmd_line? | |
641 | * Append it to cmd_line and saved_command_line? | |
642 | * Format is cs4232=io,irq,dma,dma2 | |
643 | */ | |
644 | } | |
645 | #endif /* CONFIG_SOUND_CS4232 */ | |
646 | ||
647 | /* | |
648 | * Fill out screen_info according to the residual data. This allows us to use | |
649 | * at least vesafb. | |
650 | */ | |
651 | static void __init | |
652 | prep_init_vesa(void) | |
653 | { | |
654 | #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \ | |
655 | defined(CONFIG_FB_VESA)) | |
656 | PPC_DEVICE *vgadev = NULL; | |
657 | ||
658 | if (have_residual_data) | |
659 | vgadev = residual_find_device(~0, NULL, DisplayController, | |
660 | SVGAController, -1, 0); | |
661 | ||
662 | if (vgadev != NULL) { | |
663 | PnP_TAG_PACKET *pkt; | |
664 | ||
665 | pkt = PnP_find_large_vendor_packet( | |
666 | (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset], | |
667 | 0x04, 0); /* 0x04 = Display Tag */ | |
668 | if (pkt != NULL) { | |
669 | unsigned char *ptr = (unsigned char *)pkt; | |
670 | ||
671 | if (ptr[4]) { | |
672 | /* graphics mode */ | |
673 | screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB; | |
674 | ||
675 | screen_info.lfb_depth = ptr[4] * 8; | |
676 | ||
677 | screen_info.lfb_width = swab16(*(short *)(ptr+6)); | |
678 | screen_info.lfb_height = swab16(*(short *)(ptr+8)); | |
679 | screen_info.lfb_linelength = swab16(*(short *)(ptr+10)); | |
680 | ||
681 | screen_info.lfb_base = swab32(*(long *)(ptr+12)); | |
682 | screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536; | |
683 | } | |
684 | } | |
685 | } | |
686 | #endif | |
687 | } | |
688 | ||
689 | /* | |
690 | * Set DBAT 2 to access 0x80000000 so early progress messages will work | |
691 | */ | |
692 | static __inline__ void | |
693 | prep_set_bat(void) | |
694 | { | |
695 | /* wait for all outstanding memory access to complete */ | |
696 | mb(); | |
697 | ||
698 | /* setup DBATs */ | |
699 | mtspr(SPRN_DBAT2U, 0x80001ffe); | |
700 | mtspr(SPRN_DBAT2L, 0x8000002a); | |
701 | ||
702 | /* wait for updates */ | |
703 | mb(); | |
704 | } | |
705 | ||
706 | /* | |
707 | * IBM 3-digit status LED | |
708 | */ | |
f495a8bf | 709 | static unsigned int ibm_statusled_base; |
1da177e4 | 710 | |
f495a8bf | 711 | static void |
1da177e4 LT |
712 | ibm_statusled_progress(char *s, unsigned short hex); |
713 | ||
f495a8bf | 714 | static int |
1da177e4 LT |
715 | ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, |
716 | void * dummy3) | |
717 | { | |
718 | ibm_statusled_progress(NULL, 0x505); /* SOS */ | |
719 | return NOTIFY_DONE; | |
720 | } | |
721 | ||
f495a8bf | 722 | static struct notifier_block ibm_statusled_block = { |
1da177e4 LT |
723 | ibm_statusled_panic, |
724 | NULL, | |
725 | INT_MAX /* try to do it first */ | |
726 | }; | |
727 | ||
f495a8bf | 728 | static void |
1da177e4 LT |
729 | ibm_statusled_progress(char *s, unsigned short hex) |
730 | { | |
731 | static int notifier_installed; | |
732 | /* | |
733 | * Progress uses 4 digits and we have only 3. So, we map 0xffff to | |
734 | * 0xfff for display switch off. Out of range values are mapped to | |
735 | * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes. | |
736 | * Install the panic notifier when the display is first switched off. | |
737 | */ | |
738 | if (hex == 0xffff) { | |
739 | hex = 0xfff; | |
740 | if (!notifier_installed) { | |
741 | ++notifier_installed; | |
742 | notifier_chain_register(&panic_notifier_list, | |
743 | &ibm_statusled_block); | |
744 | } | |
745 | } | |
746 | else | |
747 | if (hex > 0xfff) | |
748 | hex = 0xeff; | |
749 | ||
750 | mb(); | |
751 | outw(hex, ibm_statusled_base); | |
752 | } | |
753 | ||
754 | static void __init | |
755 | ibm_statusled_init(void) | |
756 | { | |
757 | /* | |
758 | * The IBM 3-digit LED display is specified in the residual data | |
759 | * as an operator panel device, type "System Status LED". Find | |
760 | * that device and determine its address. We validate all the | |
761 | * other parameters on the off-chance another, similar device | |
762 | * exists. | |
763 | */ | |
764 | if (have_residual_data) { | |
765 | PPC_DEVICE *led; | |
766 | PnP_TAG_PACKET *pkt; | |
767 | ||
768 | led = residual_find_device(~0, NULL, SystemPeripheral, | |
769 | OperatorPanel, SystemStatusLED, 0); | |
770 | if (!led) | |
771 | return; | |
772 | ||
773 | pkt = PnP_find_packet((unsigned char *) | |
774 | &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0); | |
775 | if (!pkt) | |
776 | return; | |
777 | ||
778 | if (pkt->S8_Pack.IOInfo != ISAAddr16bit) | |
779 | return; | |
780 | if (*(unsigned short *)pkt->S8_Pack.RangeMin != | |
781 | *(unsigned short *)pkt->S8_Pack.RangeMax) | |
782 | return; | |
783 | if (pkt->S8_Pack.IOAlign != 2) | |
784 | return; | |
785 | if (pkt->S8_Pack.IONum != 2) | |
786 | return; | |
787 | ||
788 | ibm_statusled_base = ld_le16((unsigned short *) | |
789 | (pkt->S8_Pack.RangeMin)); | |
790 | ppc_md.progress = ibm_statusled_progress; | |
791 | } | |
792 | } | |
793 | ||
794 | static void __init | |
795 | prep_setup_arch(void) | |
796 | { | |
797 | unsigned char reg; | |
798 | int is_ide=0; | |
799 | ||
800 | /* init to some ~sane value until calibrate_delay() runs */ | |
801 | loops_per_jiffy = 50000000; | |
802 | ||
803 | /* Lookup PCI host bridges */ | |
804 | prep_find_bridges(); | |
805 | ||
806 | /* Set up floppy in PS/2 mode */ | |
807 | outb(0x09, SIO_CONFIG_RA); | |
808 | reg = inb(SIO_CONFIG_RD); | |
809 | reg = (reg & 0x3F) | 0x40; | |
810 | outb(reg, SIO_CONFIG_RD); | |
811 | outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */ | |
812 | ||
813 | switch ( _prep_type ) | |
814 | { | |
815 | case _PREP_IBM: | |
816 | reg = inb(PREP_IBM_PLANAR); | |
817 | printk(KERN_INFO "IBM planar ID: %02x", reg); | |
818 | switch (reg) { | |
819 | case PREP_IBM_SANDALFOOT: | |
820 | prep_gen_enable_l2(); | |
821 | setup_ibm_pci = prep_sandalfoot_setup_pci; | |
822 | ppc_md.power_off = prep_sig750_poweroff; | |
823 | ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo; | |
824 | break; | |
825 | case PREP_IBM_THINKPAD: | |
826 | prep_gen_enable_l2(); | |
827 | setup_ibm_pci = prep_thinkpad_setup_pci; | |
828 | ppc_md.power_off = prep_carrera_poweroff; | |
829 | ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo; | |
830 | break; | |
831 | default: | |
832 | if (have_residual_data) { | |
833 | prep_gen_enable_l2(); | |
834 | setup_ibm_pci = prep_residual_setup_pci; | |
835 | ppc_md.power_off = prep_halt; | |
836 | ppc_md.show_cpuinfo = prep_gen_cpuinfo; | |
837 | break; | |
838 | } | |
839 | else | |
840 | printk(" - unknown! Assuming Carolina"); | |
841 | /* fall through */ | |
842 | case PREP_IBM_CAROLINA_IDE_0: | |
843 | case PREP_IBM_CAROLINA_IDE_1: | |
844 | case PREP_IBM_CAROLINA_IDE_2: | |
845 | case PREP_IBM_CAROLINA_IDE_3: | |
846 | is_ide = 1; | |
847 | case PREP_IBM_CAROLINA_SCSI_0: | |
848 | case PREP_IBM_CAROLINA_SCSI_1: | |
849 | case PREP_IBM_CAROLINA_SCSI_2: | |
850 | case PREP_IBM_CAROLINA_SCSI_3: | |
851 | prep_carolina_enable_l2(); | |
852 | setup_ibm_pci = prep_carolina_setup_pci; | |
853 | ppc_md.power_off = prep_sig750_poweroff; | |
854 | ppc_md.show_cpuinfo = prep_carolina_cpuinfo; | |
855 | break; | |
856 | case PREP_IBM_TIGER1_133: | |
857 | case PREP_IBM_TIGER1_166: | |
858 | case PREP_IBM_TIGER1_180: | |
859 | case PREP_IBM_TIGER1_xxx: | |
860 | case PREP_IBM_TIGER1_333: | |
861 | prep_carolina_enable_l2(); | |
862 | setup_ibm_pci = prep_tiger1_setup_pci; | |
863 | ppc_md.power_off = prep_sig750_poweroff; | |
864 | ppc_md.show_cpuinfo = prep_tiger1_cpuinfo; | |
865 | break; | |
866 | } | |
867 | printk("\n"); | |
868 | ||
869 | /* default root device */ | |
870 | if (is_ide) | |
871 | ROOT_DEV = MKDEV(IDE0_MAJOR, 3); | |
872 | else | |
873 | ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3); | |
874 | ||
875 | break; | |
876 | case _PREP_Motorola: | |
877 | prep_gen_enable_l2(); | |
878 | ppc_md.power_off = prep_halt; | |
879 | ppc_md.show_cpuinfo = prep_mot_cpuinfo; | |
880 | ||
881 | #ifdef CONFIG_BLK_DEV_INITRD | |
882 | if (initrd_start) | |
883 | ROOT_DEV = Root_RAM0; | |
884 | else | |
885 | #endif | |
886 | #ifdef CONFIG_ROOT_NFS | |
887 | ROOT_DEV = Root_NFS; | |
888 | #else | |
889 | ROOT_DEV = Root_SDA2; | |
890 | #endif | |
891 | break; | |
892 | } | |
893 | ||
894 | /* Read in NVRAM data */ | |
895 | init_prep_nvram(); | |
896 | ||
897 | /* if no bootargs, look in NVRAM */ | |
898 | if ( cmd_line[0] == '\0' ) { | |
899 | char *bootargs; | |
900 | bootargs = prep_nvram_get_var("bootargs"); | |
901 | if (bootargs != NULL) { | |
902 | strcpy(cmd_line, bootargs); | |
903 | /* again.. */ | |
904 | strcpy(saved_command_line, cmd_line); | |
905 | } | |
906 | } | |
907 | ||
908 | #ifdef CONFIG_SOUND_CS4232 | |
909 | prep_init_sound(); | |
910 | #endif /* CONFIG_SOUND_CS4232 */ | |
911 | ||
912 | prep_init_vesa(); | |
913 | ||
914 | switch (_prep_type) { | |
915 | case _PREP_Motorola: | |
916 | raven_init(); | |
917 | break; | |
918 | case _PREP_IBM: | |
919 | ibm_prep_init(); | |
920 | break; | |
921 | } | |
922 | ||
923 | #ifdef CONFIG_VGA_CONSOLE | |
924 | /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */ | |
925 | vgacon_remap_base = 0xf0000000; | |
926 | conswitchp = &vga_con; | |
927 | #endif | |
928 | } | |
929 | ||
930 | /* | |
931 | * First, see if we can get this information from the residual data. | |
932 | * This is important on some IBM PReP systems. If we cannot, we let the | |
933 | * TODC code handle doing this. | |
934 | */ | |
935 | static void __init | |
936 | prep_calibrate_decr(void) | |
937 | { | |
938 | if (have_residual_data) { | |
939 | unsigned long freq, divisor = 4; | |
940 | ||
941 | if ( res->VitalProductData.ProcessorBusHz ) { | |
942 | freq = res->VitalProductData.ProcessorBusHz; | |
943 | printk("time_init: decrementer frequency = %lu.%.6lu MHz\n", | |
944 | (freq/divisor)/1000000, | |
945 | (freq/divisor)%1000000); | |
946 | tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000); | |
947 | tb_ticks_per_jiffy = freq / HZ / divisor; | |
948 | } | |
949 | } | |
950 | else | |
951 | todc_calibrate_decr(); | |
952 | } | |
953 | ||
1da177e4 LT |
954 | static void __init |
955 | prep_init_IRQ(void) | |
956 | { | |
957 | int i; | |
958 | unsigned int pci_viddid, pci_did; | |
959 | ||
960 | if (OpenPIC_Addr != NULL) { | |
961 | openpic_init(NUM_8259_INTERRUPTS); | |
962 | /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */ | |
963 | openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", | |
964 | i8259_irq); | |
965 | } | |
1da177e4 LT |
966 | |
967 | if (have_residual_data) { | |
f9bd170a | 968 | i8259_init(residual_isapic_addr(), 0); |
1da177e4 LT |
969 | return; |
970 | } | |
971 | ||
972 | /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory | |
973 | * controller, we poll (as they have a different int-ack address). */ | |
974 | early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid); | |
975 | pci_did = (pci_viddid & 0xffff0000) >> 16; | |
976 | if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA) | |
977 | && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN) | |
978 | || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK))) | |
f9bd170a | 979 | i8259_init(0, 0); |
1da177e4 LT |
980 | else |
981 | /* PCI interrupt ack address given in section 6.1.8 of the | |
982 | * PReP specification. */ | |
f9bd170a | 983 | i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0); |
1da177e4 LT |
984 | } |
985 | ||
986 | #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) | |
987 | /* | |
988 | * IDE stuff. | |
989 | */ | |
f495a8bf | 990 | static int |
1da177e4 LT |
991 | prep_ide_default_irq(unsigned long base) |
992 | { | |
993 | switch (base) { | |
994 | case 0x1f0: return 13; | |
995 | case 0x170: return 13; | |
996 | case 0x1e8: return 11; | |
997 | case 0x168: return 10; | |
998 | case 0xfff0: return 14; /* MCP(N)750 ide0 */ | |
999 | case 0xffe0: return 15; /* MCP(N)750 ide1 */ | |
1000 | default: return 0; | |
1001 | } | |
1002 | } | |
1003 | ||
f495a8bf | 1004 | static unsigned long |
1da177e4 LT |
1005 | prep_ide_default_io_base(int index) |
1006 | { | |
1007 | switch (index) { | |
1008 | case 0: return 0x1f0; | |
1009 | case 1: return 0x170; | |
1010 | case 2: return 0x1e8; | |
1011 | case 3: return 0x168; | |
1012 | default: | |
1013 | return 0; | |
1014 | } | |
1015 | } | |
1016 | #endif | |
1017 | ||
1018 | #ifdef CONFIG_SMP | |
1019 | /* PReP (MTX) support */ | |
1020 | static int __init | |
1021 | smp_prep_probe(void) | |
1022 | { | |
1023 | extern int mot_multi; | |
1024 | ||
1025 | if (mot_multi) { | |
1026 | openpic_request_IPIs(); | |
1027 | smp_hw_index[1] = 1; | |
1028 | return 2; | |
1029 | } | |
1030 | ||
1031 | return 1; | |
1032 | } | |
1033 | ||
1034 | static void __init | |
1035 | smp_prep_kick_cpu(int nr) | |
1036 | { | |
1037 | *(unsigned long *)KERNELBASE = nr; | |
1038 | asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory"); | |
1039 | printk("CPU1 released, waiting\n"); | |
1040 | } | |
1041 | ||
1042 | static void __init | |
1043 | smp_prep_setup_cpu(int cpu_nr) | |
1044 | { | |
1045 | if (OpenPIC_Addr) | |
1046 | do_openpic_setup_cpu(); | |
1047 | } | |
1048 | ||
f495a8bf | 1049 | static struct smp_ops_t prep_smp_ops = { |
1da177e4 LT |
1050 | smp_openpic_message_pass, |
1051 | smp_prep_probe, | |
1052 | smp_prep_kick_cpu, | |
1053 | smp_prep_setup_cpu, | |
1054 | .give_timebase = smp_generic_give_timebase, | |
1055 | .take_timebase = smp_generic_take_timebase, | |
1056 | }; | |
1057 | #endif /* CONFIG_SMP */ | |
1058 | ||
1059 | /* | |
1060 | * Setup the bat mappings we're going to load that cover | |
1061 | * the io areas. RAM was mapped by mapin_ram(). | |
1062 | * -- Cort | |
1063 | */ | |
1064 | static void __init | |
1065 | prep_map_io(void) | |
1066 | { | |
1067 | io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO); | |
1068 | io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO); | |
1069 | } | |
1070 | ||
1071 | static int __init | |
1072 | prep_request_io(void) | |
1073 | { | |
1074 | if (_machine == _MACH_prep) { | |
1075 | #ifdef CONFIG_NVRAM | |
1076 | request_region(PREP_NVRAM_AS0, 0x8, "nvram"); | |
1077 | #endif | |
1078 | request_region(0x00,0x20,"dma1"); | |
1079 | request_region(0x40,0x20,"timer"); | |
1080 | request_region(0x80,0x10,"dma page reg"); | |
1081 | request_region(0xc0,0x20,"dma2"); | |
1082 | } | |
1083 | ||
1084 | return 0; | |
1085 | } | |
1086 | ||
1087 | device_initcall(prep_request_io); | |
1088 | ||
1089 | void __init | |
1090 | prep_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
1091 | unsigned long r6, unsigned long r7) | |
1092 | { | |
1093 | #ifdef CONFIG_PREP_RESIDUAL | |
1094 | /* make a copy of residual data */ | |
1095 | if ( r3 ) { | |
1096 | memcpy((void *)res,(void *)(r3+KERNELBASE), | |
1097 | sizeof(RESIDUAL)); | |
1098 | } | |
1099 | #endif | |
1100 | ||
1101 | isa_io_base = PREP_ISA_IO_BASE; | |
1102 | isa_mem_base = PREP_ISA_MEM_BASE; | |
1103 | pci_dram_offset = PREP_PCI_DRAM_OFFSET; | |
1104 | ISA_DMA_THRESHOLD = 0x00ffffff; | |
1105 | DMA_MODE_READ = 0x44; | |
1106 | DMA_MODE_WRITE = 0x48; | |
35d81a4b | 1107 | ppc_do_canonicalize_irqs = 1; |
1da177e4 LT |
1108 | |
1109 | /* figure out what kind of prep workstation we are */ | |
1110 | if (have_residual_data) { | |
1111 | if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) ) | |
1112 | _prep_type = _PREP_IBM; | |
1113 | else | |
1114 | _prep_type = _PREP_Motorola; | |
1115 | } | |
1116 | else { | |
1117 | /* assume motorola if no residual (netboot?) */ | |
1118 | _prep_type = _PREP_Motorola; | |
1119 | } | |
1120 | ||
1121 | #ifdef CONFIG_PREP_RESIDUAL | |
1122 | /* Switch off all residual data processing if the user requests it */ | |
1123 | if (strstr(cmd_line, "noresidual") != NULL) | |
1124 | res = NULL; | |
1125 | #endif | |
1126 | ||
1127 | /* Initialise progress early to get maximum benefit */ | |
1128 | prep_set_bat(); | |
1129 | ibm_statusled_init(); | |
1130 | ||
1131 | ppc_md.setup_arch = prep_setup_arch; | |
1132 | ppc_md.show_percpuinfo = prep_show_percpuinfo; | |
1133 | ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */ | |
1da177e4 LT |
1134 | ppc_md.init_IRQ = prep_init_IRQ; |
1135 | /* this gets changed later on if we have an OpenPIC -- Cort */ | |
1136 | ppc_md.get_irq = i8259_irq; | |
1137 | ||
1138 | ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot; | |
1139 | ||
1140 | ppc_md.restart = prep_restart; | |
1141 | ppc_md.power_off = NULL; /* set in prep_setup_arch() */ | |
1142 | ppc_md.halt = prep_halt; | |
1143 | ||
1144 | ppc_md.nvram_read_val = prep_nvram_read_val; | |
1145 | ppc_md.nvram_write_val = prep_nvram_write_val; | |
1146 | ||
1147 | ppc_md.time_init = todc_time_init; | |
1148 | if (_prep_type == _PREP_IBM) { | |
1149 | ppc_md.rtc_read_val = todc_mc146818_read_val; | |
1150 | ppc_md.rtc_write_val = todc_mc146818_write_val; | |
1151 | TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1), | |
1152 | 8); | |
1153 | } else { | |
1154 | TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1, | |
1155 | PREP_NVRAM_DATA, 8); | |
1156 | } | |
1157 | ||
1158 | ppc_md.calibrate_decr = prep_calibrate_decr; | |
1159 | ppc_md.set_rtc_time = todc_set_rtc_time; | |
1160 | ppc_md.get_rtc_time = todc_get_rtc_time; | |
1161 | ||
1162 | ppc_md.setup_io_mappings = prep_map_io; | |
1163 | ||
1164 | #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) | |
1165 | ppc_ide_md.default_irq = prep_ide_default_irq; | |
1166 | ppc_ide_md.default_io_base = prep_ide_default_io_base; | |
1167 | #endif | |
1168 | ||
1169 | #ifdef CONFIG_SMP | |
7ed476d1 | 1170 | smp_ops = &prep_smp_ops; |
1da177e4 LT |
1171 | #endif /* CONFIG_SMP */ |
1172 | } |