[deliverable/linux.git] / arch / s390 / include / asm / lowcore.h

/*
 *  include/asm-s390/lowcore.h
 *
 *  S390 version
 *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
 *    Author(s): Hartmut Penner (hp@de.ibm.com),
 *               Martin Schwidefsky (schwidefsky@de.ibm.com),
 *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
 */

#ifndef _ASM_S390_LOWCORE_H
#define _ASM_S390_LOWCORE_H

#define __LC_IPL_PARMBLOCK_PTR		0x0014
#define __LC_EXT_PARAMS			0x0080
#define __LC_CPU_ADDRESS		0x0084
#define __LC_EXT_INT_CODE		0x0086

#define __LC_SVC_ILC			0x0088
#define __LC_SVC_INT_CODE		0x008a
#define __LC_PGM_ILC			0x008c
#define __LC_PGM_INT_CODE		0x008e

#define __LC_PER_ATMID			0x0096
#define __LC_PER_ADDRESS		0x0098
#define __LC_PER_ACCESS_ID		0x00a1
#define __LC_AR_MODE_ID			0x00a3

#define __LC_SUBCHANNEL_ID		0x00b8
#define __LC_SUBCHANNEL_NR		0x00ba
#define __LC_IO_INT_PARM		0x00bc
#define __LC_IO_INT_WORD		0x00c0
#define __LC_STFL_FAC_LIST		0x00c8
#define __LC_MCCK_CODE			0x00e8

#define __LC_DUMP_REIPL			0x0e00

#ifndef __s390x__
#define __LC_EXT_OLD_PSW		0x0018
#define __LC_SVC_OLD_PSW		0x0020
#define __LC_PGM_OLD_PSW		0x0028
#define __LC_MCK_OLD_PSW		0x0030
#define __LC_IO_OLD_PSW			0x0038
#define __LC_EXT_NEW_PSW		0x0058
#define __LC_SVC_NEW_PSW		0x0060
#define __LC_PGM_NEW_PSW		0x0068
#define __LC_MCK_NEW_PSW		0x0070
#define __LC_IO_NEW_PSW			0x0078
#define __LC_SAVE_AREA			0x0200
#define __LC_RETURN_PSW			0x0240
#define __LC_RETURN_MCCK_PSW		0x0248
#define __LC_SYNC_ENTER_TIMER		0x0250
#define __LC_ASYNC_ENTER_TIMER		0x0258
#define __LC_EXIT_TIMER			0x0260
#define __LC_USER_TIMER			0x0268
#define __LC_SYSTEM_TIMER		0x0270
#define __LC_STEAL_TIMER		0x0278
#define __LC_LAST_UPDATE_TIMER		0x0280
#define __LC_LAST_UPDATE_CLOCK		0x0288
#define __LC_CURRENT			0x0290
#define __LC_THREAD_INFO		0x0294
#define __LC_KERNEL_STACK		0x0298
#define __LC_ASYNC_STACK		0x029c
#define __LC_PANIC_STACK		0x02a0
#define __LC_KERNEL_ASCE		0x02a4
#define __LC_USER_ASCE			0x02a8
#define __LC_USER_EXEC_ASCE		0x02ac
#define __LC_CPUID			0x02b0
#define __LC_INT_CLOCK			0x02c8
#define __LC_MACHINE_FLAGS		0x02d8
#define __LC_FTRACE_FUNC		0x02dc
#define __LC_IRB			0x0300
#define __LC_PFAULT_INTPARM		0x0080
#define __LC_CPU_TIMER_SAVE_AREA	0x00d8
#define __LC_CLOCK_COMP_SAVE_AREA	0x00e0
#define __LC_PSW_SAVE_AREA		0x0100
#define __LC_PREFIX_SAVE_AREA		0x0108
#define __LC_AREGS_SAVE_AREA		0x0120
#define __LC_FPREGS_SAVE_AREA		0x0160
#define __LC_GPREGS_SAVE_AREA		0x0180
#define __LC_CREGS_SAVE_AREA		0x01c0
#else /* __s390x__ */
#define __LC_LAST_BREAK			0x0110
#define __LC_EXT_OLD_PSW		0x0130
#define __LC_SVC_OLD_PSW		0x0140
#define __LC_PGM_OLD_PSW		0x0150
#define __LC_MCK_OLD_PSW		0x0160
#define __LC_IO_OLD_PSW			0x0170
#define __LC_EXT_NEW_PSW		0x01b0
#define __LC_SVC_NEW_PSW		0x01c0
#define __LC_PGM_NEW_PSW		0x01d0
#define __LC_MCK_NEW_PSW		0x01e0
#define __LC_IO_NEW_PSW			0x01f0
#define __LC_SAVE_AREA			0x0200
#define __LC_RETURN_PSW			0x0280
#define __LC_RETURN_MCCK_PSW		0x0290
#define __LC_SYNC_ENTER_TIMER		0x02a0
#define __LC_ASYNC_ENTER_TIMER		0x02a8
#define __LC_EXIT_TIMER			0x02b0
#define __LC_USER_TIMER			0x02b8
#define __LC_SYSTEM_TIMER		0x02c0
#define __LC_STEAL_TIMER		0x02c8
#define __LC_LAST_UPDATE_TIMER		0x02d0
#define __LC_LAST_UPDATE_CLOCK		0x02d8
#define __LC_CURRENT			0x02e0
#define __LC_THREAD_INFO		0x02e8
#define __LC_KERNEL_STACK		0x02f0
#define __LC_ASYNC_STACK		0x02f8
#define __LC_PANIC_STACK		0x0300
#define __LC_KERNEL_ASCE		0x0308
#define __LC_USER_ASCE			0x0310
#define __LC_USER_EXEC_ASCE		0x0318
#define __LC_CPUID			0x0320
#define __LC_INT_CLOCK			0x0340
#define __LC_VDSO_PER_CPU		0x0350
#define __LC_MACHINE_FLAGS		0x0358
#define __LC_FTRACE_FUNC		0x0360
#define __LC_IRB			0x0380
#define __LC_PASTE			0x03c0
#define __LC_PFAULT_INTPARM		0x11b8
#define __LC_FPREGS_SAVE_AREA		0x1200
#define __LC_GPREGS_SAVE_AREA		0x1280
#define __LC_PSW_SAVE_AREA		0x1300
#define __LC_PREFIX_SAVE_AREA		0x1318
#define __LC_FP_CREG_SAVE_AREA		0x131c
#define __LC_TODREG_SAVE_AREA		0x1324
#define __LC_CPU_TIMER_SAVE_AREA	0x1328
#define __LC_CLOCK_COMP_SAVE_AREA	0x1331
#define __LC_AREGS_SAVE_AREA		0x1340
#define __LC_CREGS_SAVE_AREA		0x1380
#endif /* __s390x__ */

#ifndef __ASSEMBLY__

#include <asm/cpuid.h>
#include <asm/ptrace.h>
#include <linux/types.h>

void restart_int_handler(void);
void ext_int_handler(void);
void system_call(void);
void pgm_check_handler(void);
void mcck_int_handler(void);
void io_int_handler(void);

struct save_area_s390 {
	u32	ext_save;
	u64	timer;
	u64	clk_cmp;
	u8	pad1[24];
	u8	psw[8];
	u32	pref_reg;
	u8	pad2[20];
	u32	acc_regs[16];
	u64	fp_regs[4];
	u32	gp_regs[16];
	u32	ctrl_regs[16];
}  __attribute__((packed));

struct save_area_s390x {
	u64	fp_regs[16];
	u64	gp_regs[16];
	u8	psw[16];
	u8	pad1[8];
	u32	pref_reg;
	u32	fp_ctrl_reg;
	u8	pad2[4];
	u32	tod_reg;
	u64	timer;
	u64	clk_cmp;
	u8	pad3[8];
	u32	acc_regs[16];
	u64	ctrl_regs[16];
}  __attribute__((packed));

union save_area {
	struct save_area_s390	s390;
	struct save_area_s390x	s390x;
};

#define SAVE_AREA_BASE_S390	0xd4
#define SAVE_AREA_BASE_S390X	0x1200

#ifndef __s390x__
#define SAVE_AREA_SIZE sizeof(struct save_area_s390)
#define SAVE_AREA_BASE SAVE_AREA_BASE_S390
#else
#define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
#define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
#endif

struct _lowcore
{
#ifndef __s390x__
	/* 0x0000 - 0x01ff: defined by architecture */
	psw_t	restart_psw;			/* 0x0000 */
	__u32	ccw2[4];			/* 0x0008 */
	psw_t	external_old_psw;		/* 0x0018 */
	psw_t	svc_old_psw;			/* 0x0020 */
	psw_t	program_old_psw;		/* 0x0028 */
	psw_t	mcck_old_psw;			/* 0x0030 */
	psw_t	io_old_psw;			/* 0x0038 */
	__u8	pad_0x0040[0x0058-0x0040];	/* 0x0040 */
	psw_t	external_new_psw;		/* 0x0058 */
	psw_t	svc_new_psw;			/* 0x0060 */
	psw_t	program_new_psw;		/* 0x0068 */
	psw_t	mcck_new_psw;			/* 0x0070 */
	psw_t	io_new_psw;			/* 0x0078 */
	__u32	ext_params;			/* 0x0080 */
	__u16	cpu_addr;			/* 0x0084 */
	__u16	ext_int_code;			/* 0x0086 */
	__u16	svc_ilc;			/* 0x0088 */
	__u16	svc_code;			/* 0x008a */
	__u16	pgm_ilc;			/* 0x008c */
	__u16	pgm_code;			/* 0x008e */
	__u32	trans_exc_code;			/* 0x0090 */
	__u16	mon_class_num;			/* 0x0094 */
	__u16	per_perc_atmid;			/* 0x0096 */
	__u32	per_address;			/* 0x0098 */
	__u32	monitor_code;			/* 0x009c */
	__u8	exc_access_id;			/* 0x00a0 */
	__u8	per_access_id;			/* 0x00a1 */
	__u8	pad_0x00a2[0x00b8-0x00a2];	/* 0x00a2 */
	__u16	subchannel_id;			/* 0x00b8 */
	__u16	subchannel_nr;			/* 0x00ba */
	__u32	io_int_parm;			/* 0x00bc */
	__u32	io_int_word;			/* 0x00c0 */
	__u8	pad_0x00c4[0x00c8-0x00c4];	/* 0x00c4 */
	__u32	stfl_fac_list;			/* 0x00c8 */
	__u8	pad_0x00cc[0x00d4-0x00cc];	/* 0x00cc */
	__u32	extended_save_area_addr;	/* 0x00d4 */
	__u32	cpu_timer_save_area[2];		/* 0x00d8 */
	__u32	clock_comp_save_area[2];	/* 0x00e0 */
	__u32	mcck_interruption_code[2];	/* 0x00e8 */
	__u8	pad_0x00f0[0x00f4-0x00f0];	/* 0x00f0 */
	__u32	external_damage_code;		/* 0x00f4 */
	__u32	failing_storage_address;	/* 0x00f8 */
	__u8	pad_0x00fc[0x0100-0x00fc];	/* 0x00fc */
	__u32	st_status_fixed_logout[4];	/* 0x0100 */
	__u8	pad_0x0110[0x0120-0x0110];	/* 0x0110 */

	/* CPU register save area: defined by architecture */
	__u32	access_regs_save_area[16];	/* 0x0120 */
	__u32	floating_pt_save_area[8];	/* 0x0160 */
	__u32	gpregs_save_area[16];		/* 0x0180 */
	__u32	cregs_save_area[16];		/* 0x01c0 */

	/* Return psws. */
	__u32	save_area[16];			/* 0x0200 */
	psw_t	return_psw;			/* 0x0240 */
	psw_t	return_mcck_psw;		/* 0x0248 */

	/* CPU time accounting values */
	__u64	sync_enter_timer;		/* 0x0250 */
	__u64	async_enter_timer;		/* 0x0258 */
	__u64	exit_timer;			/* 0x0260 */
	__u64	user_timer;			/* 0x0268 */
	__u64	system_timer;			/* 0x0270 */
	__u64	steal_timer;			/* 0x0278 */
	__u64	last_update_timer;		/* 0x0280 */
	__u64	last_update_clock;		/* 0x0288 */

	/* Current process. */
	__u32	current_task;			/* 0x0290 */
	__u32	thread_info;			/* 0x0294 */
	__u32	kernel_stack;			/* 0x0298 */

	/* Interrupt and panic stack. */
	__u32	async_stack;			/* 0x029c */
	__u32	panic_stack;			/* 0x02a0 */

	/* Address space pointer. */
	__u32	kernel_asce;			/* 0x02a4 */
	__u32	user_asce;			/* 0x02a8 */
	__u32	user_exec_asce;			/* 0x02ac */

	/* SMP info area */
	cpuid_t	cpu_id;				/* 0x02b0 */
	__u32	cpu_nr;				/* 0x02b8 */
	__u32	softirq_pending;		/* 0x02bc */
	__u32	percpu_offset;			/* 0x02c0 */
	__u32	ext_call_fast;			/* 0x02c4 */
	__u64	int_clock;			/* 0x02c8 */
	__u64	clock_comparator;		/* 0x02d0 */
	__u32	machine_flags;			/* 0x02d8 */
	__u32	ftrace_func;			/* 0x02dc */
	__u8	pad_0x02f0[0x0300-0x02f0];	/* 0x02f0 */

	/* Interrupt response block */
	__u8	irb[64];			/* 0x0300 */

	__u8	pad_0x0400[0x0e00-0x0400];	/* 0x0400 */

	/*
	 * 0xe00 contains the address of the IPL Parameter Information
	 * block. Dump tools need IPIB for IPL after dump.
	 * Note: do not change the position of any fields in 0x0e00-0x0f00
	 */
	__u32	ipib;				/* 0x0e00 */
	__u32	ipib_checksum;			/* 0x0e04 */

	/* Align to the top 1k of prefix area */
	__u8	pad_0x0e08[0x1000-0x0e08];	/* 0x0e08 */
#else /* !__s390x__ */
	/* 0x0000 - 0x01ff: defined by architecture */
	__u32	ccw1[2];			/* 0x0000 */
	__u32	ccw2[4];			/* 0x0008 */
	__u8	pad_0x0018[0x0080-0x0018];	/* 0x0018 */
	__u32	ext_params;			/* 0x0080 */
	__u16	cpu_addr;			/* 0x0084 */
	__u16	ext_int_code;			/* 0x0086 */
	__u16	svc_ilc;			/* 0x0088 */
	__u16	svc_code;			/* 0x008a */
	__u16	pgm_ilc;			/* 0x008c */
	__u16	pgm_code;			/* 0x008e */
	__u32	data_exc_code;			/* 0x0090 */
	__u16	mon_class_num;			/* 0x0094 */
	__u16	per_perc_atmid;			/* 0x0096 */
	addr_t	per_address;			/* 0x0098 */
	__u8	exc_access_id;			/* 0x00a0 */
	__u8	per_access_id;			/* 0x00a1 */
	__u8	op_access_id;			/* 0x00a2 */
	__u8	ar_access_id;			/* 0x00a3 */
	__u8	pad_0x00a4[0x00a8-0x00a4];	/* 0x00a4 */
	addr_t	trans_exc_code;			/* 0x00a8 */
	addr_t	monitor_code;			/* 0x00b0 */
	__u16	subchannel_id;			/* 0x00b8 */
	__u16	subchannel_nr;			/* 0x00ba */
	__u32	io_int_parm;			/* 0x00bc */
	__u32	io_int_word;			/* 0x00c0 */
	__u8	pad_0x00c4[0x00c8-0x00c4];	/* 0x00c4 */
	__u32	stfl_fac_list;			/* 0x00c8 */
	__u8	pad_0x00cc[0x00e8-0x00cc];	/* 0x00cc */
	__u32	mcck_interruption_code[2];	/* 0x00e8 */
	__u8	pad_0x00f0[0x00f4-0x00f0];	/* 0x00f0 */
	__u32	external_damage_code;		/* 0x00f4 */
	addr_t	failing_storage_address;	/* 0x00f8 */
	__u8	pad_0x0100[0x0120-0x0100];	/* 0x0100 */
	psw_t	restart_old_psw;		/* 0x0120 */
	psw_t	external_old_psw;		/* 0x0130 */
	psw_t	svc_old_psw;			/* 0x0140 */
	psw_t	program_old_psw;		/* 0x0150 */
	psw_t	mcck_old_psw;			/* 0x0160 */
	psw_t	io_old_psw;			/* 0x0170 */
	__u8	pad_0x0180[0x01a0-0x0180];	/* 0x0180 */
	psw_t	restart_psw;			/* 0x01a0 */
	psw_t	external_new_psw;		/* 0x01b0 */
	psw_t	svc_new_psw;			/* 0x01c0 */
	psw_t	program_new_psw;		/* 0x01d0 */
	psw_t	mcck_new_psw;			/* 0x01e0 */
	psw_t	io_new_psw;			/* 0x01f0 */

	/* Entry/exit save area & return psws. */
	__u64	save_area[16];			/* 0x0200 */
	psw_t	return_psw;			/* 0x0280 */
	psw_t	return_mcck_psw;		/* 0x0290 */

	/* CPU accounting and timing values. */
	__u64	sync_enter_timer;		/* 0x02a0 */
	__u64	async_enter_timer;		/* 0x02a8 */
	__u64	exit_timer;			/* 0x02b0 */
	__u64	user_timer;			/* 0x02b8 */
	__u64	system_timer;			/* 0x02c0 */
	__u64	steal_timer;			/* 0x02c8 */
	__u64	last_update_timer;		/* 0x02d0 */
	__u64	last_update_clock;		/* 0x02d8 */

	/* Current process. */
	__u64	current_task;			/* 0x02e0 */
	__u64	thread_info;			/* 0x02e8 */
	__u64	kernel_stack;			/* 0x02f0 */

	/* Interrupt and panic stack. */
	__u64	async_stack;			/* 0x02f8 */
	__u64	panic_stack;			/* 0x0300 */

	/* Address space pointer. */
	__u64	kernel_asce;			/* 0x0308 */
	__u64	user_asce;			/* 0x0310 */
	__u64	user_exec_asce;			/* 0x0318 */

	/* SMP info area */
	cpuid_t	cpu_id;				/* 0x0320 */
	__u32	cpu_nr;				/* 0x0328 */
	__u32	softirq_pending;		/* 0x032c */
	__u64	percpu_offset;			/* 0x0330 */
	__u64	ext_call_fast;			/* 0x0338 */
	__u64	int_clock;			/* 0x0340 */
	__u64	clock_comparator;		/* 0x0348 */
	__u64	vdso_per_cpu_data;		/* 0x0350 */
	__u64	machine_flags;			/* 0x0358 */
	__u64	ftrace_func;			/* 0x0360 */
	__u8	pad_0x0368[0x0380-0x0368];	/* 0x0368 */

	/* Interrupt response block. */
	__u8	irb[64];			/* 0x0380 */

	/* Per cpu primary space access list */
	__u32	paste[16];			/* 0x03c0 */

	__u8	pad_0x0400[0x0e00-0x0400];	/* 0x0400 */

	/*
	 * 0xe00 contains the address of the IPL Parameter Information
	 * block. Dump tools need IPIB for IPL after dump.
	 * Note: do not change the position of any fields in 0x0e00-0x0f00
	 */
	__u64	ipib;				/* 0x0e00 */
	__u32	ipib_checksum;			/* 0x0e08 */
	__u8	pad_0x0e0c[0x11b8-0x0e0c];	/* 0x0e0c */

	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
	__u64	ext_params2;			/* 0x11B8 */
	__u8	pad_0x11c0[0x1200-0x11C0];	/* 0x11C0 */

	/* CPU register save area: defined by architecture */
	__u64	floating_pt_save_area[16];	/* 0x1200 */
	__u64	gpregs_save_area[16];		/* 0x1280 */
	__u32	st_status_fixed_logout[4];	/* 0x1300 */
	__u8	pad_0x1310[0x1318-0x1310];	/* 0x1310 */
	__u32	prefixreg_save_area;		/* 0x1318 */
	__u32	fpt_creg_save_area;		/* 0x131c */
	__u8	pad_0x1320[0x1324-0x1320];	/* 0x1320 */
	__u32	tod_progreg_save_area;		/* 0x1324 */
	__u32	cpu_timer_save_area[2];		/* 0x1328 */
	__u32	clock_comp_save_area[2];	/* 0x1330 */
	__u8	pad_0x1338[0x1340-0x1338];	/* 0x1338 */
	__u32	access_regs_save_area[16];	/* 0x1340 */
	__u64	cregs_save_area[16];		/* 0x1380 */

	/* align to the top of the prefix area */
	__u8	pad_0x1400[0x2000-0x1400];	/* 0x1400 */
#endif /* !__s390x__ */
} __attribute__((packed)); /* End structure*/

#define S390_lowcore (*((struct _lowcore *) 0))
extern struct _lowcore *lowcore_ptr[];

static inline void set_prefix(__u32 address)
{
	asm volatile("spx %0" : : "m" (address) : "memory");
}

static inline __u32 store_prefix(void)
{
	__u32 address;

	asm volatile("stpx %0" : "=m" (address));
	return address;
}

#endif

#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-s390/lowcore.h
	3	*
	4	* S390 version
	5	* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
	6	* Author(s): Hartmut Penner (hp@de.ibm.com),
	7	* Martin Schwidefsky (schwidefsky@de.ibm.com),
	8	* Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
	9	*/
	10
	11	#ifndef _ASM_S390_LOWCORE_H
	12	#define _ASM_S390_LOWCORE_H
	13
866ba284 MS	14	#define __LC_IPL_PARMBLOCK_PTR 0x0014
	15	#define __LC_EXT_PARAMS 0x0080
	16	#define __LC_CPU_ADDRESS 0x0084
	17	#define __LC_EXT_INT_CODE 0x0086
1da177e4	18
866ba284 MS	19	#define __LC_SVC_ILC 0x0088
	20	#define __LC_SVC_INT_CODE 0x008a
	21	#define __LC_PGM_ILC 0x008c
	22	#define __LC_PGM_INT_CODE 0x008e
1da177e4	23
866ba284 MS	24	#define __LC_PER_ATMID 0x0096
	25	#define __LC_PER_ADDRESS 0x0098
	26	#define __LC_PER_ACCESS_ID 0x00a1
	27	#define __LC_AR_MODE_ID 0x00a3
1da177e4	28
866ba284 MS	29	#define __LC_SUBCHANNEL_ID 0x00b8
	30	#define __LC_SUBCHANNEL_NR 0x00ba
	31	#define __LC_IO_INT_PARM 0x00bc
	32	#define __LC_IO_INT_WORD 0x00c0
8c4caa4f	33	#define __LC_STFL_FAC_LIST 0x00c8
866ba284	34	#define __LC_MCCK_CODE 0x00e8
9e74a6b8	35
866ba284	36	#define __LC_DUMP_REIPL 0x0e00
1da177e4 LT	37
1da177e4 LT	38	#ifndef __s390x__
866ba284 MS	39	#define __LC_EXT_OLD_PSW 0x0018
	40	#define __LC_SVC_OLD_PSW 0x0020
	41	#define __LC_PGM_OLD_PSW 0x0028
	42	#define __LC_MCK_OLD_PSW 0x0030
	43	#define __LC_IO_OLD_PSW 0x0038
	44	#define __LC_EXT_NEW_PSW 0x0058
	45	#define __LC_SVC_NEW_PSW 0x0060
	46	#define __LC_PGM_NEW_PSW 0x0068
	47	#define __LC_MCK_NEW_PSW 0x0070
	48	#define __LC_IO_NEW_PSW 0x0078
	49	#define __LC_SAVE_AREA 0x0200
	50	#define __LC_RETURN_PSW 0x0240
	51	#define __LC_RETURN_MCCK_PSW 0x0248
	52	#define __LC_SYNC_ENTER_TIMER 0x0250
	53	#define __LC_ASYNC_ENTER_TIMER 0x0258
	54	#define __LC_EXIT_TIMER 0x0260
	55	#define __LC_USER_TIMER 0x0268
	56	#define __LC_SYSTEM_TIMER 0x0270
	57	#define __LC_STEAL_TIMER 0x0278
	58	#define __LC_LAST_UPDATE_TIMER 0x0280
	59	#define __LC_LAST_UPDATE_CLOCK 0x0288
	60	#define __LC_CURRENT 0x0290
	61	#define __LC_THREAD_INFO 0x0294
	62	#define __LC_KERNEL_STACK 0x0298
	63	#define __LC_ASYNC_STACK 0x029c
	64	#define __LC_PANIC_STACK 0x02a0
	65	#define __LC_KERNEL_ASCE 0x02a4
	66	#define __LC_USER_ASCE 0x02a8
	67	#define __LC_USER_EXEC_ASCE 0x02ac
	68	#define __LC_CPUID 0x02b0
	69	#define __LC_INT_CLOCK 0x02c8
25097bf1	70	#define __LC_MACHINE_FLAGS 0x02d8
dfd9f7ab	71	#define __LC_FTRACE_FUNC 0x02dc
866ba284 MS	72	#define __LC_IRB 0x0300
	73	#define __LC_PFAULT_INTPARM 0x0080
	74	#define __LC_CPU_TIMER_SAVE_AREA 0x00d8
	75	#define __LC_CLOCK_COMP_SAVE_AREA 0x00e0
	76	#define __LC_PSW_SAVE_AREA 0x0100
	77	#define __LC_PREFIX_SAVE_AREA 0x0108
	78	#define __LC_AREGS_SAVE_AREA 0x0120
	79	#define __LC_FPREGS_SAVE_AREA 0x0160
	80	#define __LC_GPREGS_SAVE_AREA 0x0180
	81	#define __LC_CREGS_SAVE_AREA 0x01c0
1da177e4	82	#else /* __s390x__ */
866ba284 MS	83	#define __LC_LAST_BREAK 0x0110
	84	#define __LC_EXT_OLD_PSW 0x0130
	85	#define __LC_SVC_OLD_PSW 0x0140
	86	#define __LC_PGM_OLD_PSW 0x0150
	87	#define __LC_MCK_OLD_PSW 0x0160
	88	#define __LC_IO_OLD_PSW 0x0170
	89	#define __LC_EXT_NEW_PSW 0x01b0
	90	#define __LC_SVC_NEW_PSW 0x01c0
	91	#define __LC_PGM_NEW_PSW 0x01d0
	92	#define __LC_MCK_NEW_PSW 0x01e0
	93	#define __LC_IO_NEW_PSW 0x01f0
	94	#define __LC_SAVE_AREA 0x0200
	95	#define __LC_RETURN_PSW 0x0280
	96	#define __LC_RETURN_MCCK_PSW 0x0290
	97	#define __LC_SYNC_ENTER_TIMER 0x02a0
	98	#define __LC_ASYNC_ENTER_TIMER 0x02a8
	99	#define __LC_EXIT_TIMER 0x02b0
	100	#define __LC_USER_TIMER 0x02b8
	101	#define __LC_SYSTEM_TIMER 0x02c0
	102	#define __LC_STEAL_TIMER 0x02c8
	103	#define __LC_LAST_UPDATE_TIMER 0x02d0
	104	#define __LC_LAST_UPDATE_CLOCK 0x02d8
	105	#define __LC_CURRENT 0x02e0
	106	#define __LC_THREAD_INFO 0x02e8
	107	#define __LC_KERNEL_STACK 0x02f0
	108	#define __LC_ASYNC_STACK 0x02f8
	109	#define __LC_PANIC_STACK 0x0300
	110	#define __LC_KERNEL_ASCE 0x0308
	111	#define __LC_USER_ASCE 0x0310
	112	#define __LC_USER_EXEC_ASCE 0x0318
	113	#define __LC_CPUID 0x0320
	114	#define __LC_INT_CLOCK 0x0340
	115	#define __LC_VDSO_PER_CPU 0x0350
25097bf1	116	#define __LC_MACHINE_FLAGS 0x0358
dfd9f7ab	117	#define __LC_FTRACE_FUNC 0x0360
866ba284 MS	118	#define __LC_IRB 0x0380
	119	#define __LC_PASTE 0x03c0
	120	#define __LC_PFAULT_INTPARM 0x11b8
ff6b8ea6	121	#define __LC_FPREGS_SAVE_AREA 0x1200
866ba284	122	#define __LC_GPREGS_SAVE_AREA 0x1280
ff6b8ea6 MH	123	#define __LC_PSW_SAVE_AREA 0x1300
ff6b8ea6 MH	124	#define __LC_PREFIX_SAVE_AREA 0x1318
866ba284	125	#define __LC_FP_CREG_SAVE_AREA 0x131c
ff6b8ea6	126	#define __LC_TODREG_SAVE_AREA 0x1324
866ba284	127	#define __LC_CPU_TIMER_SAVE_AREA 0x1328
ff6b8ea6	128	#define __LC_CLOCK_COMP_SAVE_AREA 0x1331
866ba284 MS	129	#define __LC_AREGS_SAVE_AREA 0x1340
866ba284 MS	130	#define __LC_CREGS_SAVE_AREA 0x1380
1da177e4 LT	131	#endif /* __s390x__ */
	132
	133	#ifndef __ASSEMBLY__
	134
25097bf1 CE	135	#include <asm/cpuid.h>
25097bf1 CE	136	#include <asm/ptrace.h>
1da177e4	137	#include <linux/types.h>
1da177e4 LT	138
	139	void restart_int_handler(void);
	140	void ext_int_handler(void);
	141	void system_call(void);
	142	void pgm_check_handler(void);
	143	void mcck_int_handler(void);
	144	void io_int_handler(void);
	145
411ed322 MH	146	struct save_area_s390 {
	147	u32 ext_save;
	148	u64 timer;
	149	u64 clk_cmp;
	150	u8 pad1[24];
	151	u8 psw[8];
	152	u32 pref_reg;
	153	u8 pad2[20];
	154	u32 acc_regs[16];
	155	u64 fp_regs[4];
	156	u32 gp_regs[16];
	157	u32 ctrl_regs[16];
	158	} __attribute__((packed));
	159
	160	struct save_area_s390x {
	161	u64 fp_regs[16];
	162	u64 gp_regs[16];
	163	u8 psw[16];
	164	u8 pad1[8];
	165	u32 pref_reg;
	166	u32 fp_ctrl_reg;
	167	u8 pad2[4];
	168	u32 tod_reg;
	169	u64 timer;
	170	u64 clk_cmp;
	171	u8 pad3[8];
	172	u32 acc_regs[16];
	173	u64 ctrl_regs[16];
	174	} __attribute__((packed));
	175
	176	union save_area {
	177	struct save_area_s390 s390;
	178	struct save_area_s390x s390x;
	179	};
	180
	181	#define SAVE_AREA_BASE_S390 0xd4
	182	#define SAVE_AREA_BASE_S390X 0x1200
	183
	184	#ifndef __s390x__
	185	#define SAVE_AREA_SIZE sizeof(struct save_area_s390)
	186	#define SAVE_AREA_BASE SAVE_AREA_BASE_S390
	187	#else
	188	#define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
	189	#define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
	190	#endif
	191
1da177e4 LT	192	struct _lowcore
	193	{
	194	#ifndef __s390x__
866ba284 MS	195	/* 0x0000 - 0x01ff: defined by architecture */
	196	psw_t restart_psw; /* 0x0000 */
	197	__u32 ccw2[4]; /* 0x0008 */
	198	psw_t external_old_psw; /* 0x0018 */
	199	psw_t svc_old_psw; /* 0x0020 */
	200	psw_t program_old_psw; /* 0x0028 */
	201	psw_t mcck_old_psw; /* 0x0030 */
	202	psw_t io_old_psw; /* 0x0038 */
	203	__u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
	204	psw_t external_new_psw; /* 0x0058 */
	205	psw_t svc_new_psw; /* 0x0060 */
	206	psw_t program_new_psw; /* 0x0068 */
	207	psw_t mcck_new_psw; /* 0x0070 */
	208	psw_t io_new_psw; /* 0x0078 */
	209	__u32 ext_params; /* 0x0080 */
	210	__u16 cpu_addr; /* 0x0084 */
	211	__u16 ext_int_code; /* 0x0086 */
	212	__u16 svc_ilc; /* 0x0088 */
	213	__u16 svc_code; /* 0x008a */
	214	__u16 pgm_ilc; /* 0x008c */
	215	__u16 pgm_code; /* 0x008e */
	216	__u32 trans_exc_code; /* 0x0090 */
	217	__u16 mon_class_num; /* 0x0094 */
	218	__u16 per_perc_atmid; /* 0x0096 */
	219	__u32 per_address; /* 0x0098 */
	220	__u32 monitor_code; /* 0x009c */
	221	__u8 exc_access_id; /* 0x00a0 */
	222	__u8 per_access_id; /* 0x00a1 */
	223	__u8 pad_0x00a2[0x00b8-0x00a2]; /* 0x00a2 */
	224	__u16 subchannel_id; /* 0x00b8 */
	225	__u16 subchannel_nr; /* 0x00ba */
	226	__u32 io_int_parm; /* 0x00bc */
	227	__u32 io_int_word; /* 0x00c0 */
	228	__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
	229	__u32 stfl_fac_list; /* 0x00c8 */
	230	__u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
	231	__u32 extended_save_area_addr; /* 0x00d4 */
	232	__u32 cpu_timer_save_area[2]; /* 0x00d8 */
	233	__u32 clock_comp_save_area[2]; /* 0x00e0 */
	234	__u32 mcck_interruption_code[2]; /* 0x00e8 */
	235	__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
	236	__u32 external_damage_code; /* 0x00f4 */
	237	__u32 failing_storage_address; /* 0x00f8 */
	238	__u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
	239	__u32 st_status_fixed_logout[4]; /* 0x0100 */
	240	__u8 pad_0x0110[0x0120-0x0110]; /* 0x0110 */
	241
	242	/* CPU register save area: defined by architecture */
	243	__u32 access_regs_save_area[16]; /* 0x0120 */
	244	__u32 floating_pt_save_area[8]; /* 0x0160 */
	245	__u32 gpregs_save_area[16]; /* 0x0180 */
	246	__u32 cregs_save_area[16]; /* 0x01c0 */
	247
	248	/* Return psws. */
	249	__u32 save_area[16]; /* 0x0200 */
	250	psw_t return_psw; /* 0x0240 */
	251	psw_t return_mcck_psw; /* 0x0248 */
	252
	253	/* CPU time accounting values */
	254	__u64 sync_enter_timer; /* 0x0250 */
	255	__u64 async_enter_timer; /* 0x0258 */
	256	__u64 exit_timer; /* 0x0260 */
	257	__u64 user_timer; /* 0x0268 */
	258	__u64 system_timer; /* 0x0270 */
259	__u64 steal_timer; /* 0x0278 */
260	__u64 last_update_timer; /* 0x0280 */
261	__u64 last_update_clock; /* 0x0288 */
262
263	/* Current process. */
264	__u32 current_task; /* 0x0290 */
265	__u32 thread_info; /* 0x0294 */
266	__u32 kernel_stack; /* 0x0298 */
267
268	/* Interrupt and panic stack. */
269	__u32 async_stack; /* 0x029c */
270	__u32 panic_stack; /* 0x02a0 */
271
272	/* Address space pointer. */
273	__u32 kernel_asce; /* 0x02a4 */
274	__u32 user_asce; /* 0x02a8 */
275	__u32 user_exec_asce; /* 0x02ac */
276
277	/* SMP info area */
278	cpuid_t cpu_id; /* 0x02b0 */
279	__u32 cpu_nr; /* 0x02b8 */
280	__u32 softirq_pending; /* 0x02bc */
281	__u32 percpu_offset; /* 0x02c0 */
282	__u32 ext_call_fast; /* 0x02c4 */
283	__u64 int_clock; /* 0x02c8 */
284	__u64 clock_comparator; /* 0x02d0 */
25097bf1	285	__u32 machine_flags; /* 0x02d8 */
dfd9f7ab HC	286	__u32 ftrace_func; /* 0x02dc */
dfd9f7ab HC	287	__u8 pad_0x02f0[0x0300-0x02f0]; /* 0x02f0 */
866ba284 MS	288
	289	/* Interrupt response block */
	290	__u8 irb[64]; /* 0x0300 */
	291
	292	__u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
	293
	294	/*
	295	* 0xe00 contains the address of the IPL Parameter Information
	296	* block. Dump tools need IPIB for IPL after dump.
	297	* Note: do not change the position of any fields in 0x0e00-0x0f00
	298	*/
	299	__u32 ipib; /* 0x0e00 */
	300	__u32 ipib_checksum; /* 0x0e04 */
	301
	302	/* Align to the top 1k of prefix area */
	303	__u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */
1da177e4	304	#else /* !__s390x__ */
866ba284 MS	305	/* 0x0000 - 0x01ff: defined by architecture */
	306	__u32 ccw1[2]; /* 0x0000 */
	307	__u32 ccw2[4]; /* 0x0008 */
	308	__u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
	309	__u32 ext_params; /* 0x0080 */
	310	__u16 cpu_addr; /* 0x0084 */
	311	__u16 ext_int_code; /* 0x0086 */
	312	__u16 svc_ilc; /* 0x0088 */
	313	__u16 svc_code; /* 0x008a */
	314	__u16 pgm_ilc; /* 0x008c */
	315	__u16 pgm_code; /* 0x008e */
	316	__u32 data_exc_code; /* 0x0090 */
	317	__u16 mon_class_num; /* 0x0094 */
	318	__u16 per_perc_atmid; /* 0x0096 */
	319	addr_t per_address; /* 0x0098 */
	320	__u8 exc_access_id; /* 0x00a0 */
	321	__u8 per_access_id; /* 0x00a1 */
	322	__u8 op_access_id; /* 0x00a2 */
	323	__u8 ar_access_id; /* 0x00a3 */
	324	__u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
	325	addr_t trans_exc_code; /* 0x00a8 */
	326	addr_t monitor_code; /* 0x00b0 */
	327	__u16 subchannel_id; /* 0x00b8 */
	328	__u16 subchannel_nr; /* 0x00ba */
	329	__u32 io_int_parm; /* 0x00bc */
	330	__u32 io_int_word; /* 0x00c0 */
	331	__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
	332	__u32 stfl_fac_list; /* 0x00c8 */
	333	__u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
	334	__u32 mcck_interruption_code[2]; /* 0x00e8 */
	335	__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
	336	__u32 external_damage_code; /* 0x00f4 */
	337	addr_t failing_storage_address; /* 0x00f8 */
	338	__u8 pad_0x0100[0x0120-0x0100]; /* 0x0100 */
	339	psw_t restart_old_psw; /* 0x0120 */
	340	psw_t external_old_psw; /* 0x0130 */
	341	psw_t svc_old_psw; /* 0x0140 */
	342	psw_t program_old_psw; /* 0x0150 */
	343	psw_t mcck_old_psw; /* 0x0160 */
	344	psw_t io_old_psw; /* 0x0170 */
	345	__u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
	346	psw_t restart_psw; /* 0x01a0 */
	347	psw_t external_new_psw; /* 0x01b0 */
	348	psw_t svc_new_psw; /* 0x01c0 */
	349	psw_t program_new_psw; /* 0x01d0 */
	350	psw_t mcck_new_psw; /* 0x01e0 */
	351	psw_t io_new_psw; /* 0x01f0 */
	352
	353	/* Entry/exit save area & return psws. */
	354	__u64 save_area[16]; /* 0x0200 */
	355	psw_t return_psw; /* 0x0280 */
	356	psw_t return_mcck_psw; /* 0x0290 */
	357
	358	/* CPU accounting and timing values. */
	359	__u64 sync_enter_timer; /* 0x02a0 */
	360	__u64 async_enter_timer; /* 0x02a8 */
	361	__u64 exit_timer; /* 0x02b0 */
	362	__u64 user_timer; /* 0x02b8 */
	363	__u64 system_timer; /* 0x02c0 */
	364	__u64 steal_timer; /* 0x02c8 */
	365	__u64 last_update_timer; /* 0x02d0 */
	366	__u64 last_update_clock; /* 0x02d8 */
	367
	368	/* Current process. */
369	__u64 current_task; /* 0x02e0 */
370	__u64 thread_info; /* 0x02e8 */
371	__u64 kernel_stack; /* 0x02f0 */
372
373	/* Interrupt and panic stack. */
374	__u64 async_stack; /* 0x02f8 */
375	__u64 panic_stack; /* 0x0300 */
376
377	/* Address space pointer. */
378	__u64 kernel_asce; /* 0x0308 */
379	__u64 user_asce; /* 0x0310 */
380	__u64 user_exec_asce; /* 0x0318 */
381
382	/* SMP info area */
383	cpuid_t cpu_id; /* 0x0320 */
384	__u32 cpu_nr; /* 0x0328 */
385	__u32 softirq_pending; /* 0x032c */
386	__u64 percpu_offset; /* 0x0330 */
387	__u64 ext_call_fast; /* 0x0338 */
388	__u64 int_clock; /* 0x0340 */
389	__u64 clock_comparator; /* 0x0348 */
390	__u64 vdso_per_cpu_data; /* 0x0350 */
25097bf1	391	__u64 machine_flags; /* 0x0358 */
dfd9f7ab HC	392	__u64 ftrace_func; /* 0x0360 */
dfd9f7ab HC	393	__u8 pad_0x0368[0x0380-0x0368]; /* 0x0368 */
866ba284 MS	394
	395	/* Interrupt response block. */
	396	__u8 irb[64]; /* 0x0380 */
1da177e4	397
c742b31c	398	/* Per cpu primary space access list */
866ba284 MS	399	__u32 paste[16]; /* 0x03c0 */
	400
	401	__u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
	402
	403	/*
	404	* 0xe00 contains the address of the IPL Parameter Information
	405	* block. Dump tools need IPIB for IPL after dump.
	406	* Note: do not change the position of any fields in 0x0e00-0x0f00
	407	*/
	408	__u64 ipib; /* 0x0e00 */
	409	__u32 ipib_checksum; /* 0x0e08 */
	410	__u8 pad_0x0e0c[0x11b8-0x0e0c]; /* 0x0e0c */
	411
	412	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
	413	__u64 ext_params2; /* 0x11B8 */
	414	__u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
	415
	416	/* CPU register save area: defined by architecture */
	417	__u64 floating_pt_save_area[16]; /* 0x1200 */
	418	__u64 gpregs_save_area[16]; /* 0x1280 */
	419	__u32 st_status_fixed_logout[4]; /* 0x1300 */
	420	__u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
	421	__u32 prefixreg_save_area; /* 0x1318 */
	422	__u32 fpt_creg_save_area; /* 0x131c */
	423	__u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
	424	__u32 tod_progreg_save_area; /* 0x1324 */
	425	__u32 cpu_timer_save_area[2]; /* 0x1328 */
	426	__u32 clock_comp_save_area[2]; /* 0x1330 */
	427	__u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
	428	__u32 access_regs_save_area[16]; /* 0x1340 */
	429	__u64 cregs_save_area[16]; /* 0x1380 */
1da177e4 LT	430
1da177e4 LT	431	/* align to the top of the prefix area */
866ba284	432	__u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */
1da177e4 LT	433	#endif /* !__s390x__ */
	434	} __attribute__((packed)); /* End structure*/
	435
	436	#define S390_lowcore (((struct _lowcore ) 0))
	437	extern struct _lowcore *lowcore_ptr[];
	438
4448aaf0	439	static inline void set_prefix(__u32 address)
1da177e4	440	{
94c12cc7	441	asm volatile("spx %0" : : "m" (address) : "memory");
1da177e4 LT	442	}
1da177e4 LT	443
15e9b586 HC	444	static inline __u32 store_prefix(void)
	445	{
	446	__u32 address;
	447
	448	asm volatile("stpx %0" : "=m" (address));
	449	return address;
	450	}
	451
1da177e4 LT	452	#endif
	453
	454	#endif