Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
cbb870c8 HC |
2 | * Copyright IBM Corp. 1999,2010 |
3 | * Author(s): Hartmut Penner <hp@de.ibm.com>, | |
4 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | |
5 | * Denis Joseph Barrow, | |
1da177e4 LT |
6 | */ |
7 | ||
8 | #ifndef _ASM_S390_LOWCORE_H | |
9 | #define _ASM_S390_LOWCORE_H | |
10 | ||
1da177e4 | 11 | #include <linux/types.h> |
cbb870c8 HC |
12 | #include <asm/ptrace.h> |
13 | #include <asm/cpu.h> | |
1da177e4 LT |
14 | |
15 | void restart_int_handler(void); | |
16 | void ext_int_handler(void); | |
17 | void system_call(void); | |
18 | void pgm_check_handler(void); | |
19 | void mcck_int_handler(void); | |
20 | void io_int_handler(void); | |
21 | ||
f64ca217 HC |
22 | #ifdef CONFIG_32BIT |
23 | ||
cbb870c8 HC |
24 | #define LC_ORDER 0 |
25 | #define LC_PAGES 1 | |
26 | ||
f64ca217 | 27 | struct save_area { |
411ed322 MH |
28 | u32 ext_save; |
29 | u64 timer; | |
30 | u64 clk_cmp; | |
31 | u8 pad1[24]; | |
32 | u8 psw[8]; | |
33 | u32 pref_reg; | |
34 | u8 pad2[20]; | |
35 | u32 acc_regs[16]; | |
36 | u64 fp_regs[4]; | |
37 | u32 gp_regs[16]; | |
38 | u32 ctrl_regs[16]; | |
cbb870c8 | 39 | } __packed; |
411ed322 | 40 | |
cbb870c8 | 41 | struct _lowcore { |
866ba284 | 42 | psw_t restart_psw; /* 0x0000 */ |
cbb870c8 HC |
43 | psw_t restart_old_psw; /* 0x0008 */ |
44 | __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */ | |
45 | __u32 ipl_parmblock_ptr; /* 0x0014 */ | |
866ba284 MS |
46 | psw_t external_old_psw; /* 0x0018 */ |
47 | psw_t svc_old_psw; /* 0x0020 */ | |
48 | psw_t program_old_psw; /* 0x0028 */ | |
49 | psw_t mcck_old_psw; /* 0x0030 */ | |
50 | psw_t io_old_psw; /* 0x0038 */ | |
51 | __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */ | |
52 | psw_t external_new_psw; /* 0x0058 */ | |
53 | psw_t svc_new_psw; /* 0x0060 */ | |
54 | psw_t program_new_psw; /* 0x0068 */ | |
55 | psw_t mcck_new_psw; /* 0x0070 */ | |
56 | psw_t io_new_psw; /* 0x0078 */ | |
57 | __u32 ext_params; /* 0x0080 */ | |
58 | __u16 cpu_addr; /* 0x0084 */ | |
59 | __u16 ext_int_code; /* 0x0086 */ | |
60 | __u16 svc_ilc; /* 0x0088 */ | |
61 | __u16 svc_code; /* 0x008a */ | |
62 | __u16 pgm_ilc; /* 0x008c */ | |
63 | __u16 pgm_code; /* 0x008e */ | |
64 | __u32 trans_exc_code; /* 0x0090 */ | |
65 | __u16 mon_class_num; /* 0x0094 */ | |
66 | __u16 per_perc_atmid; /* 0x0096 */ | |
67 | __u32 per_address; /* 0x0098 */ | |
68 | __u32 monitor_code; /* 0x009c */ | |
69 | __u8 exc_access_id; /* 0x00a0 */ | |
70 | __u8 per_access_id; /* 0x00a1 */ | |
cbb870c8 HC |
71 | __u8 op_access_id; /* 0x00a2 */ |
72 | __u8 ar_access_id; /* 0x00a3 */ | |
73 | __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */ | |
866ba284 MS |
74 | __u16 subchannel_id; /* 0x00b8 */ |
75 | __u16 subchannel_nr; /* 0x00ba */ | |
76 | __u32 io_int_parm; /* 0x00bc */ | |
77 | __u32 io_int_word; /* 0x00c0 */ | |
78 | __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ | |
79 | __u32 stfl_fac_list; /* 0x00c8 */ | |
80 | __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */ | |
81 | __u32 extended_save_area_addr; /* 0x00d4 */ | |
82 | __u32 cpu_timer_save_area[2]; /* 0x00d8 */ | |
83 | __u32 clock_comp_save_area[2]; /* 0x00e0 */ | |
84 | __u32 mcck_interruption_code[2]; /* 0x00e8 */ | |
85 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ | |
86 | __u32 external_damage_code; /* 0x00f4 */ | |
87 | __u32 failing_storage_address; /* 0x00f8 */ | |
88 | __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */ | |
cbb870c8 HC |
89 | psw_t psw_save_area; /* 0x0100 */ |
90 | __u32 prefixreg_save_area; /* 0x0108 */ | |
91 | __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */ | |
866ba284 MS |
92 | |
93 | /* CPU register save area: defined by architecture */ | |
94 | __u32 access_regs_save_area[16]; /* 0x0120 */ | |
95 | __u32 floating_pt_save_area[8]; /* 0x0160 */ | |
96 | __u32 gpregs_save_area[16]; /* 0x0180 */ | |
97 | __u32 cregs_save_area[16]; /* 0x01c0 */ | |
98 | ||
99 | /* Return psws. */ | |
100 | __u32 save_area[16]; /* 0x0200 */ | |
101 | psw_t return_psw; /* 0x0240 */ | |
102 | psw_t return_mcck_psw; /* 0x0248 */ | |
103 | ||
104 | /* CPU time accounting values */ | |
105 | __u64 sync_enter_timer; /* 0x0250 */ | |
106 | __u64 async_enter_timer; /* 0x0258 */ | |
6377981f MS |
107 | __u64 mcck_enter_timer; /* 0x0260 */ |
108 | __u64 exit_timer; /* 0x0268 */ | |
109 | __u64 user_timer; /* 0x0270 */ | |
110 | __u64 system_timer; /* 0x0278 */ | |
111 | __u64 steal_timer; /* 0x0280 */ | |
112 | __u64 last_update_timer; /* 0x0288 */ | |
113 | __u64 last_update_clock; /* 0x0290 */ | |
866ba284 MS |
114 | |
115 | /* Current process. */ | |
6377981f MS |
116 | __u32 current_task; /* 0x0298 */ |
117 | __u32 thread_info; /* 0x029c */ | |
118 | __u32 kernel_stack; /* 0x02a0 */ | |
866ba284 MS |
119 | |
120 | /* Interrupt and panic stack. */ | |
6377981f MS |
121 | __u32 async_stack; /* 0x02a4 */ |
122 | __u32 panic_stack; /* 0x02a8 */ | |
866ba284 MS |
123 | |
124 | /* Address space pointer. */ | |
6377981f MS |
125 | __u32 kernel_asce; /* 0x02ac */ |
126 | __u32 user_asce; /* 0x02b0 */ | |
f2db2e6c | 127 | __u32 current_pid; /* 0x02b4 */ |
866ba284 MS |
128 | |
129 | /* SMP info area */ | |
6377981f MS |
130 | __u32 cpu_nr; /* 0x02b8 */ |
131 | __u32 softirq_pending; /* 0x02bc */ | |
132 | __u32 percpu_offset; /* 0x02c0 */ | |
133 | __u32 ext_call_fast; /* 0x02c4 */ | |
134 | __u64 int_clock; /* 0x02c8 */ | |
135 | __u64 mcck_clock; /* 0x02d0 */ | |
136 | __u64 clock_comparator; /* 0x02d8 */ | |
137 | __u32 machine_flags; /* 0x02e0 */ | |
138 | __u32 ftrace_func; /* 0x02e4 */ | |
139 | __u8 pad_0x02e8[0x0300-0x02e8]; /* 0x02e8 */ | |
866ba284 MS |
140 | |
141 | /* Interrupt response block */ | |
142 | __u8 irb[64]; /* 0x0300 */ | |
143 | ||
7717aeff | 144 | __u8 pad_0x0340[0x0e00-0x0340]; /* 0x0340 */ |
866ba284 MS |
145 | |
146 | /* | |
147 | * 0xe00 contains the address of the IPL Parameter Information | |
148 | * block. Dump tools need IPIB for IPL after dump. | |
149 | * Note: do not change the position of any fields in 0x0e00-0x0f00 | |
150 | */ | |
151 | __u32 ipib; /* 0x0e00 */ | |
152 | __u32 ipib_checksum; /* 0x0e04 */ | |
14375bc4 | 153 | __u8 pad_0x0e08[0x0f00-0x0e08]; /* 0x0e08 */ |
866ba284 | 154 | |
14375bc4 MS |
155 | /* Extended facility list */ |
156 | __u64 stfle_fac_list[32]; /* 0x0f00 */ | |
cbb870c8 HC |
157 | } __packed; |
158 | ||
159 | #else /* CONFIG_32BIT */ | |
160 | ||
161 | #define LC_ORDER 1 | |
162 | #define LC_PAGES 2 | |
163 | ||
164 | struct save_area { | |
165 | u64 fp_regs[16]; | |
166 | u64 gp_regs[16]; | |
167 | u8 psw[16]; | |
168 | u8 pad1[8]; | |
169 | u32 pref_reg; | |
170 | u32 fp_ctrl_reg; | |
171 | u8 pad2[4]; | |
172 | u32 tod_reg; | |
173 | u64 timer; | |
174 | u64 clk_cmp; | |
175 | u8 pad3[8]; | |
176 | u32 acc_regs[16]; | |
177 | u64 ctrl_regs[16]; | |
178 | } __packed; | |
179 | ||
180 | struct _lowcore { | |
181 | __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ | |
182 | __u32 ipl_parmblock_ptr; /* 0x0014 */ | |
866ba284 MS |
183 | __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ |
184 | __u32 ext_params; /* 0x0080 */ | |
185 | __u16 cpu_addr; /* 0x0084 */ | |
186 | __u16 ext_int_code; /* 0x0086 */ | |
187 | __u16 svc_ilc; /* 0x0088 */ | |
188 | __u16 svc_code; /* 0x008a */ | |
189 | __u16 pgm_ilc; /* 0x008c */ | |
190 | __u16 pgm_code; /* 0x008e */ | |
191 | __u32 data_exc_code; /* 0x0090 */ | |
192 | __u16 mon_class_num; /* 0x0094 */ | |
193 | __u16 per_perc_atmid; /* 0x0096 */ | |
94038a99 | 194 | __u64 per_address; /* 0x0098 */ |
866ba284 MS |
195 | __u8 exc_access_id; /* 0x00a0 */ |
196 | __u8 per_access_id; /* 0x00a1 */ | |
197 | __u8 op_access_id; /* 0x00a2 */ | |
198 | __u8 ar_access_id; /* 0x00a3 */ | |
199 | __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ | |
94038a99 MS |
200 | __u64 trans_exc_code; /* 0x00a8 */ |
201 | __u64 monitor_code; /* 0x00b0 */ | |
866ba284 MS |
202 | __u16 subchannel_id; /* 0x00b8 */ |
203 | __u16 subchannel_nr; /* 0x00ba */ | |
204 | __u32 io_int_parm; /* 0x00bc */ | |
205 | __u32 io_int_word; /* 0x00c0 */ | |
206 | __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ | |
207 | __u32 stfl_fac_list; /* 0x00c8 */ | |
208 | __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ | |
209 | __u32 mcck_interruption_code[2]; /* 0x00e8 */ | |
210 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ | |
211 | __u32 external_damage_code; /* 0x00f4 */ | |
94038a99 | 212 | __u64 failing_storage_address; /* 0x00f8 */ |
cbb870c8 HC |
213 | __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ |
214 | __u64 breaking_event_addr; /* 0x0110 */ | |
215 | __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ | |
866ba284 MS |
216 | psw_t restart_old_psw; /* 0x0120 */ |
217 | psw_t external_old_psw; /* 0x0130 */ | |
218 | psw_t svc_old_psw; /* 0x0140 */ | |
219 | psw_t program_old_psw; /* 0x0150 */ | |
220 | psw_t mcck_old_psw; /* 0x0160 */ | |
221 | psw_t io_old_psw; /* 0x0170 */ | |
222 | __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ | |
223 | psw_t restart_psw; /* 0x01a0 */ | |
224 | psw_t external_new_psw; /* 0x01b0 */ | |
225 | psw_t svc_new_psw; /* 0x01c0 */ | |
226 | psw_t program_new_psw; /* 0x01d0 */ | |
227 | psw_t mcck_new_psw; /* 0x01e0 */ | |
228 | psw_t io_new_psw; /* 0x01f0 */ | |
229 | ||
230 | /* Entry/exit save area & return psws. */ | |
231 | __u64 save_area[16]; /* 0x0200 */ | |
232 | psw_t return_psw; /* 0x0280 */ | |
233 | psw_t return_mcck_psw; /* 0x0290 */ | |
234 | ||
235 | /* CPU accounting and timing values. */ | |
236 | __u64 sync_enter_timer; /* 0x02a0 */ | |
237 | __u64 async_enter_timer; /* 0x02a8 */ | |
6377981f MS |
238 | __u64 mcck_enter_timer; /* 0x02b0 */ |
239 | __u64 exit_timer; /* 0x02b8 */ | |
240 | __u64 user_timer; /* 0x02c0 */ | |
241 | __u64 system_timer; /* 0x02c8 */ | |
242 | __u64 steal_timer; /* 0x02d0 */ | |
243 | __u64 last_update_timer; /* 0x02d8 */ | |
244 | __u64 last_update_clock; /* 0x02e0 */ | |
866ba284 MS |
245 | |
246 | /* Current process. */ | |
6377981f MS |
247 | __u64 current_task; /* 0x02e8 */ |
248 | __u64 thread_info; /* 0x02f0 */ | |
249 | __u64 kernel_stack; /* 0x02f8 */ | |
866ba284 MS |
250 | |
251 | /* Interrupt and panic stack. */ | |
6377981f MS |
252 | __u64 async_stack; /* 0x0300 */ |
253 | __u64 panic_stack; /* 0x0308 */ | |
866ba284 MS |
254 | |
255 | /* Address space pointer. */ | |
6377981f MS |
256 | __u64 kernel_asce; /* 0x0310 */ |
257 | __u64 user_asce; /* 0x0318 */ | |
f2db2e6c | 258 | __u64 current_pid; /* 0x0320 */ |
866ba284 MS |
259 | |
260 | /* SMP info area */ | |
6377981f MS |
261 | __u32 cpu_nr; /* 0x0328 */ |
262 | __u32 softirq_pending; /* 0x032c */ | |
263 | __u64 percpu_offset; /* 0x0330 */ | |
264 | __u64 ext_call_fast; /* 0x0338 */ | |
265 | __u64 int_clock; /* 0x0340 */ | |
266 | __u64 mcck_clock; /* 0x0348 */ | |
267 | __u64 clock_comparator; /* 0x0350 */ | |
268 | __u64 vdso_per_cpu_data; /* 0x0358 */ | |
269 | __u64 machine_flags; /* 0x0360 */ | |
270 | __u64 ftrace_func; /* 0x0368 */ | |
e5992f2e | 271 | __u64 gmap; /* 0x0370 */ |
cd3b70f5 | 272 | __u64 cmf_hpp; /* 0x0378 */ |
866ba284 MS |
273 | |
274 | /* Interrupt response block. */ | |
275 | __u8 irb[64]; /* 0x0380 */ | |
1da177e4 | 276 | |
c742b31c | 277 | /* Per cpu primary space access list */ |
866ba284 MS |
278 | __u32 paste[16]; /* 0x03c0 */ |
279 | ||
280 | __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */ | |
281 | ||
282 | /* | |
283 | * 0xe00 contains the address of the IPL Parameter Information | |
284 | * block. Dump tools need IPIB for IPL after dump. | |
285 | * Note: do not change the position of any fields in 0x0e00-0x0f00 | |
286 | */ | |
287 | __u64 ipib; /* 0x0e00 */ | |
288 | __u32 ipib_checksum; /* 0x0e08 */ | |
14375bc4 MS |
289 | __u8 pad_0x0e0c[0x0f00-0x0e0c]; /* 0x0e0c */ |
290 | ||
291 | /* Extended facility list */ | |
292 | __u64 stfle_fac_list[32]; /* 0x0f00 */ | |
293 | __u8 pad_0x1000[0x11b8-0x1000]; /* 0x1000 */ | |
866ba284 MS |
294 | |
295 | /* 64 bit extparam used for pfault/diag 250: defined by architecture */ | |
296 | __u64 ext_params2; /* 0x11B8 */ | |
297 | __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ | |
298 | ||
299 | /* CPU register save area: defined by architecture */ | |
300 | __u64 floating_pt_save_area[16]; /* 0x1200 */ | |
301 | __u64 gpregs_save_area[16]; /* 0x1280 */ | |
cbb870c8 | 302 | psw_t psw_save_area; /* 0x1300 */ |
866ba284 MS |
303 | __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ |
304 | __u32 prefixreg_save_area; /* 0x1318 */ | |
305 | __u32 fpt_creg_save_area; /* 0x131c */ | |
306 | __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ | |
307 | __u32 tod_progreg_save_area; /* 0x1324 */ | |
308 | __u32 cpu_timer_save_area[2]; /* 0x1328 */ | |
309 | __u32 clock_comp_save_area[2]; /* 0x1330 */ | |
310 | __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */ | |
311 | __u32 access_regs_save_area[16]; /* 0x1340 */ | |
312 | __u64 cregs_save_area[16]; /* 0x1380 */ | |
1da177e4 LT |
313 | |
314 | /* align to the top of the prefix area */ | |
866ba284 | 315 | __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */ |
cbb870c8 HC |
316 | } __packed; |
317 | ||
318 | #endif /* CONFIG_32BIT */ | |
1da177e4 LT |
319 | |
320 | #define S390_lowcore (*((struct _lowcore *) 0)) | |
cbb870c8 | 321 | |
1da177e4 LT |
322 | extern struct _lowcore *lowcore_ptr[]; |
323 | ||
4448aaf0 | 324 | static inline void set_prefix(__u32 address) |
1da177e4 | 325 | { |
94c12cc7 | 326 | asm volatile("spx %0" : : "m" (address) : "memory"); |
1da177e4 LT |
327 | } |
328 | ||
15e9b586 HC |
329 | static inline __u32 store_prefix(void) |
330 | { | |
331 | __u32 address; | |
332 | ||
333 | asm volatile("stpx %0" : "=m" (address)); | |
334 | return address; | |
335 | } | |
336 | ||
cbb870c8 | 337 | #endif /* _ASM_S390_LOWCORE_H */ |