[deliverable/linux.git] / arch / s390 / include / asm / page.h

/*
 *  S390 version
 *    Copyright IBM Corp. 1999, 2000
 *    Author(s): Hartmut Penner (hp@de.ibm.com)
 */

#ifndef _S390_PAGE_H
#define _S390_PAGE_H

#include <linux/const.h>
#include <asm/types.h>

/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT      12
#define PAGE_SIZE	(_AC(1,UL) << PAGE_SHIFT)
#define PAGE_MASK       (~(PAGE_SIZE-1))
#define PAGE_DEFAULT_ACC	0
#define PAGE_DEFAULT_KEY	(PAGE_DEFAULT_ACC << 4)

#define HPAGE_SHIFT	20
#define HPAGE_SIZE	(1UL << HPAGE_SHIFT)
#define HPAGE_MASK	(~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)

#define ARCH_HAS_SETCLEAR_HUGE_PTE
#define ARCH_HAS_HUGE_PTE_TYPE
#define ARCH_HAS_PREPARE_HUGEPAGE
#define ARCH_HAS_HUGEPAGE_CLEAR_FLUSH

#include <asm/setup.h>
#ifndef __ASSEMBLY__

static inline void storage_key_init_range(unsigned long start, unsigned long end)
{
#if PAGE_DEFAULT_KEY
	__storage_key_init_range(start, end);
#endif
}

#define clear_page(page)	memset((page), 0, PAGE_SIZE)

/*
 * copy_page uses the mvcl instruction with 0xb0 padding byte in order to
 * bypass caches when copying a page. Especially when copying huge pages
 * this keeps L1 and L2 data caches alive.
 */
static inline void copy_page(void *to, void *from)
{
	register void *reg2 asm ("2") = to;
	register unsigned long reg3 asm ("3") = 0x1000;
	register void *reg4 asm ("4") = from;
	register unsigned long reg5 asm ("5") = 0xb0001000;
	asm volatile(
		"	mvcl	2,4"
		: "+d" (reg2), "+d" (reg3), "+d" (reg4), "+d" (reg5)
		: : "memory", "cc");
}

#define clear_user_page(page, vaddr, pg)	clear_page(page)
#define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)

#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE

/*
 * These are used to make use of C type-checking..
 */

typedef struct { unsigned long pgprot; } pgprot_t;
typedef struct { unsigned long pgste; } pgste_t;
typedef struct { unsigned long pte; } pte_t;
typedef struct { unsigned long pmd; } pmd_t;
typedef struct { unsigned long pud; } pud_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef pte_t *pgtable_t;

#define pgprot_val(x)	((x).pgprot)
#define pgste_val(x)	((x).pgste)
#define pte_val(x)	((x).pte)
#define pmd_val(x)	((x).pmd)
#define pud_val(x)	((x).pud)
#define pgd_val(x)      ((x).pgd)

#define __pgste(x)	((pgste_t) { (x) } )
#define __pte(x)        ((pte_t) { (x) } )
#define __pmd(x)        ((pmd_t) { (x) } )
#define __pud(x)	((pud_t) { (x) } )
#define __pgd(x)        ((pgd_t) { (x) } )
#define __pgprot(x)     ((pgprot_t) { (x) } )

static inline void page_set_storage_key(unsigned long addr,
					unsigned char skey, int mapped)
{
	if (!mapped)
		asm volatile(".insn rrf,0xb22b0000,%0,%1,8,0"
			     : : "d" (skey), "a" (addr));
	else
		asm volatile("sske %0,%1" : : "d" (skey), "a" (addr));
}

static inline unsigned char page_get_storage_key(unsigned long addr)
{
	unsigned char skey;

	asm volatile("iske %0,%1" : "=d" (skey) : "a" (addr));
	return skey;
}

static inline int page_reset_referenced(unsigned long addr)
{
	unsigned int ipm;

	asm volatile(
		"	rrbe	0,%1\n"
		"	ipm	%0\n"
		: "=d" (ipm) : "a" (addr) : "cc");
	return !!(ipm & 0x20000000);
}

/* Bits int the storage key */
#define _PAGE_CHANGED		0x02	/* HW changed bit		*/
#define _PAGE_REFERENCED	0x04	/* HW referenced bit		*/
#define _PAGE_FP_BIT		0x08	/* HW fetch protection bit	*/
#define _PAGE_ACC_BITS		0xf0	/* HW access control bits	*/

struct page;
void arch_free_page(struct page *page, int order);
void arch_alloc_page(struct page *page, int order);
void arch_set_page_states(int make_stable);

static inline int devmem_is_allowed(unsigned long pfn)
{
	return 0;
}

#define HAVE_ARCH_FREE_PAGE
#define HAVE_ARCH_ALLOC_PAGE

#endif /* !__ASSEMBLY__ */

#define __PAGE_OFFSET           0x0UL
#define PAGE_OFFSET             0x0UL
#define __pa(x)                 (unsigned long)(x)
#define __va(x)                 (void *)(unsigned long)(x)
#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define page_to_phys(page)	(page_to_pfn(page) << PAGE_SHIFT)
#define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)

#define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | \
				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)

#include <asm-generic/memory_model.h>
#include <asm-generic/getorder.h>

#endif /* _S390_PAGE_H */
Commit	Line	Data
1da177e4	1	/*
1da177e4	2	* S390 version
a53c8fab	3	* Copyright IBM Corp. 1999, 2000
1da177e4 LT	4	* Author(s): Hartmut Penner (hp@de.ibm.com)
	5	*/
	6
	7	#ifndef _S390_PAGE_H
	8	#define _S390_PAGE_H
	9
52480ee5	10	#include <linux/const.h>
1da177e4 LT	11	#include <asm/types.h>
	12
	13	/* PAGE_SHIFT determines the page size */
	14	#define PAGE_SHIFT 12
52480ee5	15	#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
1da177e4	16	#define PAGE_MASK (~(PAGE_SIZE-1))
0b642ede PO	17	#define PAGE_DEFAULT_ACC 0
0b642ede PO	18	#define PAGE_DEFAULT_KEY (PAGE_DEFAULT_ACC << 4)
1da177e4	19
41318bfe	20	#define HPAGE_SHIFT 20
53492b1d GS	21	#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
	22	#define HPAGE_MASK (~(HPAGE_SIZE - 1))
	23	#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
	24
	25	#define ARCH_HAS_SETCLEAR_HUGE_PTE
	26	#define ARCH_HAS_HUGE_PTE_TYPE
	27	#define ARCH_HAS_PREPARE_HUGEPAGE
	28	#define ARCH_HAS_HUGEPAGE_CLEAR_FLUSH
	29
41318bfe DD	30	#include <asm/setup.h>
	31	#ifndef __ASSEMBLY__
	32
127c1fef MS	33	static inline void storage_key_init_range(unsigned long start, unsigned long end)
	34	{
	35	#if PAGE_DEFAULT_KEY
	36	__storage_key_init_range(start, end);
	37	#endif
	38	}
6b70a920	39
fb3d1c08	40	#define clear_page(page) memset((page), 0, PAGE_SIZE)
1da177e4	41
dba6bb60 HC	42	/*
	43	* copy_page uses the mvcl instruction with 0xb0 padding byte in order to
	44	* bypass caches when copying a page. Especially when copying huge pages
	45	* this keeps L1 and L2 data caches alive.
	46	*/
1da177e4 LT	47	static inline void copy_page(void to, void from)
1da177e4 LT	48	{
dba6bb60 HC	49	register void *reg2 asm ("2") = to;
	50	register unsigned long reg3 asm ("3") = 0x1000;
	51	register void *reg4 asm ("4") = from;
	52	register unsigned long reg5 asm ("5") = 0xb0001000;
	53	asm volatile(
	54	" mvcl 2,4"
	55	: "+d" (reg2), "+d" (reg3), "+d" (reg4), "+d" (reg5)
	56	: : "memory", "cc");
1da177e4 LT	57	}
1da177e4 LT	58
1da177e4 LT	59	#define clear_user_page(page, vaddr, pg) clear_page(page)
	60	#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
	61
769848c0 MG	62	#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
769848c0 MG	63	alloc_page_vma(GFP_HIGHUSER \| __GFP_ZERO \| movableflags, vma, vaddr)
1da177e4 LT	64	#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
1da177e4 LT	65
1da177e4 LT	66	/*
	67	* These are used to make use of C type-checking..
	68	*/
	69
	70	typedef struct { unsigned long pgprot; } pgprot_t;
b2fa47e6	71	typedef struct { unsigned long pgste; } pgste_t;
1da177e4	72	typedef struct { unsigned long pte; } pte_t;
1da177e4	73	typedef struct { unsigned long pmd; } pmd_t;
190a1d72	74	typedef struct { unsigned long pud; } pud_t;
1da177e4	75	typedef struct { unsigned long pgd; } pgd_t;
146e4b3c	76	typedef pte_t *pgtable_t;
1da177e4	77
146e4b3c	78	#define pgprot_val(x) ((x).pgprot)
b2fa47e6	79	#define pgste_val(x) ((x).pgste)
146e4b3c MS	80	#define pte_val(x) ((x).pte)
146e4b3c MS	81	#define pmd_val(x) ((x).pmd)
190a1d72	82	#define pud_val(x) ((x).pud)
1da177e4 LT	83	#define pgd_val(x) ((x).pgd)
1da177e4 LT	84
b2fa47e6	85	#define __pgste(x) ((pgste_t) { (x) } )
1da177e4 LT	86	#define __pte(x) ((pte_t) { (x) } )
1da177e4 LT	87	#define __pmd(x) ((pmd_t) { (x) } )
b2fa47e6	88	#define __pud(x) ((pud_t) { (x) } )
1da177e4 LT	89	#define __pgd(x) ((pgd_t) { (x) } )
	90	#define __pgprot(x) ((pgprot_t) { (x) } )
	91
2d42552d MS	92	static inline void page_set_storage_key(unsigned long addr,
2d42552d MS	93	unsigned char skey, int mapped)
1da177e4	94	{
e2b8d7af MS	95	if (!mapped)
	96	asm volatile(".insn rrf,0xb22b0000,%0,%1,8,0"
	97	: : "d" (skey), "a" (addr));
	98	else
	99	asm volatile("sske %0,%1" : : "d" (skey), "a" (addr));
1da177e4 LT	100	}
1da177e4 LT	101
2d42552d	102	static inline unsigned char page_get_storage_key(unsigned long addr)
1da177e4	103	{
2d42552d	104	unsigned char skey;
1da177e4	105
2d42552d	106	asm volatile("iske %0,%1" : "=d" (skey) : "a" (addr));
1da177e4 LT	107	return skey;
	108	}
	109
2d42552d MS	110	static inline int page_reset_referenced(unsigned long addr)
	111	{
	112	unsigned int ipm;
	113
	114	asm volatile(
	115	" rrbe 0,%1\n"
	116	" ipm %0\n"
	117	: "=d" (ipm) : "a" (addr) : "cc");
	118	return !!(ipm & 0x20000000);
	119	}
	120
	121	/* Bits int the storage key */
	122	#define _PAGE_CHANGED 0x02 /* HW changed bit */
	123	#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
	124	#define _PAGE_FP_BIT 0x08 /* HW fetch protection bit */
	125	#define _PAGE_ACC_BITS 0xf0 /* HW access control bits */
	126
45e576b1 MS	127	struct page;
	128	void arch_free_page(struct page *page, int order);
	129	void arch_alloc_page(struct page *page, int order);
638ad34a	130	void arch_set_page_states(int make_stable);
45e576b1	131
ec6743bb HB	132	static inline int devmem_is_allowed(unsigned long pfn)
	133	{
	134	return 0;
	135	}
	136
45e576b1 MS	137	#define HAVE_ARCH_FREE_PAGE
	138	#define HAVE_ARCH_ALLOC_PAGE
	139
1da177e4 LT	140	#endif /* !__ASSEMBLY__ */
1da177e4 LT	141
1da177e4 LT	142	#define __PAGE_OFFSET 0x0UL
	143	#define PAGE_OFFSET 0x0UL
	144	#define __pa(x) (unsigned long)(x)
	145	#define __va(x) (void *)(unsigned long)(x)
1da177e4	146	#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
0b2b6e1d	147	#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
1da177e4 LT	148	#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
1da177e4 LT	149
146e4b3c	150	#define VM_DATA_DEFAULT_FLAGS (VM_READ \| VM_WRITE \| \
1da177e4 LT	151	VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
1da177e4 LT	152
aed63043	153	#include <asm-generic/memory_model.h>
5b17e1cd	154	#include <asm-generic/getorder.h>
fd4fd5aa	155
1da177e4	156	#endif /* _S390_PAGE_H */