Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
54dfe5dd | 2 | * arch/s390/kernel/entry64.S |
1da177e4 LT |
3 | * S390 low-level entry points. |
4 | * | |
cd3b70f5 | 5 | * Copyright (C) IBM Corp. 1999,2010 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
1da177e4 | 12 | #include <linux/linkage.h> |
2bc89b5e | 13 | #include <linux/init.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
21 | ||
22 | /* | |
23 | * Stack layout for the system_call stack entry. | |
24 | * The first few entries are identical to the user_regs_struct. | |
25 | */ | |
25d83cbf HC |
26 | SP_PTREGS = STACK_FRAME_OVERHEAD |
27 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
28 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
29 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
30 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
31 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
32 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
33 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
34 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
35 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
36 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
37 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 | |
38 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72 | |
39 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80 | |
40 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88 | |
41 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96 | |
42 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104 | |
43 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112 | |
44 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120 | |
45 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
46 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
59da2139 | 47 | SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR |
25d83cbf | 48 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE |
1da177e4 LT |
49 | |
50 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
51 | STACK_SIZE = 1 << STACK_SHIFT | |
52 | ||
753c4dd6 | 53 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 54 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
753c4dd6 | 55 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 56 | _TIF_MCCK_PENDING) |
9bf1226b | 57 | _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \ |
66700001 | 58 | _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8) |
1da177e4 LT |
59 | |
60 | #define BASED(name) name-system_call(%r13) | |
61 | ||
cd3b70f5 CO |
62 | .macro HANDLE_SIE_INTERCEPT |
63 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) | |
64 | lg %r3,__LC_SIE_HOOK | |
65 | ltgr %r3,%r3 | |
66 | jz 0f | |
67 | basr %r14,%r3 | |
2ffbb3f6 | 68 | 0: |
cd3b70f5 CO |
69 | #endif |
70 | .endm | |
71 | ||
1f194a4c HC |
72 | #ifdef CONFIG_TRACE_IRQFLAGS |
73 | .macro TRACE_IRQS_ON | |
6a2df3a8 MS |
74 | basr %r2,%r0 |
75 | brasl %r14,trace_hardirqs_on_caller | |
1f194a4c HC |
76 | .endm |
77 | ||
78 | .macro TRACE_IRQS_OFF | |
6a2df3a8 MS |
79 | basr %r2,%r0 |
80 | brasl %r14,trace_hardirqs_off_caller | |
1f194a4c HC |
81 | .endm |
82 | #else | |
83 | #define TRACE_IRQS_ON | |
84 | #define TRACE_IRQS_OFF | |
411788ea HC |
85 | #endif |
86 | ||
87 | #ifdef CONFIG_LOCKDEP | |
88 | .macro LOCKDEP_SYS_EXIT | |
89 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
90 | jz 0f | |
91 | brasl %r14,lockdep_sys_exit | |
92 | 0: | |
93 | .endm | |
94 | #else | |
523b44cf | 95 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
96 | #endif |
97 | ||
25d83cbf | 98 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
99 | lg %r10,\lc_from |
100 | slg %r10,\lc_to | |
101 | alg %r10,\lc_sum | |
102 | stg %r10,\lc_sum | |
103 | .endm | |
1da177e4 LT |
104 | |
105 | /* | |
106 | * Register usage in interrupt handlers: | |
107 | * R9 - pointer to current task structure | |
108 | * R13 - pointer to literal pool | |
109 | * R14 - return register for function calls | |
110 | * R15 - kernel stack pointer | |
111 | */ | |
112 | ||
987ad70a | 113 | .macro SAVE_ALL_SVC psworg,savearea |
86f2552b | 114 | stmg %r11,%r15,\savearea |
987ad70a | 115 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp |
86f2552b MS |
116 | aghi %r15,-SP_SIZE # make room for registers & psw |
117 | lg %r11,__LC_LAST_BREAK | |
987ad70a MS |
118 | .endm |
119 | ||
86f2552b MS |
120 | .macro SAVE_ALL_PGM psworg,savearea |
121 | stmg %r11,%r15,\savearea | |
1da177e4 | 122 | tm \psworg+1,0x01 # test problem state bit |
63b12246 | 123 | #ifdef CONFIG_CHECK_STACK |
86f2552b MS |
124 | jnz 1f |
125 | tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
126 | jnz 2f | |
127 | la %r12,\psworg | |
128 | j stack_overflow | |
129 | #else | |
130 | jz 2f | |
63b12246 | 131 | #endif |
86f2552b MS |
132 | 1: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp |
133 | 2: aghi %r15,-SP_SIZE # make room for registers & psw | |
134 | larl %r13,system_call | |
135 | lg %r11,__LC_LAST_BREAK | |
63b12246 MS |
136 | .endm |
137 | ||
138 | .macro SAVE_ALL_ASYNC psworg,savearea | |
86f2552b MS |
139 | stmg %r11,%r15,\savearea |
140 | larl %r13,system_call | |
141 | lg %r11,__LC_LAST_BREAK | |
63b12246 | 142 | la %r12,\psworg |
1da177e4 LT |
143 | tm \psworg+1,0x01 # test problem state bit |
144 | jnz 1f # from user -> load kernel stack | |
145 | clc \psworg+8(8),BASED(.Lcritical_end) | |
146 | jhe 0f | |
147 | clc \psworg+8(8),BASED(.Lcritical_start) | |
148 | jl 0f | |
149 | brasl %r14,cleanup_critical | |
6add9f7f | 150 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
151 | jnz 1f |
152 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? | |
153 | slgr %r14,%r15 | |
154 | srag %r14,%r14,STACK_SHIFT | |
1da177e4 | 155 | #ifdef CONFIG_CHECK_STACK |
86f2552b MS |
156 | jnz 1f |
157 | tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
158 | jnz 2f | |
159 | j stack_overflow | |
160 | #else | |
161 | jz 2f | |
1da177e4 | 162 | #endif |
86f2552b MS |
163 | 1: lg %r15,__LC_ASYNC_STACK # load async stack |
164 | 2: aghi %r15,-SP_SIZE # make room for registers & psw | |
77fa2245 HC |
165 | .endm |
166 | ||
86f2552b MS |
167 | .macro CREATE_STACK_FRAME savearea |
168 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
1da177e4 | 169 | stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 |
86f2552b MS |
170 | mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack |
171 | stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack | |
25d83cbf | 172 | .endm |
1da177e4 | 173 | |
ae6aa2ea MS |
174 | .macro RESTORE_ALL psworg,sync |
175 | mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 176 | .if !\sync |
ae6aa2ea | 177 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 | 178 | .endif |
c742b31c MS |
179 | lg %r14,__LC_VDSO_PER_CPU |
180 | lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user | |
c185b783 | 181 | stpt __LC_EXIT_TIMER |
c742b31c MS |
182 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
183 | lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user | |
ae6aa2ea | 184 | lpswe \psworg # back to caller |
1da177e4 LT |
185 | .endm |
186 | ||
86f2552b MS |
187 | .macro LAST_BREAK |
188 | srag %r10,%r11,23 | |
189 | jz 0f | |
190 | stg %r11,__TI_last_break(%r12) | |
191 | 0: | |
192 | .endm | |
193 | ||
1e54622e MS |
194 | .macro REENABLE_IRQS |
195 | mvc __SF_EMPTY(1,%r15),SP_PSW(%r15) | |
196 | ni __SF_EMPTY(%r15),0xbf | |
197 | ssm __SF_EMPTY(%r15) | |
198 | .endm | |
199 | ||
1da177e4 LT |
200 | /* |
201 | * Scheduler resume function, called by switch_to | |
202 | * gpr2 = (task_struct *) prev | |
203 | * gpr3 = (task_struct *) next | |
204 | * Returns: | |
205 | * gpr2 = prev | |
206 | */ | |
25d83cbf | 207 | .globl __switch_to |
1da177e4 LT |
208 | __switch_to: |
209 | tm __THREAD_per+4(%r3),0xe8 # is the new process using per ? | |
210 | jz __switch_to_noper # if not we're fine | |
25d83cbf HC |
211 | stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff |
212 | clc __THREAD_per(24,%r3),__SF_EMPTY(%r15) | |
213 | je __switch_to_noper # we got away without bashing TLB's | |
214 | lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 215 | __switch_to_noper: |
25d83cbf | 216 | lg %r4,__THREAD_info(%r2) # get thread_info of prev |
77fa2245 HC |
217 | tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending? |
218 | jz __switch_to_no_mcck | |
219 | ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
220 | lg %r4,__THREAD_info(%r3) # get thread_info of next | |
221 | oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next | |
222 | __switch_to_no_mcck: | |
25d83cbf | 223 | stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
224 | stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
225 | lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
25d83cbf | 226 | lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task |
1da177e4 LT |
227 | stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct |
228 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 229 | lg %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
230 | stg %r3,__LC_THREAD_INFO |
231 | aghi %r3,STACK_SIZE | |
232 | stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
233 | br %r14 | |
234 | ||
235 | __critical_start: | |
236 | /* | |
237 | * SVC interrupt handler routine. System calls are synchronous events and | |
238 | * are executed with interrupts enabled. | |
239 | */ | |
240 | ||
25d83cbf | 241 | .globl system_call |
1da177e4 | 242 | system_call: |
c185b783 | 243 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 244 | sysc_saveall: |
987ad70a | 245 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
86f2552b MS |
246 | CREATE_STACK_FRAME __LC_SAVE_AREA |
247 | mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW | |
248 | mvc SP_ILC(4,%r15),__LC_SVC_ILC | |
86f2552b | 249 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct |
1da177e4 | 250 | sysc_vtime: |
1da177e4 LT |
251 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
252 | sysc_stime: | |
253 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
254 | sysc_update: | |
255 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
86f2552b | 256 | LAST_BREAK |
1da177e4 | 257 | sysc_do_svc: |
86f2552b MS |
258 | llgh %r7,SP_SVCNR(%r15) |
259 | slag %r7,%r7,2 # shift and test for svc 0 | |
1da177e4 LT |
260 | jnz sysc_nr_ok |
261 | # svc 0: system call number in %r1 | |
86f2552b MS |
262 | llgfr %r1,%r1 # clear high word in r1 |
263 | cghi %r1,NR_syscalls | |
1da177e4 | 264 | jnl sysc_nr_ok |
86f2552b MS |
265 | sth %r1,SP_SVCNR(%r15) |
266 | slag %r7,%r1,2 # shift and test for svc 0 | |
1da177e4 | 267 | sysc_nr_ok: |
25d83cbf | 268 | larl %r10,sys_call_table |
347a8dc3 | 269 | #ifdef CONFIG_COMPAT |
86f2552b | 270 | tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ? |
c563077e | 271 | jno sysc_noemu |
25d83cbf | 272 | larl %r10,sys_call_table_emu # use 31 bit emulation system calls |
1da177e4 LT |
273 | sysc_noemu: |
274 | #endif | |
86f2552b | 275 | tm __TI_flags+6(%r12),_TIF_SYSCALL |
baa07158 | 276 | mvc SP_ARGS(8,%r15),SP_R7(%r15) |
25d83cbf HC |
277 | lgf %r8,0(%r7,%r10) # load address of system call routine |
278 | jnz sysc_tracesys | |
279 | basr %r14,%r8 # call sys_xxxx | |
280 | stg %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
281 | |
282 | sysc_return: | |
6a2df3a8 MS |
283 | LOCKDEP_SYS_EXIT |
284 | sysc_tif: | |
86f2552b | 285 | tm __TI_flags+7(%r12),_TIF_WORK_SVC |
25d83cbf | 286 | jnz sysc_work # there is work to do (signals etc.) |
411788ea | 287 | sysc_restore: |
25d83cbf | 288 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
289 | sysc_done: |
290 | ||
1da177e4 | 291 | # |
43d399d2 | 292 | # There is work to do, but first we need to check if we return to userspace. |
1da177e4 LT |
293 | # |
294 | sysc_work: | |
2688905e MS |
295 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
296 | jno sysc_restore | |
43d399d2 MS |
297 | |
298 | # | |
299 | # One of the work bits is on. Find out which one. | |
300 | # | |
6a2df3a8 | 301 | sysc_work_tif: |
86f2552b | 302 | tm __TI_flags+7(%r12),_TIF_MCCK_PENDING |
77fa2245 | 303 | jo sysc_mcck_pending |
86f2552b | 304 | tm __TI_flags+7(%r12),_TIF_NEED_RESCHED |
1da177e4 | 305 | jo sysc_reschedule |
86f2552b | 306 | tm __TI_flags+7(%r12),_TIF_SIGPENDING |
43d399d2 | 307 | jo sysc_sigpending |
86f2552b | 308 | tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME |
43d399d2 | 309 | jo sysc_notify_resume |
86f2552b | 310 | tm __TI_flags+7(%r12),_TIF_RESTART_SVC |
1da177e4 | 311 | jo sysc_restart |
86f2552b | 312 | tm __TI_flags+7(%r12),_TIF_SINGLE_STEP |
1da177e4 | 313 | jo sysc_singlestep |
43d399d2 | 314 | j sysc_return # beware of critical section cleanup |
1da177e4 LT |
315 | |
316 | # | |
317 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
318 | # |
319 | sysc_reschedule: | |
6a2df3a8 MS |
320 | larl %r14,sysc_return |
321 | jg schedule # return point is sysc_return | |
1da177e4 | 322 | |
77fa2245 HC |
323 | # |
324 | # _TIF_MCCK_PENDING is set, call handler | |
325 | # | |
326 | sysc_mcck_pending: | |
6a2df3a8 | 327 | larl %r14,sysc_return |
25d83cbf | 328 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 329 | |
1da177e4 | 330 | # |
02a029b3 | 331 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 332 | # |
25d83cbf | 333 | sysc_sigpending: |
86f2552b | 334 | ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
335 | la %r2,SP_PTREGS(%r15) # load pt_regs |
336 | brasl %r14,do_signal # call do_signal | |
86f2552b | 337 | tm __TI_flags+7(%r12),_TIF_RESTART_SVC |
1da177e4 | 338 | jo sysc_restart |
86f2552b | 339 | tm __TI_flags+7(%r12),_TIF_SINGLE_STEP |
1da177e4 | 340 | jo sysc_singlestep |
6a2df3a8 | 341 | j sysc_return |
1da177e4 | 342 | |
753c4dd6 MS |
343 | # |
344 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
345 | # | |
346 | sysc_notify_resume: | |
347 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
6a2df3a8 | 348 | larl %r14,sysc_return |
753c4dd6 MS |
349 | jg do_notify_resume # call do_notify_resume |
350 | ||
1da177e4 LT |
351 | # |
352 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
353 | # | |
354 | sysc_restart: | |
86f2552b | 355 | ni __TI_flags+7(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC |
25d83cbf | 356 | lg %r7,SP_R2(%r15) # load new svc number |
1da177e4 | 357 | mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument |
25d83cbf | 358 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments |
86f2552b MS |
359 | sth %r7,SP_SVCNR(%r15) |
360 | slag %r7,%r7,2 | |
361 | j sysc_nr_ok # restart svc | |
1da177e4 LT |
362 | |
363 | # | |
364 | # _TIF_SINGLE_STEP is set, call do_single_step | |
365 | # | |
366 | sysc_singlestep: | |
86f2552b | 367 | ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
59da2139 | 368 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number |
1da177e4 | 369 | la %r2,SP_PTREGS(%r15) # address of register-save area |
6a2df3a8 | 370 | larl %r14,sysc_return # load adr. of system return |
1da177e4 LT |
371 | jg do_single_step # branch to do_sigtrap |
372 | ||
1da177e4 | 373 | # |
753c4dd6 MS |
374 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
375 | # and after the system call | |
1da177e4 LT |
376 | # |
377 | sysc_tracesys: | |
25d83cbf | 378 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 | 379 | la %r3,0 |
86f2552b MS |
380 | llgh %r0,SP_SVCNR(%r15) |
381 | stg %r0,SP_R2(%r15) | |
753c4dd6 | 382 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 383 | lghi %r0,NR_syscalls |
753c4dd6 | 384 | clgr %r0,%r2 |
1da177e4 | 385 | jnh sysc_tracenogo |
59da2139 | 386 | sllg %r7,%r2,2 # svc number *4 |
1da177e4 LT |
387 | lgf %r8,0(%r7,%r10) |
388 | sysc_tracego: | |
25d83cbf | 389 | lmg %r3,%r6,SP_R3(%r15) |
baa07158 | 390 | mvc SP_ARGS(8,%r15),SP_R7(%r15) |
25d83cbf HC |
391 | lg %r2,SP_ORIG_R2(%r15) |
392 | basr %r14,%r8 # call sys_xxx | |
393 | stg %r2,SP_R2(%r15) # store return value | |
1da177e4 | 394 | sysc_tracenogo: |
86f2552b | 395 | tm __TI_flags+6(%r12),_TIF_SYSCALL |
25d83cbf HC |
396 | jz sysc_return |
397 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf | 398 | larl %r14,sysc_return # return point is sysc_return |
753c4dd6 | 399 | jg do_syscall_trace_exit |
1da177e4 LT |
400 | |
401 | # | |
402 | # a new process exits the kernel with ret_from_fork | |
403 | # | |
25d83cbf | 404 | .globl ret_from_fork |
1da177e4 LT |
405 | ret_from_fork: |
406 | lg %r13,__LC_SVC_NEW_PSW+8 | |
86f2552b | 407 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct |
1da177e4 LT |
408 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? |
409 | jo 0f | |
410 | stg %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf | 411 | 0: brasl %r14,schedule_tail |
1f194a4c | 412 | TRACE_IRQS_ON |
25d83cbf | 413 | stosm 24(%r15),0x03 # reenable interrupts |
8f2961c3 | 414 | j sysc_tracenogo |
1da177e4 LT |
415 | |
416 | # | |
03ff9a23 MS |
417 | # kernel_execve function needs to deal with pt_regs that is not |
418 | # at the usual place | |
1da177e4 | 419 | # |
03ff9a23 MS |
420 | .globl kernel_execve |
421 | kernel_execve: | |
422 | stmg %r12,%r15,96(%r15) | |
423 | lgr %r14,%r15 | |
424 | aghi %r15,-SP_SIZE | |
425 | stg %r14,__SF_BACKCHAIN(%r15) | |
426 | la %r12,SP_PTREGS(%r15) | |
427 | xc 0(__PT_SIZE,%r12),0(%r12) | |
428 | lgr %r5,%r12 | |
429 | brasl %r14,do_execve | |
430 | ltgfr %r2,%r2 | |
431 | je 0f | |
432 | aghi %r15,SP_SIZE | |
433 | lmg %r12,%r15,96(%r15) | |
434 | br %r14 | |
435 | # execve succeeded. | |
436 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
437 | lg %r15,__LC_KERNEL_STACK # load ksp | |
438 | aghi %r15,-SP_SIZE # make room for registers & psw | |
439 | lg %r13,__LC_SVC_NEW_PSW+8 | |
03ff9a23 | 440 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs |
86f2552b | 441 | lg %r12,__LC_THREAD_INFO |
03ff9a23 MS |
442 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
443 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
444 | brasl %r14,execve_tail | |
445 | j sysc_return | |
1da177e4 LT |
446 | |
447 | /* | |
448 | * Program check handler routine | |
449 | */ | |
450 | ||
25d83cbf | 451 | .globl pgm_check_handler |
1da177e4 LT |
452 | pgm_check_handler: |
453 | /* | |
454 | * First we need to check for a special case: | |
455 | * Single stepping an instruction that disables the PER event mask will | |
456 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
457 | * For a single stepped SVC the program check handler gets control after | |
458 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
459 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
460 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
461 | * if we have to load the kernel stack register. | |
462 | * For every other possible cause for PER event without the PER mask set | |
463 | * we just ignore the PER event (FIXME: is there anything we have to do | |
464 | * for LPSW?). | |
465 | */ | |
c185b783 | 466 | stpt __LC_SYNC_ENTER_TIMER |
25d83cbf HC |
467 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
468 | jnz pgm_per # got per exception -> special case | |
86f2552b MS |
469 | SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
470 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
471 | xc SP_ILC(4,%r15),SP_ILC(%r15) | |
472 | mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW | |
473 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
474 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
475 | jz pgm_no_vtime | |
476 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
477 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
478 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
86f2552b | 479 | LAST_BREAK |
1da177e4 | 480 | pgm_no_vtime: |
cd3b70f5 | 481 | HANDLE_SIE_INTERCEPT |
86f2552b | 482 | stg %r11,SP_ARGS(%r15) |
25d83cbf | 483 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1e54622e MS |
484 | lg %r4,__LC_TRANS_EXC_CODE |
485 | REENABLE_IRQS | |
1da177e4 LT |
486 | lghi %r8,0x7f |
487 | ngr %r8,%r3 | |
25d83cbf HC |
488 | sll %r8,3 |
489 | larl %r1,pgm_check_table | |
490 | lg %r1,0(%r8,%r1) # load address of handler routine | |
491 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
6a2df3a8 MS |
492 | basr %r14,%r1 # branch to interrupt-handler |
493 | pgm_exit: | |
6a2df3a8 | 494 | j sysc_return |
1da177e4 LT |
495 | |
496 | # | |
497 | # handle per exception | |
498 | # | |
499 | pgm_per: | |
25d83cbf HC |
500 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
501 | jnz pgm_per_std # ok, normal per event from user space | |
1da177e4 | 502 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
503 | clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW |
504 | je pgm_svcper | |
1da177e4 | 505 | # no interesting special case, ignore PER event |
25d83cbf | 506 | lpswe __LC_PGM_OLD_PSW |
1da177e4 LT |
507 | |
508 | # | |
509 | # Normal per exception | |
510 | # | |
511 | pgm_per_std: | |
86f2552b MS |
512 | SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
513 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
514 | mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW | |
515 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
516 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
517 | jz pgm_no_vtime2 | |
518 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
519 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
520 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
86f2552b | 521 | LAST_BREAK |
1da177e4 | 522 | pgm_no_vtime2: |
cd3b70f5 | 523 | HANDLE_SIE_INTERCEPT |
86f2552b | 524 | lg %r1,__TI_task(%r12) |
4ba069b8 MG |
525 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
526 | jz kernel_per | |
1da177e4 LT |
527 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID |
528 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
529 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
86f2552b | 530 | oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP |
25d83cbf | 531 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1e54622e MS |
532 | lg %r4,__LC_TRANS_EXC_CODE |
533 | REENABLE_IRQS | |
1da177e4 | 534 | lghi %r8,0x7f |
25d83cbf | 535 | ngr %r8,%r3 # clear per-event-bit and ilc |
f5cdac27 HC |
536 | je pgm_exit2 |
537 | sll %r8,3 | |
538 | larl %r1,pgm_check_table | |
539 | lg %r1,0(%r8,%r1) # load address of handler routine | |
540 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
541 | basr %r14,%r1 # branch to interrupt-handler | |
542 | pgm_exit2: | |
f5cdac27 | 543 | j sysc_return |
1da177e4 LT |
544 | |
545 | # | |
546 | # it was a single stepped SVC that is causing all the trouble | |
547 | # | |
548 | pgm_svcper: | |
86f2552b MS |
549 | SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
550 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
551 | mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW | |
552 | mvc SP_ILC(4,%r15),__LC_SVC_ILC | |
553 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
554 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
555 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
556 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
86f2552b | 557 | LAST_BREAK |
86f2552b | 558 | lg %r8,__TI_task(%r12) |
bcc6525f CB |
559 | mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID |
560 | mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS | |
561 | mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID | |
86f2552b | 562 | oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP |
1da177e4 | 563 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
6a2df3a8 | 564 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments |
1da177e4 LT |
565 | j sysc_do_svc |
566 | ||
4ba069b8 MG |
567 | # |
568 | # per was called from kernel, must be kprobes | |
569 | # | |
570 | kernel_per: | |
59da2139 | 571 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number |
4ba069b8 | 572 | la %r2,SP_PTREGS(%r15) # address of register-save area |
6a2df3a8 MS |
573 | brasl %r14,do_single_step |
574 | j pgm_exit | |
4ba069b8 | 575 | |
1da177e4 LT |
576 | /* |
577 | * IO interrupt handler routine | |
578 | */ | |
25d83cbf | 579 | .globl io_int_handler |
1da177e4 | 580 | io_int_handler: |
1da177e4 | 581 | stck __LC_INT_CLOCK |
9cfb9b3c | 582 | stpt __LC_ASYNC_ENTER_TIMER |
86f2552b MS |
583 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40 |
584 | CREATE_STACK_FRAME __LC_SAVE_AREA+40 | |
585 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack | |
586 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
587 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
588 | jz io_no_vtime | |
589 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
590 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
591 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
86f2552b | 592 | LAST_BREAK |
1da177e4 | 593 | io_no_vtime: |
cd3b70f5 | 594 | HANDLE_SIE_INTERCEPT |
1f194a4c | 595 | TRACE_IRQS_OFF |
25d83cbf HC |
596 | la %r2,SP_PTREGS(%r15) # address of register-save area |
597 | brasl %r14,do_IRQ # call standard irq handler | |
1da177e4 | 598 | io_return: |
6a2df3a8 MS |
599 | LOCKDEP_SYS_EXIT |
600 | TRACE_IRQS_ON | |
601 | io_tif: | |
86f2552b | 602 | tm __TI_flags+7(%r12),_TIF_WORK_INT |
25d83cbf | 603 | jnz io_work # there is work to do (signals etc.) |
411788ea | 604 | io_restore: |
25d83cbf | 605 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 606 | io_done: |
1da177e4 | 607 | |
2688905e | 608 | # |
43d399d2 MS |
609 | # There is work todo, find out in which context we have been interrupted: |
610 | # 1) if we return to user space we can do all _TIF_WORK_INT work | |
611 | # 2) if we return to kernel code and kvm is enabled check if we need to | |
612 | # modify the psw to leave SIE | |
613 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
614 | # the preemption counter and if it is zero call preempt_schedule_irq | |
615 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e MS |
616 | # |
617 | io_work: | |
618 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
43d399d2 | 619 | jo io_work_user # yes -> do resched & signal |
43d399d2 | 620 | #ifdef CONFIG_PREEMPT |
2688905e | 621 | # check for preemptive scheduling |
86f2552b | 622 | icm %r0,15,__TI_precount(%r12) |
2688905e | 623 | jnz io_restore # preemption is disabled |
6a2df3a8 MS |
624 | tm __TI_flags+7(%r12),_TIF_NEED_RESCHED |
625 | jno io_restore | |
1da177e4 LT |
626 | # switch to kernel stack |
627 | lg %r1,SP_R15(%r15) | |
628 | aghi %r1,-SP_SIZE | |
629 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 630 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 | 631 | lgr %r15,%r1 |
6a2df3a8 MS |
632 | # TRACE_IRQS_ON already done at io_return, call |
633 | # TRACE_IRQS_OFF to keep things symmetrical | |
634 | TRACE_IRQS_OFF | |
635 | brasl %r14,preempt_schedule_irq | |
636 | j io_return | |
637 | #else | |
43d399d2 | 638 | j io_restore |
6a2df3a8 | 639 | #endif |
1da177e4 | 640 | |
43d399d2 MS |
641 | # |
642 | # Need to do work before returning to userspace, switch to kernel stack | |
643 | # | |
2688905e | 644 | io_work_user: |
1da177e4 LT |
645 | lg %r1,__LC_KERNEL_STACK |
646 | aghi %r1,-SP_SIZE | |
647 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 648 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 | 649 | lgr %r15,%r1 |
43d399d2 | 650 | |
1da177e4 LT |
651 | # |
652 | # One of the work bits is on. Find out which one. | |
43d399d2 | 653 | # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED |
54dfe5dd | 654 | # and _TIF_MCCK_PENDING |
1da177e4 | 655 | # |
6a2df3a8 | 656 | io_work_tif: |
86f2552b | 657 | tm __TI_flags+7(%r12),_TIF_MCCK_PENDING |
77fa2245 | 658 | jo io_mcck_pending |
86f2552b | 659 | tm __TI_flags+7(%r12),_TIF_NEED_RESCHED |
1da177e4 | 660 | jo io_reschedule |
86f2552b | 661 | tm __TI_flags+7(%r12),_TIF_SIGPENDING |
43d399d2 | 662 | jo io_sigpending |
86f2552b | 663 | tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME |
43d399d2 MS |
664 | jo io_notify_resume |
665 | j io_return # beware of critical section cleanup | |
0eaeafa1 | 666 | |
77fa2245 HC |
667 | # |
668 | # _TIF_MCCK_PENDING is set, call handler | |
669 | # | |
670 | io_mcck_pending: | |
6a2df3a8 | 671 | # TRACE_IRQS_ON already done at io_return |
b771aeac | 672 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 MS |
673 | TRACE_IRQS_OFF |
674 | j io_return | |
77fa2245 | 675 | |
1da177e4 LT |
676 | # |
677 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
678 | # |
679 | io_reschedule: | |
6a2df3a8 | 680 | # TRACE_IRQS_ON already done at io_return |
25d83cbf HC |
681 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
682 | brasl %r14,schedule # call scheduler | |
683 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 684 | TRACE_IRQS_OFF |
6a2df3a8 | 685 | j io_return |
1da177e4 LT |
686 | |
687 | # | |
02a029b3 | 688 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 689 | # |
25d83cbf | 690 | io_sigpending: |
6a2df3a8 | 691 | # TRACE_IRQS_ON already done at io_return |
25d83cbf HC |
692 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
693 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 | 694 | brasl %r14,do_signal # call do_signal |
25d83cbf | 695 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts |
411788ea | 696 | TRACE_IRQS_OFF |
6a2df3a8 | 697 | j io_return |
1da177e4 | 698 | |
753c4dd6 MS |
699 | # |
700 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
701 | # | |
702 | io_notify_resume: | |
6a2df3a8 | 703 | # TRACE_IRQS_ON already done at io_return |
753c4dd6 MS |
704 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
705 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
706 | brasl %r14,do_notify_resume # call do_notify_resume | |
707 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
708 | TRACE_IRQS_OFF | |
6a2df3a8 | 709 | j io_return |
753c4dd6 | 710 | |
1da177e4 LT |
711 | /* |
712 | * External interrupt handler routine | |
713 | */ | |
25d83cbf | 714 | .globl ext_int_handler |
1da177e4 | 715 | ext_int_handler: |
1da177e4 | 716 | stck __LC_INT_CLOCK |
9cfb9b3c | 717 | stpt __LC_ASYNC_ENTER_TIMER |
86f2552b MS |
718 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40 |
719 | CREATE_STACK_FRAME __LC_SAVE_AREA+40 | |
720 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack | |
721 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
722 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
723 | jz ext_no_vtime | |
724 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
725 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
726 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
86f2552b | 727 | LAST_BREAK |
1da177e4 | 728 | ext_no_vtime: |
cd3b70f5 | 729 | HANDLE_SIE_INTERCEPT |
1f194a4c | 730 | TRACE_IRQS_OFF |
f6649a7e | 731 | lghi %r1,4096 |
25d83cbf | 732 | la %r2,SP_PTREGS(%r15) # address of register-save area |
f6649a7e MS |
733 | llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code |
734 | llgf %r4,__LC_EXT_PARAMS # get external parameter | |
735 | lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter | |
25d83cbf | 736 | brasl %r14,do_extint |
1da177e4 LT |
737 | j io_return |
738 | ||
ae6aa2ea MS |
739 | __critical_end: |
740 | ||
1da177e4 LT |
741 | /* |
742 | * Machine check handler routines | |
743 | */ | |
25d83cbf | 744 | .globl mcck_int_handler |
1da177e4 | 745 | mcck_int_handler: |
6377981f | 746 | stck __LC_MCCK_CLOCK |
77fa2245 HC |
747 | la %r1,4095 # revalidate r1 |
748 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 749 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
86f2552b MS |
750 | stmg %r11,%r15,__LC_SAVE_AREA+80 |
751 | larl %r13,system_call | |
752 | lg %r11,__LC_LAST_BREAK | |
77fa2245 | 753 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 754 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 755 | jo mcck_int_main # yes -> rest of mcck code invalid |
63b12246 | 756 | la %r14,4095 |
6377981f | 757 | mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) |
63b12246 MS |
758 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? |
759 | jo 1f | |
760 | la %r14,__LC_SYNC_ENTER_TIMER | |
761 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
762 | jl 0f | |
763 | la %r14,__LC_ASYNC_ENTER_TIMER | |
764 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
765 | jl 0f | |
766 | la %r14,__LC_EXIT_TIMER | |
767 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
768 | jl 0f | |
769 | la %r14,__LC_LAST_UPDATE_TIMER | |
770 | 0: spt 0(%r14) | |
6377981f | 771 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
c185b783 | 772 | 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 | 773 | jno mcck_int_main # no -> skip cleanup critical |
25d83cbf | 774 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit |
77fa2245 HC |
775 | jnz mcck_int_main # from user -> load kernel stack |
776 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) | |
777 | jhe mcck_int_main | |
25d83cbf | 778 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) |
77fa2245 | 779 | jl mcck_int_main |
25d83cbf | 780 | brasl %r14,cleanup_critical |
77fa2245 | 781 | mcck_int_main: |
25d83cbf | 782 | lg %r14,__LC_PANIC_STACK # are we already on the panic stack? |
77fa2245 HC |
783 | slgr %r14,%r15 |
784 | srag %r14,%r14,PAGE_SHIFT | |
785 | jz 0f | |
25d83cbf | 786 | lg %r15,__LC_PANIC_STACK # load panic stack |
86f2552b MS |
787 | 0: aghi %r15,-SP_SIZE # make room for registers & psw |
788 | CREATE_STACK_FRAME __LC_SAVE_AREA+80 | |
789 | mvc SP_PSW(16,%r15),0(%r12) | |
790 | lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
ae6aa2ea MS |
791 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
792 | jno mcck_no_vtime # no -> no timer update | |
63b12246 | 793 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea | 794 | jz mcck_no_vtime |
6377981f | 795 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER |
ae6aa2ea | 796 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER |
6377981f | 797 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER |
86f2552b | 798 | LAST_BREAK |
ae6aa2ea | 799 | mcck_no_vtime: |
77fa2245 HC |
800 | la %r2,SP_PTREGS(%r15) # load pt_regs |
801 | brasl %r14,s390_do_machine_check | |
25d83cbf | 802 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
77fa2245 HC |
803 | jno mcck_return |
804 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack | |
805 | aghi %r1,-SP_SIZE | |
806 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
807 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
808 | lgr %r15,%r1 | |
809 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
86f2552b | 810 | tm __TI_flags+7(%r12),_TIF_MCCK_PENDING |
77fa2245 | 811 | jno mcck_return |
cd3b70f5 | 812 | HANDLE_SIE_INTERCEPT |
1f194a4c | 813 | TRACE_IRQS_OFF |
77fa2245 | 814 | brasl %r14,s390_handle_mcck |
1f194a4c | 815 | TRACE_IRQS_ON |
1da177e4 | 816 | mcck_return: |
63b12246 MS |
817 | mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW |
818 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
819 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
63b12246 MS |
820 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
821 | jno 0f | |
822 | stpt __LC_EXIT_TIMER | |
c185b783 | 823 | 0: lpswe __LC_RETURN_MCCK_PSW # back to caller |
86f2552b | 824 | mcck_done: |
1da177e4 | 825 | |
1da177e4 LT |
826 | /* |
827 | * Restart interruption handler, kick starter for additional CPUs | |
828 | */ | |
84b36a8e | 829 | #ifdef CONFIG_SMP |
2bc89b5e | 830 | __CPUINIT |
25d83cbf | 831 | .globl restart_int_handler |
1da177e4 | 832 | restart_int_handler: |
5b409ed1 MS |
833 | basr %r1,0 |
834 | restart_base: | |
835 | spt restart_vtime-restart_base(%r1) | |
836 | stck __LC_LAST_UPDATE_CLOCK | |
837 | mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) | |
838 | mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) | |
25d83cbf HC |
839 | lg %r15,__LC_SAVE_AREA+120 # load ksp |
840 | lghi %r10,__LC_CREGS_SAVE_AREA | |
841 | lctlg %c0,%c15,0(%r10) # get new ctl regs | |
842 | lghi %r10,__LC_AREGS_SAVE_AREA | |
843 | lam %a0,%a15,0(%r10) | |
844 | lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
5b409ed1 MS |
845 | lg %r1,__LC_THREAD_INFO |
846 | mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) | |
847 | mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) | |
848 | xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER | |
25d83cbf HC |
849 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on |
850 | jg start_secondary | |
5b409ed1 MS |
851 | .align 8 |
852 | restart_vtime: | |
853 | .long 0x7fffffff,0xffffffff | |
84b36a8e | 854 | .previous |
1da177e4 LT |
855 | #else |
856 | /* | |
857 | * If we do not run with SMP enabled, let the new CPU crash ... | |
858 | */ | |
25d83cbf | 859 | .globl restart_int_handler |
1da177e4 | 860 | restart_int_handler: |
25d83cbf | 861 | basr %r1,0 |
1da177e4 | 862 | restart_base: |
25d83cbf HC |
863 | lpswe restart_crash-restart_base(%r1) |
864 | .align 8 | |
1da177e4 | 865 | restart_crash: |
25d83cbf | 866 | .long 0x000a0000,0x00000000,0x00000000,0x00000000 |
1da177e4 LT |
867 | restart_go: |
868 | #endif | |
869 | ||
870 | #ifdef CONFIG_CHECK_STACK | |
871 | /* | |
872 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
873 | * No need to properly save the registers, we are going to panic anyway. | |
874 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
875 | */ | |
876 | stack_overflow: | |
877 | lg %r15,__LC_PANIC_STACK # change to panic stack | |
9514e231 | 878 | aghi %r15,-SP_SIZE |
1da177e4 | 879 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack |
86f2552b | 880 | stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack |
1da177e4 LT |
881 | la %r1,__LC_SAVE_AREA |
882 | chi %r12,__LC_SVC_OLD_PSW | |
883 | je 0f | |
884 | chi %r12,__LC_PGM_OLD_PSW | |
885 | je 0f | |
86f2552b MS |
886 | la %r1,__LC_SAVE_AREA+40 |
887 | 0: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack | |
9e74a6b8 | 888 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
25d83cbf HC |
889 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
890 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
891 | jg kernel_stack_overflow |
892 | #endif | |
893 | ||
894 | cleanup_table_system_call: | |
895 | .quad system_call, sysc_do_svc | |
6a2df3a8 MS |
896 | cleanup_table_sysc_tif: |
897 | .quad sysc_tif, sysc_restore | |
898 | cleanup_table_sysc_restore: | |
899 | .quad sysc_restore, sysc_done | |
900 | cleanup_table_io_tif: | |
901 | .quad io_tif, io_restore | |
902 | cleanup_table_io_restore: | |
903 | .quad io_restore, io_done | |
1da177e4 LT |
904 | |
905 | cleanup_critical: | |
906 | clc 8(8,%r12),BASED(cleanup_table_system_call) | |
907 | jl 0f | |
908 | clc 8(8,%r12),BASED(cleanup_table_system_call+8) | |
909 | jl cleanup_system_call | |
910 | 0: | |
6a2df3a8 | 911 | clc 8(8,%r12),BASED(cleanup_table_sysc_tif) |
1da177e4 | 912 | jl 0f |
6a2df3a8 MS |
913 | clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8) |
914 | jl cleanup_sysc_tif | |
1da177e4 | 915 | 0: |
6a2df3a8 | 916 | clc 8(8,%r12),BASED(cleanup_table_sysc_restore) |
1da177e4 | 917 | jl 0f |
6a2df3a8 MS |
918 | clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8) |
919 | jl cleanup_sysc_restore | |
63b12246 | 920 | 0: |
6a2df3a8 | 921 | clc 8(8,%r12),BASED(cleanup_table_io_tif) |
63b12246 | 922 | jl 0f |
6a2df3a8 MS |
923 | clc 8(8,%r12),BASED(cleanup_table_io_tif+8) |
924 | jl cleanup_io_tif | |
ae6aa2ea | 925 | 0: |
6a2df3a8 | 926 | clc 8(8,%r12),BASED(cleanup_table_io_restore) |
ae6aa2ea | 927 | jl 0f |
6a2df3a8 MS |
928 | clc 8(8,%r12),BASED(cleanup_table_io_restore+8) |
929 | jl cleanup_io_restore | |
1da177e4 LT |
930 | 0: |
931 | br %r14 | |
932 | ||
933 | cleanup_system_call: | |
934 | mvc __LC_RETURN_PSW(16),0(%r12) | |
1da177e4 LT |
935 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) |
936 | jh 0f | |
6377981f MS |
937 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
938 | cghi %r12,__LC_MCK_OLD_PSW | |
939 | je 0f | |
1da177e4 | 940 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER |
6377981f | 941 | 0: cghi %r12,__LC_MCK_OLD_PSW |
86f2552b | 942 | la %r12,__LC_SAVE_AREA+80 |
6377981f | 943 | je 0f |
86f2552b | 944 | la %r12,__LC_SAVE_AREA+40 |
1da177e4 LT |
945 | 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) |
946 | jhe cleanup_vtime | |
1da177e4 LT |
947 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) |
948 | jh 0f | |
86f2552b MS |
949 | mvc __LC_SAVE_AREA(40),0(%r12) |
950 | 0: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
951 | aghi %r15,-SP_SIZE # make room for registers & psw | |
952 | stg %r15,32(%r12) | |
953 | stg %r11,0(%r12) | |
954 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
955 | mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW | |
956 | mvc SP_ILC(4,%r15),__LC_SVC_ILC | |
86f2552b | 957 | mvc 8(8,%r12),__LC_THREAD_INFO |
1da177e4 LT |
958 | cleanup_vtime: |
959 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) | |
960 | jhe cleanup_stime | |
1da177e4 LT |
961 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
962 | cleanup_stime: | |
963 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) | |
964 | jh cleanup_update | |
965 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
966 | cleanup_update: | |
967 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
86f2552b MS |
968 | srag %r12,%r11,23 |
969 | lg %r12,__LC_THREAD_INFO | |
970 | jz 0f | |
971 | stg %r11,__TI_last_break(%r12) | |
972 | 0: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) | |
1da177e4 LT |
973 | la %r12,__LC_RETURN_PSW |
974 | br %r14 | |
975 | cleanup_system_call_insn: | |
976 | .quad sysc_saveall | |
25d83cbf HC |
977 | .quad system_call |
978 | .quad sysc_vtime | |
979 | .quad sysc_stime | |
980 | .quad sysc_update | |
1da177e4 | 981 | |
6a2df3a8 | 982 | cleanup_sysc_tif: |
1da177e4 | 983 | mvc __LC_RETURN_PSW(8),0(%r12) |
6a2df3a8 | 984 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif) |
1da177e4 LT |
985 | la %r12,__LC_RETURN_PSW |
986 | br %r14 | |
987 | ||
6a2df3a8 MS |
988 | cleanup_sysc_restore: |
989 | clc 8(8,%r12),BASED(cleanup_sysc_restore_insn) | |
6377981f | 990 | je 2f |
6a2df3a8 | 991 | clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8) |
c742b31c | 992 | jhe 0f |
6377981f MS |
993 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER |
994 | cghi %r12,__LC_MCK_OLD_PSW | |
995 | je 0f | |
c742b31c MS |
996 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
997 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | |
ae6aa2ea | 998 | cghi %r12,__LC_MCK_OLD_PSW |
86f2552b | 999 | la %r12,__LC_SAVE_AREA+80 |
6377981f | 1000 | je 1f |
86f2552b MS |
1001 | la %r12,__LC_SAVE_AREA+40 |
1002 | 1: mvc 0(40,%r12),SP_R11(%r15) | |
1003 | lmg %r0,%r10,SP_R0(%r15) | |
1da177e4 | 1004 | lg %r15,SP_R15(%r15) |
6377981f | 1005 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 | 1006 | br %r14 |
6a2df3a8 | 1007 | cleanup_sysc_restore_insn: |
411788ea | 1008 | .quad sysc_done - 4 |
c742b31c | 1009 | .quad sysc_done - 16 |
1da177e4 | 1010 | |
6a2df3a8 | 1011 | cleanup_io_tif: |
176b1803 | 1012 | mvc __LC_RETURN_PSW(8),0(%r12) |
6a2df3a8 | 1013 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif) |
176b1803 MS |
1014 | la %r12,__LC_RETURN_PSW |
1015 | br %r14 | |
1016 | ||
6a2df3a8 MS |
1017 | cleanup_io_restore: |
1018 | clc 8(8,%r12),BASED(cleanup_io_restore_insn) | |
6377981f | 1019 | je 1f |
6a2df3a8 | 1020 | clc 8(8,%r12),BASED(cleanup_io_restore_insn+8) |
c742b31c | 1021 | jhe 0f |
6377981f | 1022 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER |
c742b31c | 1023 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) |
86f2552b MS |
1024 | mvc __LC_SAVE_AREA+80(40),SP_R11(%r15) |
1025 | lmg %r0,%r10,SP_R0(%r15) | |
ae6aa2ea | 1026 | lg %r15,SP_R15(%r15) |
6377981f | 1027 | 1: la %r12,__LC_RETURN_PSW |
ae6aa2ea | 1028 | br %r14 |
6a2df3a8 | 1029 | cleanup_io_restore_insn: |
411788ea | 1030 | .quad io_done - 4 |
c742b31c | 1031 | .quad io_done - 16 |
ae6aa2ea | 1032 | |
1da177e4 LT |
1033 | /* |
1034 | * Integer constants | |
1035 | */ | |
25d83cbf | 1036 | .align 4 |
1da177e4 | 1037 | .Lcritical_start: |
25d83cbf | 1038 | .quad __critical_start |
1da177e4 | 1039 | .Lcritical_end: |
25d83cbf | 1040 | .quad __critical_end |
1da177e4 | 1041 | |
25d83cbf | 1042 | .section .rodata, "a" |
1da177e4 | 1043 | #define SYSCALL(esa,esame,emu) .long esame |
9bf1226b | 1044 | .globl sys_call_table |
1da177e4 LT |
1045 | sys_call_table: |
1046 | #include "syscalls.S" | |
1047 | #undef SYSCALL | |
1048 | ||
347a8dc3 | 1049 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
1050 | |
1051 | #define SYSCALL(esa,esame,emu) .long emu | |
1da177e4 LT |
1052 | sys_call_table_emu: |
1053 | #include "syscalls.S" | |
1054 | #undef SYSCALL | |
1055 | #endif |