[deliverable/linux.git] / arch / s390 / kernel / irq.c

/*
 *    Copyright IBM Corp. 2004,2011
 *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
 *		 Holger Smolinski <Holger.Smolinski@de.ibm.com>,
 *		 Thomas Spatzier <tspat@de.ibm.com>,
 *
 * This file contains interrupt related functions.
 */

#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <linux/seq_file.h>
#include <linux/proc_fs.h>
#include <linux/profile.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/ftrace.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/cpu.h>
#include <asm/irq_regs.h>
#include <asm/cputime.h>
#include <asm/lowcore.h>
#include <asm/irq.h>
#include "entry.h"

struct irq_class {
	char *name;
	char *desc;
};

static const struct irq_class intrclass_names[] = {
	{.name = "EXT" },
	{.name = "I/O" },
	{.name = "CLK", .desc = "[EXT] Clock Comparator" },
	{.name = "EXC", .desc = "[EXT] External Call" },
	{.name = "EMS", .desc = "[EXT] Emergency Signal" },
	{.name = "TMR", .desc = "[EXT] CPU Timer" },
	{.name = "TAL", .desc = "[EXT] Timing Alert" },
	{.name = "PFL", .desc = "[EXT] Pseudo Page Fault" },
	{.name = "DSD", .desc = "[EXT] DASD Diag" },
	{.name = "VRT", .desc = "[EXT] Virtio" },
	{.name = "SCP", .desc = "[EXT] Service Call" },
	{.name = "IUC", .desc = "[EXT] IUCV" },
	{.name = "CPM", .desc = "[EXT] CPU Measurement" },
	{.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt" },
	{.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt" },
	{.name = "DAS", .desc = "[I/O] DASD" },
	{.name = "C15", .desc = "[I/O] 3215" },
	{.name = "C70", .desc = "[I/O] 3270" },
	{.name = "TAP", .desc = "[I/O] Tape" },
	{.name = "VMR", .desc = "[I/O] Unit Record Devices" },
	{.name = "LCS", .desc = "[I/O] LCS" },
	{.name = "CLW", .desc = "[I/O] CLAW" },
	{.name = "CTC", .desc = "[I/O] CTC" },
	{.name = "APB", .desc = "[I/O] AP Bus" },
	{.name = "CSC", .desc = "[I/O] CHSC Subchannel" },
	{.name = "NMI", .desc = "[NMI] Machine Check" },
};

/*
 * show_interrupts is needed by /proc/interrupts.
 */
int show_interrupts(struct seq_file *p, void *v)
{
	int i = *(loff_t *) v, j;

	get_online_cpus();
	if (i == 0) {
		seq_puts(p, "           ");
		for_each_online_cpu(j)
			seq_printf(p, "CPU%d       ",j);
		seq_putc(p, '\n');
	}

	if (i < NR_IRQS) {
		seq_printf(p, "%s: ", intrclass_names[i].name);
#ifndef CONFIG_SMP
		seq_printf(p, "%10u ", kstat_irqs(i));
#else
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
#endif
		if (intrclass_names[i].desc)
			seq_printf(p, "  %s", intrclass_names[i].desc);
                seq_putc(p, '\n');
        }
	put_online_cpus();
        return 0;
}

/*
 * Switch to the asynchronous interrupt stack for softirq execution.
 */
asmlinkage void do_softirq(void)
{
	unsigned long flags, old, new;

	if (in_interrupt())
		return;

	local_irq_save(flags);

	if (local_softirq_pending()) {
		/* Get current stack pointer. */
		asm volatile("la %0,0(15)" : "=a" (old));
		/* Check against async. stack address range. */
		new = S390_lowcore.async_stack;
		if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
			/* Need to switch to the async. stack. */
			new -= STACK_FRAME_OVERHEAD;
			((struct stack_frame *) new)->back_chain = old;

			asm volatile("   la    15,0(%0)\n"
				     "   basr  14,%2\n"
				     "   la    15,0(%1)\n"
				     : : "a" (new), "a" (old),
				         "a" (__do_softirq)
				     : "0", "1", "2", "3", "4", "5", "14",
				       "cc", "memory" );
		} else
			/* We are already on the async stack. */
			__do_softirq();
	}

	local_irq_restore(flags);
}

#ifdef CONFIG_PROC_FS
void init_irq_proc(void)
{
	struct proc_dir_entry *root_irq_dir;

	root_irq_dir = proc_mkdir("irq", NULL);
	create_prof_cpu_mask(root_irq_dir);
}
#endif

/*
 * ext_int_hash[index] is the list head for all external interrupts that hash
 * to this index.
 */
static struct list_head ext_int_hash[256];

struct ext_int_info {
	ext_int_handler_t handler;
	u16 code;
	struct list_head entry;
	struct rcu_head rcu;
};

/* ext_int_hash_lock protects the handler lists for external interrupts */
DEFINE_SPINLOCK(ext_int_hash_lock);

static void __init init_external_interrupts(void)
{
	int idx;

	for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
		INIT_LIST_HEAD(&ext_int_hash[idx]);
}

static inline int ext_hash(u16 code)
{
	return (code + (code >> 9)) & 0xff;
}

int register_external_interrupt(u16 code, ext_int_handler_t handler)
{
	struct ext_int_info *p;
	unsigned long flags;
	int index;

	p = kmalloc(sizeof(*p), GFP_ATOMIC);
	if (!p)
		return -ENOMEM;
	p->code = code;
	p->handler = handler;
	index = ext_hash(code);

	spin_lock_irqsave(&ext_int_hash_lock, flags);
	list_add_rcu(&p->entry, &ext_int_hash[index]);
	spin_unlock_irqrestore(&ext_int_hash_lock, flags);
	return 0;
}
EXPORT_SYMBOL(register_external_interrupt);

int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
{
	struct ext_int_info *p;
	unsigned long flags;
	int index = ext_hash(code);

	spin_lock_irqsave(&ext_int_hash_lock, flags);
	list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
		if (p->code == code && p->handler == handler) {
			list_del_rcu(&p->entry);
			kfree_rcu(p, rcu);
		}
	spin_unlock_irqrestore(&ext_int_hash_lock, flags);
	return 0;
}
EXPORT_SYMBOL(unregister_external_interrupt);

void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
			   unsigned int param32, unsigned long param64)
{
	struct pt_regs *old_regs;
	struct ext_int_info *p;
	int index;

	old_regs = set_irq_regs(regs);
	irq_enter();
	if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
		/* Serve timer interrupts first. */
		clock_comparator_work();
	kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
	if (ext_code.code != 0x1004)
		__get_cpu_var(s390_idle).nohz_delay = 1;

	index = ext_hash(ext_code.code);
	rcu_read_lock();
	list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
		if (likely(p->code == ext_code.code))
			p->handler(ext_code, param32, param64);
	rcu_read_unlock();
	irq_exit();
	set_irq_regs(old_regs);
}

void __init init_IRQ(void)
{
	init_external_interrupts();
}

static DEFINE_SPINLOCK(sc_irq_lock);
static int sc_irq_refcount;

void service_subclass_irq_register(void)
{
	spin_lock(&sc_irq_lock);
	if (!sc_irq_refcount)
		ctl_set_bit(0, 9);
	sc_irq_refcount++;
	spin_unlock(&sc_irq_lock);
}
EXPORT_SYMBOL(service_subclass_irq_register);

void service_subclass_irq_unregister(void)
{
	spin_lock(&sc_irq_lock);
	sc_irq_refcount--;
	if (!sc_irq_refcount)
		ctl_clear_bit(0, 9);
	spin_unlock(&sc_irq_lock);
}
EXPORT_SYMBOL(service_subclass_irq_unregister);
Commit	Line	Data
1da177e4	1	/*
d7b250e2 HC	2	* Copyright IBM Corp. 2004,2011
	3	* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
	4	* Holger Smolinski <Holger.Smolinski@de.ibm.com>,
	5	* Thomas Spatzier <tspat@de.ibm.com>,
1da177e4 LT	6	*
	7	* This file contains interrupt related functions.
	8	*/
	9
1da177e4 LT	10	#include <linux/kernel_stat.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/seq_file.h>
55dff522 HC	13	#include <linux/proc_fs.h>
55dff522 HC	14	#include <linux/profile.h>
d7b250e2 HC	15	#include <linux/module.h>
	16	#include <linux/kernel.h>
	17	#include <linux/ftrace.h>
	18	#include <linux/errno.h>
	19	#include <linux/slab.h>
	20	#include <linux/cpu.h>
	21	#include <asm/irq_regs.h>
	22	#include <asm/cputime.h>
	23	#include <asm/lowcore.h>
	24	#include <asm/irq.h>
	25	#include "entry.h"
1da177e4	26
052ff461 HC	27	struct irq_class {
	28	char *name;
	29	char *desc;
	30	};
	31
	32	static const struct irq_class intrclass_names[] = {
	33	{.name = "EXT" },
	34	{.name = "I/O" },
	35	{.name = "CLK", .desc = "[EXT] Clock Comparator" },
2a3a2d66 HC	36	{.name = "EXC", .desc = "[EXT] External Call" },
2a3a2d66 HC	37	{.name = "EMS", .desc = "[EXT] Emergency Signal" },
052ff461 HC	38	{.name = "TMR", .desc = "[EXT] CPU Timer" },
	39	{.name = "TAL", .desc = "[EXT] Timing Alert" },
	40	{.name = "PFL", .desc = "[EXT] Pseudo Page Fault" },
	41	{.name = "DSD", .desc = "[EXT] DASD Diag" },
	42	{.name = "VRT", .desc = "[EXT] Virtio" },
	43	{.name = "SCP", .desc = "[EXT] Service Call" },
	44	{.name = "IUC", .desc = "[EXT] IUCV" },
fcdd65b0	45	{.name = "CPM", .desc = "[EXT] CPU Measurement" },
de400d6b	46	{.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt" },
30d77c3e	47	{.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt" },
3283942b	48	{.name = "DAS", .desc = "[I/O] DASD" },
12fae585	49	{.name = "C15", .desc = "[I/O] 3215" },
3fe22f6b	50	{.name = "C70", .desc = "[I/O] 3270" },
b8665172	51	{.name = "TAP", .desc = "[I/O] Tape" },
f48198d5	52	{.name = "VMR", .desc = "[I/O] Unit Record Devices" },
096a6168	53	{.name = "LCS", .desc = "[I/O] LCS" },
355eb402	54	{.name = "CLW", .desc = "[I/O] CLAW" },
85b81cdd	55	{.name = "CTC", .desc = "[I/O] CTC" },
62d146ff	56	{.name = "APB", .desc = "[I/O] AP Bus" },
65b4e403	57	{.name = "CSC", .desc = "[I/O] CHSC Subchannel" },
052ff461 HC	58	{.name = "NMI", .desc = "[NMI] Machine Check" },
	59	};
	60
1da177e4 LT	61	/*
	62	* show_interrupts is needed by /proc/interrupts.
	63	*/
	64	int show_interrupts(struct seq_file p, void v)
	65	{
1da177e4 LT	66	int i = (loff_t ) v, j;
1da177e4 LT	67
8dd79cb1	68	get_online_cpus();
1da177e4 LT	69	if (i == 0) {
	70	seq_puts(p, " ");
	71	for_each_online_cpu(j)
	72	seq_printf(p, "CPU%d ",j);
	73	seq_putc(p, '\n');
	74	}
	75
	76	if (i < NR_IRQS) {
052ff461	77	seq_printf(p, "%s: ", intrclass_names[i].name);
1da177e4 LT	78	#ifndef CONFIG_SMP
	79	seq_printf(p, "%10u ", kstat_irqs(i));
	80	#else
	81	for_each_online_cpu(j)
	82	seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
	83	#endif
052ff461 HC	84	if (intrclass_names[i].desc)
052ff461 HC	85	seq_printf(p, " %s", intrclass_names[i].desc);
1da177e4	86	seq_putc(p, '\n');
1da177e4	87	}
8dd79cb1	88	put_online_cpus();
1da177e4 LT	89	return 0;
	90	}
	91
1da177e4 LT	92	/*
	93	* Switch to the asynchronous interrupt stack for softirq execution.
	94	*/
1da177e4 LT	95	asmlinkage void do_softirq(void)
	96	{
	97	unsigned long flags, old, new;
	98
	99	if (in_interrupt())
	100	return;
	101
	102	local_irq_save(flags);
	103
1da177e4 LT	104	if (local_softirq_pending()) {
	105	/* Get current stack pointer. */
	106	asm volatile("la %0,0(15)" : "=a" (old));
	107	/* Check against async. stack address range. */
	108	new = S390_lowcore.async_stack;
	109	if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
	110	/* Need to switch to the async. stack. */
	111	new -= STACK_FRAME_OVERHEAD;
	112	((struct stack_frame *) new)->back_chain = old;
	113
	114	asm volatile(" la 15,0(%0)\n"
	115	" basr 14,%2\n"
	116	" la 15,0(%1)\n"
	117	: : "a" (new), "a" (old),
	118	"a" (__do_softirq)
	119	: "0", "1", "2", "3", "4", "5", "14",
	120	"cc", "memory" );
	121	} else
	122	/* We are already on the async stack. */
	123	__do_softirq();
	124	}
	125
1da177e4 LT	126	local_irq_restore(flags);
1da177e4 LT	127	}
55dff522	128
0addff81	129	#ifdef CONFIG_PROC_FS
55dff522 HC	130	void init_irq_proc(void)
	131	{
	132	struct proc_dir_entry *root_irq_dir;
	133
	134	root_irq_dir = proc_mkdir("irq", NULL);
	135	create_prof_cpu_mask(root_irq_dir);
	136	}
0addff81	137	#endif
d7b250e2 HC	138
d7b250e2 HC	139	/*
89c9b66b JG	140	* ext_int_hash[index] is the list head for all external interrupts that hash
89c9b66b JG	141	* to this index.
d7b250e2	142	*/
89c9b66b	143	static struct list_head ext_int_hash[256];
d7b250e2 HC	144
d7b250e2 HC	145	struct ext_int_info {
d7b250e2 HC	146	ext_int_handler_t handler;
d7b250e2 HC	147	u16 code;
89c9b66b JG	148	struct list_head entry;
89c9b66b JG	149	struct rcu_head rcu;
d7b250e2 HC	150	};
d7b250e2 HC	151
89c9b66b JG	152	/* ext_int_hash_lock protects the handler lists for external interrupts */
	153	DEFINE_SPINLOCK(ext_int_hash_lock);
	154
	155	static void __init init_external_interrupts(void)
	156	{
	157	int idx;
	158
	159	for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
	160	INIT_LIST_HEAD(&ext_int_hash[idx]);
	161	}
d7b250e2 HC	162
	163	static inline int ext_hash(u16 code)
	164	{
	165	return (code + (code >> 9)) & 0xff;
	166	}
	167
	168	int register_external_interrupt(u16 code, ext_int_handler_t handler)
	169	{
	170	struct ext_int_info *p;
89c9b66b	171	unsigned long flags;
d7b250e2 HC	172	int index;
	173
	174	p = kmalloc(sizeof(*p), GFP_ATOMIC);
	175	if (!p)
	176	return -ENOMEM;
	177	p->code = code;
	178	p->handler = handler;
	179	index = ext_hash(code);
89c9b66b JG	180
	181	spin_lock_irqsave(&ext_int_hash_lock, flags);
	182	list_add_rcu(&p->entry, &ext_int_hash[index]);
	183	spin_unlock_irqrestore(&ext_int_hash_lock, flags);
d7b250e2 HC	184	return 0;
	185	}
	186	EXPORT_SYMBOL(register_external_interrupt);
	187
	188	int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
	189	{
89c9b66b JG	190	struct ext_int_info *p;
	191	unsigned long flags;
	192	int index = ext_hash(code);
d7b250e2	193
89c9b66b JG	194	spin_lock_irqsave(&ext_int_hash_lock, flags);
	195	list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
	196	if (p->code == code && p->handler == handler) {
	197	list_del_rcu(&p->entry);
bc399d6e	198	kfree_rcu(p, rcu);
89c9b66b JG	199	}
89c9b66b JG	200	spin_unlock_irqrestore(&ext_int_hash_lock, flags);
d7b250e2 HC	201	return 0;
	202	}
	203	EXPORT_SYMBOL(unregister_external_interrupt);
	204
fde15c3a	205	void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
d7b250e2 HC	206	unsigned int param32, unsigned long param64)
	207	{
	208	struct pt_regs *old_regs;
d7b250e2 HC	209	struct ext_int_info *p;
	210	int index;
	211
d7b250e2	212	old_regs = set_irq_regs(regs);
d7b250e2 HC	213	irq_enter();
	214	if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
	215	/* Serve timer interrupts first. */
	216	clock_comparator_work();
	217	kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
fde15c3a	218	if (ext_code.code != 0x1004)
d7b250e2	219	__get_cpu_var(s390_idle).nohz_delay = 1;
89c9b66b	220
fde15c3a	221	index = ext_hash(ext_code.code);
89c9b66b JG	222	rcu_read_lock();
89c9b66b JG	223	list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
fde15c3a HC	224	if (likely(p->code == ext_code.code))
fde15c3a HC	225	p->handler(ext_code, param32, param64);
89c9b66b	226	rcu_read_unlock();
d7b250e2 HC	227	irq_exit();
	228	set_irq_regs(old_regs);
	229	}
	230
89c9b66b JG	231	void __init init_IRQ(void)
	232	{
	233	init_external_interrupts();
	234	}
	235
d7b250e2 HC	236	static DEFINE_SPINLOCK(sc_irq_lock);
	237	static int sc_irq_refcount;
	238
	239	void service_subclass_irq_register(void)
	240	{
	241	spin_lock(&sc_irq_lock);
	242	if (!sc_irq_refcount)
	243	ctl_set_bit(0, 9);
	244	sc_irq_refcount++;
	245	spin_unlock(&sc_irq_lock);
	246	}
	247	EXPORT_SYMBOL(service_subclass_irq_register);
	248
	249	void service_subclass_irq_unregister(void)
	250	{
	251	spin_lock(&sc_irq_lock);
	252	sc_irq_refcount--;
	253	if (!sc_irq_refcount)
	254	ctl_clear_bit(0, 9);
	255	spin_unlock(&sc_irq_lock);
	256	}
	257	EXPORT_SYMBOL(service_subclass_irq_unregister);