Merge tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene...
[deliverable/linux.git] / arch / s390 / kernel / irq.c
CommitLineData
1da177e4 1/*
a53c8fab 2 * Copyright IBM Corp. 2004, 2011
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HC
3 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
4 * Holger Smolinski <Holger.Smolinski@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
1da177e4
LT
6 *
7 * This file contains interrupt related functions.
8 */
9
1da177e4
LT
10#include <linux/kernel_stat.h>
11#include <linux/interrupt.h>
12#include <linux/seq_file.h>
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13#include <linux/proc_fs.h>
14#include <linux/profile.h>
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15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/ftrace.h>
18#include <linux/errno.h>
19#include <linux/slab.h>
20#include <linux/cpu.h>
21#include <asm/irq_regs.h>
22#include <asm/cputime.h>
23#include <asm/lowcore.h>
24#include <asm/irq.h>
25#include "entry.h"
1da177e4 26
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27DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
28EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
29
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30struct irq_class {
31 char *name;
32 char *desc;
33};
34
420f42ec 35/*
cf2fbdd2 36 * The list of "main" irq classes on s390. This is the list of interrupts
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HC
37 * that appear both in /proc/stat ("intr" line) and /proc/interrupts.
38 * Historically only external and I/O interrupts have been part of /proc/stat.
39 * We can't add the split external and I/O sub classes since the first field
40 * in the "intr" line in /proc/stat is supposed to be the sum of all other
41 * fields.
42 * Since the external and I/O interrupt fields are already sums we would end
43 * up with having a sum which accounts each interrupt twice.
44 */
45static const struct irq_class irqclass_main_desc[NR_IRQS] = {
708c39db 46 [EXTERNAL_INTERRUPT] = {.name = "EXT"},
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HC
47 [IO_INTERRUPT] = {.name = "I/O"}
48};
49
50/*
51 * The list of split external and I/O interrupts that appear only in
52 * /proc/interrupts.
53 * In addition this list contains non external / I/O events like NMIs.
54 */
55static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
56 [IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
57 [IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
58 [IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
59 [IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
60 [IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
61 [IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
62 [IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
63 [IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
64 [IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
65 [IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
66 [IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
67 [IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
68 [IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
69 [IRQIO_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
70 [IRQIO_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
71 [IRQIO_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
72 [IRQIO_C15] = {.name = "C15", .desc = "[I/O] 3215"},
73 [IRQIO_C70] = {.name = "C70", .desc = "[I/O] 3270"},
74 [IRQIO_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
75 [IRQIO_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
76 [IRQIO_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
77 [IRQIO_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
78 [IRQIO_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
79 [IRQIO_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
80 [IRQIO_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
81 [IRQIO_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
82 [IRQIO_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
83 [IRQIO_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
89f88337 84 [IRQIO_VIR] = {.name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
708c39db 85 [NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
93f3b2ee 86 [CPU_RST] = {.name = "RST", .desc = "[CPU] CPU Restart"},
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87};
88
1da177e4
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89/*
90 * show_interrupts is needed by /proc/interrupts.
91 */
92int show_interrupts(struct seq_file *p, void *v)
93{
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94 int irq = *(loff_t *) v;
95 int cpu;
1da177e4 96
8dd79cb1 97 get_online_cpus();
420f42ec 98 if (irq == 0) {
1da177e4 99 seq_puts(p, " ");
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100 for_each_online_cpu(cpu)
101 seq_printf(p, "CPU%d ", cpu);
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LT
102 seq_putc(p, '\n');
103 }
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104 if (irq < NR_IRQS) {
105 seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
106 for_each_online_cpu(cpu)
107 seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[irq]);
108 seq_putc(p, '\n');
109 goto skip_arch_irqs;
110 }
111 for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
112 seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
113 for_each_online_cpu(cpu)
114 seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).irqs[irq]);
115 if (irqclass_sub_desc[irq].desc)
116 seq_printf(p, " %s", irqclass_sub_desc[irq].desc);
117 seq_putc(p, '\n');
118 }
119skip_arch_irqs:
8dd79cb1 120 put_online_cpus();
420f42ec 121 return 0;
1da177e4
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122}
123
1da177e4
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124/*
125 * Switch to the asynchronous interrupt stack for softirq execution.
126 */
1da177e4
LT
127asmlinkage void do_softirq(void)
128{
129 unsigned long flags, old, new;
130
131 if (in_interrupt())
132 return;
133
134 local_irq_save(flags);
135
1da177e4
LT
136 if (local_softirq_pending()) {
137 /* Get current stack pointer. */
138 asm volatile("la %0,0(15)" : "=a" (old));
139 /* Check against async. stack address range. */
140 new = S390_lowcore.async_stack;
141 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
142 /* Need to switch to the async. stack. */
143 new -= STACK_FRAME_OVERHEAD;
144 ((struct stack_frame *) new)->back_chain = old;
145
146 asm volatile(" la 15,0(%0)\n"
147 " basr 14,%2\n"
148 " la 15,0(%1)\n"
149 : : "a" (new), "a" (old),
150 "a" (__do_softirq)
151 : "0", "1", "2", "3", "4", "5", "14",
152 "cc", "memory" );
7968ca81 153 } else {
1da177e4
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154 /* We are already on the async stack. */
155 __do_softirq();
7968ca81 156 }
1da177e4
LT
157 }
158
1da177e4
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159 local_irq_restore(flags);
160}
55dff522 161
0addff81 162#ifdef CONFIG_PROC_FS
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163void init_irq_proc(void)
164{
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165 if (proc_mkdir("irq", NULL))
166 create_prof_cpu_mask();
55dff522 167}
0addff81 168#endif
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169
170/*
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171 * ext_int_hash[index] is the list head for all external interrupts that hash
172 * to this index.
d7b250e2 173 */
89c9b66b 174static struct list_head ext_int_hash[256];
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175
176struct ext_int_info {
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177 ext_int_handler_t handler;
178 u16 code;
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179 struct list_head entry;
180 struct rcu_head rcu;
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181};
182
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183/* ext_int_hash_lock protects the handler lists for external interrupts */
184DEFINE_SPINLOCK(ext_int_hash_lock);
185
186static void __init init_external_interrupts(void)
187{
188 int idx;
189
190 for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
191 INIT_LIST_HEAD(&ext_int_hash[idx]);
192}
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193
194static inline int ext_hash(u16 code)
195{
196 return (code + (code >> 9)) & 0xff;
197}
198
199int register_external_interrupt(u16 code, ext_int_handler_t handler)
200{
201 struct ext_int_info *p;
89c9b66b 202 unsigned long flags;
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203 int index;
204
205 p = kmalloc(sizeof(*p), GFP_ATOMIC);
206 if (!p)
207 return -ENOMEM;
208 p->code = code;
209 p->handler = handler;
210 index = ext_hash(code);
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211
212 spin_lock_irqsave(&ext_int_hash_lock, flags);
213 list_add_rcu(&p->entry, &ext_int_hash[index]);
214 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
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215 return 0;
216}
217EXPORT_SYMBOL(register_external_interrupt);
218
219int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
220{
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221 struct ext_int_info *p;
222 unsigned long flags;
223 int index = ext_hash(code);
d7b250e2 224
89c9b66b 225 spin_lock_irqsave(&ext_int_hash_lock, flags);
7968ca81 226 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
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JG
227 if (p->code == code && p->handler == handler) {
228 list_del_rcu(&p->entry);
bc399d6e 229 kfree_rcu(p, rcu);
89c9b66b 230 }
7968ca81 231 }
89c9b66b 232 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
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233 return 0;
234}
235EXPORT_SYMBOL(unregister_external_interrupt);
236
fde15c3a 237void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
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HC
238 unsigned int param32, unsigned long param64)
239{
240 struct pt_regs *old_regs;
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241 struct ext_int_info *p;
242 int index;
243
d7b250e2 244 old_regs = set_irq_regs(regs);
d7b250e2 245 irq_enter();
7968ca81 246 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
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HC
247 /* Serve timer interrupts first. */
248 clock_comparator_work();
7968ca81 249 }
add9bde2 250 kstat_incr_irqs_this_cpu(EXTERNAL_INTERRUPT, NULL);
fde15c3a 251 if (ext_code.code != 0x1004)
d7b250e2 252 __get_cpu_var(s390_idle).nohz_delay = 1;
89c9b66b 253
fde15c3a 254 index = ext_hash(ext_code.code);
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255 rcu_read_lock();
256 list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
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257 if (likely(p->code == ext_code.code))
258 p->handler(ext_code, param32, param64);
89c9b66b 259 rcu_read_unlock();
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260 irq_exit();
261 set_irq_regs(old_regs);
262}
263
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264void __init init_IRQ(void)
265{
266 init_external_interrupts();
267}
268
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HC
269static DEFINE_SPINLOCK(sc_irq_lock);
270static int sc_irq_refcount;
271
272void service_subclass_irq_register(void)
273{
274 spin_lock(&sc_irq_lock);
275 if (!sc_irq_refcount)
276 ctl_set_bit(0, 9);
277 sc_irq_refcount++;
278 spin_unlock(&sc_irq_lock);
279}
280EXPORT_SYMBOL(service_subclass_irq_register);
281
282void service_subclass_irq_unregister(void)
283{
284 spin_lock(&sc_irq_lock);
285 sc_irq_refcount--;
286 if (!sc_irq_refcount)
287 ctl_clear_bit(0, 9);
288 spin_unlock(&sc_irq_lock);
289}
290EXPORT_SYMBOL(service_subclass_irq_unregister);
b03d541a
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291
292static DEFINE_SPINLOCK(ma_subclass_lock);
293static int ma_subclass_refcount;
294
295void measurement_alert_subclass_register(void)
296{
297 spin_lock(&ma_subclass_lock);
298 if (!ma_subclass_refcount)
299 ctl_set_bit(0, 5);
300 ma_subclass_refcount++;
301 spin_unlock(&ma_subclass_lock);
302}
303EXPORT_SYMBOL(measurement_alert_subclass_register);
304
305void measurement_alert_subclass_unregister(void)
306{
307 spin_lock(&ma_subclass_lock);
308 ma_subclass_refcount--;
309 if (!ma_subclass_refcount)
310 ctl_clear_bit(0, 5);
311 spin_unlock(&ma_subclass_lock);
312}
313EXPORT_SYMBOL(measurement_alert_subclass_unregister);
c46b54f7
BH
314
315void synchronize_irq(unsigned int irq)
316{
317 /*
318 * Not needed, the handler is protected by a lock and IRQs that occur
319 * after the handler is deleted are just NOPs.
320 */
321}
322EXPORT_SYMBOL_GPL(synchronize_irq);
323
324#ifndef CONFIG_PCI
325
326/* Only PCI devices have dynamically-defined IRQ handlers */
327
328int request_irq(unsigned int irq, irq_handler_t handler,
329 unsigned long irqflags, const char *devname, void *dev_id)
330{
331 return -EINVAL;
332}
333EXPORT_SYMBOL_GPL(request_irq);
334
335void free_irq(unsigned int irq, void *dev_id)
336{
337 WARN_ON(1);
338}
339EXPORT_SYMBOL_GPL(free_irq);
340
341void enable_irq(unsigned int irq)
342{
343 WARN_ON(1);
344}
345EXPORT_SYMBOL_GPL(enable_irq);
346
347void disable_irq(unsigned int irq)
348{
349 WARN_ON(1);
350}
351EXPORT_SYMBOL_GPL(disable_irq);
352
353#endif /* !CONFIG_PCI */
354
355void disable_irq_nosync(unsigned int irq)
356{
357 disable_irq(irq);
358}
359EXPORT_SYMBOL_GPL(disable_irq_nosync);
360
361unsigned long probe_irq_on(void)
362{
363 return 0;
364}
365EXPORT_SYMBOL_GPL(probe_irq_on);
366
367int probe_irq_off(unsigned long val)
368{
369 return 0;
370}
371EXPORT_SYMBOL_GPL(probe_irq_off);
372
373unsigned int probe_irq_mask(unsigned long val)
374{
375 return val;
376}
377EXPORT_SYMBOL_GPL(probe_irq_mask);
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