Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/setup.c | |
3 | * | |
4 | * S390 version | |
5 | * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
6 | * Author(s): Hartmut Penner (hp@de.ibm.com), | |
7 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
8 | * | |
9 | * Derived from "arch/i386/kernel/setup.c" | |
10 | * Copyright (C) 1995, Linus Torvalds | |
11 | */ | |
12 | ||
13 | /* | |
14 | * This file handles the architecture-dependent parts of initialization | |
15 | */ | |
16 | ||
17 | #include <linux/errno.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/stddef.h> | |
23 | #include <linux/unistd.h> | |
24 | #include <linux/ptrace.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/user.h> | |
1da177e4 LT |
27 | #include <linux/tty.h> |
28 | #include <linux/ioport.h> | |
29 | #include <linux/delay.h> | |
1da177e4 LT |
30 | #include <linux/init.h> |
31 | #include <linux/initrd.h> | |
32 | #include <linux/bootmem.h> | |
33 | #include <linux/root_dev.h> | |
34 | #include <linux/console.h> | |
35 | #include <linux/seq_file.h> | |
36 | #include <linux/kernel_stat.h> | |
1e8e3383 | 37 | #include <linux/device.h> |
585c3047 | 38 | #include <linux/notifier.h> |
65912a84 | 39 | #include <linux/pfn.h> |
fe355b7f | 40 | #include <linux/ctype.h> |
2b67fc46 | 41 | #include <linux/reboot.h> |
dbd70fb4 | 42 | #include <linux/topology.h> |
1da177e4 | 43 | |
46b05d26 | 44 | #include <asm/ipl.h> |
1da177e4 LT |
45 | #include <asm/uaccess.h> |
46 | #include <asm/system.h> | |
47 | #include <asm/smp.h> | |
48 | #include <asm/mmu_context.h> | |
49 | #include <asm/cpcmd.h> | |
50 | #include <asm/lowcore.h> | |
51 | #include <asm/irq.h> | |
0b642ede PO |
52 | #include <asm/page.h> |
53 | #include <asm/ptrace.h> | |
cc13ad62 | 54 | #include <asm/sections.h> |
fe355b7f | 55 | #include <asm/ebcdic.h> |
c1821c2e GS |
56 | #include <asm/compat.h> |
57 | ||
58 | long psw_kernel_bits = (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_PRIMARY | | |
59 | PSW_MASK_MCHECK | PSW_DEFAULT_KEY); | |
60 | long psw_user_bits = (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_HOME | | |
61 | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | | |
62 | PSW_MASK_PSTATE | PSW_DEFAULT_KEY); | |
1da177e4 | 63 | |
d02765d1 GS |
64 | /* |
65 | * User copy operations. | |
66 | */ | |
67 | struct uaccess_ops uaccess; | |
d4ee453b | 68 | EXPORT_SYMBOL(uaccess); |
d02765d1 | 69 | |
1da177e4 LT |
70 | /* |
71 | * Machine setup.. | |
72 | */ | |
73 | unsigned int console_mode = 0; | |
74 | unsigned int console_devno = -1; | |
75 | unsigned int console_irq = -1; | |
2e5061e4 | 76 | unsigned long machine_flags; |
cf8ba7a9 MS |
77 | unsigned long elf_hwcap = 0; |
78 | char elf_platform[ELF_PLATFORM_SIZE]; | |
36a2bd42 | 79 | |
23d17421 | 80 | struct mem_chunk __initdata memory_chunk[MEMORY_CHUNKS]; |
1da177e4 | 81 | volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */ |
c9e37353 | 82 | static unsigned long __initdata memory_end; |
1da177e4 | 83 | |
1da177e4 LT |
84 | /* |
85 | * This is set up by the setup-routine at boot-time | |
86 | * for S390 need to find out, what we have to setup | |
87 | * using address 0x10400 ... | |
88 | */ | |
89 | ||
90 | #include <asm/setup.h> | |
91 | ||
1da177e4 LT |
92 | static struct resource code_resource = { |
93 | .name = "Kernel code", | |
94 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM, | |
95 | }; | |
96 | ||
97 | static struct resource data_resource = { | |
98 | .name = "Kernel data", | |
99 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM, | |
100 | }; | |
101 | ||
102 | /* | |
103 | * cpu_init() initializes state that is per-CPU. | |
104 | */ | |
ea1f4eec | 105 | void __cpuinit cpu_init(void) |
1da177e4 LT |
106 | { |
107 | int addr = hard_smp_processor_id(); | |
108 | ||
109 | /* | |
110 | * Store processor id in lowcore (used e.g. in timer_interrupt) | |
111 | */ | |
72960a02 | 112 | get_cpu_id(&S390_lowcore.cpu_data.cpu_id); |
1da177e4 LT |
113 | S390_lowcore.cpu_data.cpu_addr = addr; |
114 | ||
115 | /* | |
116 | * Force FPU initialization: | |
117 | */ | |
118 | clear_thread_flag(TIF_USEDFPU); | |
119 | clear_used_math(); | |
120 | ||
121 | atomic_inc(&init_mm.mm_count); | |
122 | current->active_mm = &init_mm; | |
123 | if (current->mm) | |
124 | BUG(); | |
125 | enter_lazy_tlb(&init_mm, current); | |
126 | } | |
127 | ||
1da177e4 LT |
128 | /* |
129 | * condev= and conmode= setup parameter. | |
130 | */ | |
131 | ||
132 | static int __init condev_setup(char *str) | |
133 | { | |
134 | int vdev; | |
135 | ||
136 | vdev = simple_strtoul(str, &str, 0); | |
137 | if (vdev >= 0 && vdev < 65536) { | |
138 | console_devno = vdev; | |
139 | console_irq = -1; | |
140 | } | |
141 | return 1; | |
142 | } | |
143 | ||
144 | __setup("condev=", condev_setup); | |
145 | ||
146 | static int __init conmode_setup(char *str) | |
147 | { | |
8c0933ee | 148 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
149 | if (strncmp(str, "hwc", 4) == 0 || strncmp(str, "sclp", 5) == 0) |
150 | SET_CONSOLE_SCLP; | |
151 | #endif | |
152 | #if defined(CONFIG_TN3215_CONSOLE) | |
153 | if (strncmp(str, "3215", 5) == 0) | |
154 | SET_CONSOLE_3215; | |
155 | #endif | |
156 | #if defined(CONFIG_TN3270_CONSOLE) | |
157 | if (strncmp(str, "3270", 5) == 0) | |
158 | SET_CONSOLE_3270; | |
159 | #endif | |
160 | return 1; | |
161 | } | |
162 | ||
163 | __setup("conmode=", conmode_setup); | |
164 | ||
165 | static void __init conmode_default(void) | |
166 | { | |
167 | char query_buffer[1024]; | |
168 | char *ptr; | |
169 | ||
170 | if (MACHINE_IS_VM) { | |
740b5706 | 171 | cpcmd("QUERY CONSOLE", query_buffer, 1024, NULL); |
1da177e4 LT |
172 | console_devno = simple_strtoul(query_buffer + 5, NULL, 16); |
173 | ptr = strstr(query_buffer, "SUBCHANNEL ="); | |
174 | console_irq = simple_strtoul(ptr + 13, NULL, 16); | |
740b5706 | 175 | cpcmd("QUERY TERM", query_buffer, 1024, NULL); |
1da177e4 LT |
176 | ptr = strstr(query_buffer, "CONMODE"); |
177 | /* | |
178 | * Set the conmode to 3215 so that the device recognition | |
179 | * will set the cu_type of the console to 3215. If the | |
180 | * conmode is 3270 and we don't set it back then both | |
181 | * 3215 and the 3270 driver will try to access the console | |
182 | * device (3215 as console and 3270 as normal tty). | |
183 | */ | |
740b5706 | 184 | cpcmd("TERM CONMODE 3215", NULL, 0, NULL); |
1da177e4 | 185 | if (ptr == NULL) { |
8c0933ee | 186 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
187 | SET_CONSOLE_SCLP; |
188 | #endif | |
189 | return; | |
190 | } | |
191 | if (strncmp(ptr + 8, "3270", 4) == 0) { | |
192 | #if defined(CONFIG_TN3270_CONSOLE) | |
193 | SET_CONSOLE_3270; | |
194 | #elif defined(CONFIG_TN3215_CONSOLE) | |
195 | SET_CONSOLE_3215; | |
8c0933ee | 196 | #elif defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
197 | SET_CONSOLE_SCLP; |
198 | #endif | |
199 | } else if (strncmp(ptr + 8, "3215", 4) == 0) { | |
200 | #if defined(CONFIG_TN3215_CONSOLE) | |
201 | SET_CONSOLE_3215; | |
202 | #elif defined(CONFIG_TN3270_CONSOLE) | |
203 | SET_CONSOLE_3270; | |
8c0933ee | 204 | #elif defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
205 | SET_CONSOLE_SCLP; |
206 | #endif | |
207 | } | |
1da177e4 | 208 | } else { |
8c0933ee | 209 | #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) |
1da177e4 LT |
210 | SET_CONSOLE_SCLP; |
211 | #endif | |
212 | } | |
213 | } | |
214 | ||
411ed322 MH |
215 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
216 | static void __init setup_zfcpdump(unsigned int console_devno) | |
217 | { | |
a0443fbb | 218 | static char str[41]; |
411ed322 MH |
219 | |
220 | if (ipl_info.type != IPL_TYPE_FCP_DUMP) | |
221 | return; | |
222 | if (console_devno != -1) | |
a0443fbb | 223 | sprintf(str, " cio_ignore=all,!0.0.%04x,!0.0.%04x", |
411ed322 MH |
224 | ipl_info.data.fcp.dev_id.devno, console_devno); |
225 | else | |
a0443fbb | 226 | sprintf(str, " cio_ignore=all,!0.0.%04x", |
411ed322 | 227 | ipl_info.data.fcp.dev_id.devno); |
a0443fbb | 228 | strcat(boot_command_line, str); |
411ed322 MH |
229 | console_loglevel = 2; |
230 | } | |
231 | #else | |
232 | static inline void setup_zfcpdump(unsigned int console_devno) {} | |
233 | #endif /* CONFIG_ZFCPDUMP */ | |
234 | ||
1da177e4 LT |
235 | /* |
236 | * Reboot, halt and power_off stubs. They just call _machine_restart, | |
237 | * _machine_halt or _machine_power_off. | |
238 | */ | |
239 | ||
240 | void machine_restart(char *command) | |
241 | { | |
7aa8dac7 | 242 | if ((!in_interrupt() && !in_atomic()) || oops_in_progress) |
06fa46a2 MS |
243 | /* |
244 | * Only unblank the console if we are called in enabled | |
245 | * context or a bust_spinlocks cleared the way for us. | |
246 | */ | |
247 | console_unblank(); | |
1da177e4 LT |
248 | _machine_restart(command); |
249 | } | |
250 | ||
1da177e4 LT |
251 | void machine_halt(void) |
252 | { | |
06fa46a2 MS |
253 | if (!in_interrupt() || oops_in_progress) |
254 | /* | |
255 | * Only unblank the console if we are called in enabled | |
256 | * context or a bust_spinlocks cleared the way for us. | |
257 | */ | |
258 | console_unblank(); | |
1da177e4 LT |
259 | _machine_halt(); |
260 | } | |
261 | ||
1da177e4 LT |
262 | void machine_power_off(void) |
263 | { | |
06fa46a2 MS |
264 | if (!in_interrupt() || oops_in_progress) |
265 | /* | |
266 | * Only unblank the console if we are called in enabled | |
267 | * context or a bust_spinlocks cleared the way for us. | |
268 | */ | |
269 | console_unblank(); | |
1da177e4 LT |
270 | _machine_power_off(); |
271 | } | |
272 | ||
53df751c MS |
273 | /* |
274 | * Dummy power off function. | |
275 | */ | |
276 | void (*pm_power_off)(void) = machine_power_off; | |
277 | ||
59685296 HC |
278 | static int __init early_parse_mem(char *p) |
279 | { | |
280 | memory_end = memparse(p, &p); | |
281 | return 0; | |
282 | } | |
283 | early_param("mem", early_parse_mem); | |
284 | ||
c1821c2e | 285 | #ifdef CONFIG_S390_SWITCH_AMODE |
402b0862 CO |
286 | #ifdef CONFIG_PGSTE |
287 | unsigned int switch_amode = 1; | |
288 | #else | |
c1821c2e | 289 | unsigned int switch_amode = 0; |
402b0862 | 290 | #endif |
c1821c2e GS |
291 | EXPORT_SYMBOL_GPL(switch_amode); |
292 | ||
4d284cac HC |
293 | static void set_amode_and_uaccess(unsigned long user_amode, |
294 | unsigned long user32_amode) | |
c1821c2e GS |
295 | { |
296 | psw_user_bits = PSW_BASE_BITS | PSW_MASK_DAT | user_amode | | |
297 | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | | |
298 | PSW_MASK_PSTATE | PSW_DEFAULT_KEY; | |
299 | #ifdef CONFIG_COMPAT | |
300 | psw_user32_bits = PSW_BASE32_BITS | PSW_MASK_DAT | user_amode | | |
301 | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | | |
302 | PSW_MASK_PSTATE | PSW_DEFAULT_KEY; | |
303 | psw32_user_bits = PSW32_BASE_BITS | PSW32_MASK_DAT | user32_amode | | |
304 | PSW32_MASK_IO | PSW32_MASK_EXT | PSW32_MASK_MCHECK | | |
305 | PSW32_MASK_PSTATE; | |
306 | #endif | |
307 | psw_kernel_bits = PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_HOME | | |
308 | PSW_MASK_MCHECK | PSW_DEFAULT_KEY; | |
309 | ||
310 | if (MACHINE_HAS_MVCOS) { | |
311 | printk("mvcos available.\n"); | |
312 | memcpy(&uaccess, &uaccess_mvcos_switch, sizeof(uaccess)); | |
313 | } else { | |
314 | printk("mvcos not available.\n"); | |
315 | memcpy(&uaccess, &uaccess_pt, sizeof(uaccess)); | |
316 | } | |
317 | } | |
318 | ||
319 | /* | |
320 | * Switch kernel/user addressing modes? | |
321 | */ | |
322 | static int __init early_parse_switch_amode(char *p) | |
323 | { | |
324 | switch_amode = 1; | |
325 | return 0; | |
326 | } | |
327 | early_param("switch_amode", early_parse_switch_amode); | |
328 | ||
329 | #else /* CONFIG_S390_SWITCH_AMODE */ | |
330 | static inline void set_amode_and_uaccess(unsigned long user_amode, | |
331 | unsigned long user32_amode) | |
332 | { | |
333 | } | |
334 | #endif /* CONFIG_S390_SWITCH_AMODE */ | |
335 | ||
336 | #ifdef CONFIG_S390_EXEC_PROTECT | |
337 | unsigned int s390_noexec = 0; | |
338 | EXPORT_SYMBOL_GPL(s390_noexec); | |
339 | ||
340 | /* | |
341 | * Enable execute protection? | |
342 | */ | |
343 | static int __init early_parse_noexec(char *p) | |
344 | { | |
345 | if (!strncmp(p, "off", 3)) | |
346 | return 0; | |
347 | switch_amode = 1; | |
348 | s390_noexec = 1; | |
349 | return 0; | |
350 | } | |
351 | early_param("noexec", early_parse_noexec); | |
352 | #endif /* CONFIG_S390_EXEC_PROTECT */ | |
353 | ||
354 | static void setup_addressing_mode(void) | |
355 | { | |
356 | if (s390_noexec) { | |
357 | printk("S390 execute protection active, "); | |
358 | set_amode_and_uaccess(PSW_ASC_SECONDARY, PSW32_ASC_SECONDARY); | |
7af0d6f7 | 359 | } else if (switch_amode) { |
c1821c2e GS |
360 | printk("S390 address spaces switched, "); |
361 | set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY); | |
362 | } | |
411788ea HC |
363 | #ifdef CONFIG_TRACE_IRQFLAGS |
364 | sysc_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK; | |
365 | io_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK; | |
366 | #endif | |
c1821c2e GS |
367 | } |
368 | ||
c9e37353 HC |
369 | static void __init |
370 | setup_lowcore(void) | |
371 | { | |
372 | struct _lowcore *lc; | |
373 | int lc_pages; | |
374 | ||
375 | /* | |
376 | * Setup lowcore for boot cpu | |
377 | */ | |
378 | lc_pages = sizeof(void *) == 8 ? 2 : 1; | |
379 | lc = (struct _lowcore *) | |
380 | __alloc_bootmem(lc_pages * PAGE_SIZE, lc_pages * PAGE_SIZE, 0); | |
381 | memset(lc, 0, lc_pages * PAGE_SIZE); | |
0b642ede | 382 | lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY; |
c9e37353 HC |
383 | lc->restart_psw.addr = |
384 | PSW_ADDR_AMODE | (unsigned long) restart_int_handler; | |
c1821c2e GS |
385 | if (switch_amode) |
386 | lc->restart_psw.mask |= PSW_ASC_HOME; | |
387 | lc->external_new_psw.mask = psw_kernel_bits; | |
c9e37353 HC |
388 | lc->external_new_psw.addr = |
389 | PSW_ADDR_AMODE | (unsigned long) ext_int_handler; | |
c1821c2e | 390 | lc->svc_new_psw.mask = psw_kernel_bits | PSW_MASK_IO | PSW_MASK_EXT; |
c9e37353 | 391 | lc->svc_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) system_call; |
c1821c2e | 392 | lc->program_new_psw.mask = psw_kernel_bits; |
c9e37353 HC |
393 | lc->program_new_psw.addr = |
394 | PSW_ADDR_AMODE | (unsigned long)pgm_check_handler; | |
77fa2245 | 395 | lc->mcck_new_psw.mask = |
c1821c2e | 396 | psw_kernel_bits & ~PSW_MASK_MCHECK & ~PSW_MASK_DAT; |
c9e37353 HC |
397 | lc->mcck_new_psw.addr = |
398 | PSW_ADDR_AMODE | (unsigned long) mcck_int_handler; | |
c1821c2e | 399 | lc->io_new_psw.mask = psw_kernel_bits; |
c9e37353 HC |
400 | lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; |
401 | lc->ipl_device = S390_lowcore.ipl_device; | |
5a62b192 | 402 | lc->clock_comparator = -1ULL; |
c9e37353 HC |
403 | lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; |
404 | lc->async_stack = (unsigned long) | |
405 | __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; | |
c9e37353 HC |
406 | lc->panic_stack = (unsigned long) |
407 | __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0) + PAGE_SIZE; | |
c9e37353 HC |
408 | lc->current_task = (unsigned long) init_thread_union.thread_info.task; |
409 | lc->thread_info = (unsigned long) &init_thread_union; | |
347a8dc3 | 410 | #ifndef CONFIG_64BIT |
77fa2245 HC |
411 | if (MACHINE_HAS_IEEE) { |
412 | lc->extended_save_area_addr = (__u32) | |
413 | __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0); | |
414 | /* enable extended save area */ | |
c4972f33 | 415 | __ctl_set_bit(14, 29); |
77fa2245 HC |
416 | } |
417 | #endif | |
c9e37353 HC |
418 | set_prefix((u32)(unsigned long) lc); |
419 | } | |
420 | ||
421 | static void __init | |
422 | setup_resources(void) | |
423 | { | |
fe355b7f | 424 | struct resource *res, *sub_res; |
c9e37353 HC |
425 | int i; |
426 | ||
cc13ad62 HC |
427 | code_resource.start = (unsigned long) &_text; |
428 | code_resource.end = (unsigned long) &_etext - 1; | |
429 | data_resource.start = (unsigned long) &_etext; | |
430 | data_resource.end = (unsigned long) &_edata - 1; | |
431 | ||
9f4b0ba8 HC |
432 | for (i = 0; i < MEMORY_CHUNKS; i++) { |
433 | if (!memory_chunk[i].size) | |
434 | continue; | |
c9e37353 HC |
435 | res = alloc_bootmem_low(sizeof(struct resource)); |
436 | res->flags = IORESOURCE_BUSY | IORESOURCE_MEM; | |
437 | switch (memory_chunk[i].type) { | |
438 | case CHUNK_READ_WRITE: | |
439 | res->name = "System RAM"; | |
440 | break; | |
441 | case CHUNK_READ_ONLY: | |
442 | res->name = "System ROM"; | |
443 | res->flags |= IORESOURCE_READONLY; | |
444 | break; | |
445 | default: | |
446 | res->name = "reserved"; | |
447 | } | |
448 | res->start = memory_chunk[i].addr; | |
449 | res->end = memory_chunk[i].addr + memory_chunk[i].size - 1; | |
450 | request_resource(&iomem_resource, res); | |
fe355b7f HY |
451 | |
452 | if (code_resource.start >= res->start && | |
453 | code_resource.start <= res->end && | |
454 | code_resource.end > res->end) { | |
455 | sub_res = alloc_bootmem_low(sizeof(struct resource)); | |
456 | memcpy(sub_res, &code_resource, | |
457 | sizeof(struct resource)); | |
458 | sub_res->end = res->end; | |
459 | code_resource.start = res->end + 1; | |
460 | request_resource(res, sub_res); | |
461 | } | |
462 | ||
463 | if (code_resource.start >= res->start && | |
464 | code_resource.start <= res->end && | |
465 | code_resource.end <= res->end) | |
466 | request_resource(res, &code_resource); | |
467 | ||
468 | if (data_resource.start >= res->start && | |
469 | data_resource.start <= res->end && | |
470 | data_resource.end > res->end) { | |
471 | sub_res = alloc_bootmem_low(sizeof(struct resource)); | |
472 | memcpy(sub_res, &data_resource, | |
473 | sizeof(struct resource)); | |
474 | sub_res->end = res->end; | |
475 | data_resource.start = res->end + 1; | |
476 | request_resource(res, sub_res); | |
477 | } | |
478 | ||
479 | if (data_resource.start >= res->start && | |
480 | data_resource.start <= res->end && | |
481 | data_resource.end <= res->end) | |
482 | request_resource(res, &data_resource); | |
c9e37353 HC |
483 | } |
484 | } | |
485 | ||
411ed322 MH |
486 | unsigned long real_memory_size; |
487 | EXPORT_SYMBOL_GPL(real_memory_size); | |
488 | ||
8b62bc96 HC |
489 | static void __init setup_memory_end(void) |
490 | { | |
411ed322 | 491 | unsigned long memory_size; |
5fd9c6e2 | 492 | unsigned long max_mem; |
8b62bc96 HC |
493 | int i; |
494 | ||
411ed322 MH |
495 | #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) |
496 | if (ipl_info.type == IPL_TYPE_FCP_DUMP) | |
497 | memory_end = ZFCPDUMP_HSA_SIZE; | |
498 | #endif | |
499 | memory_size = 0; | |
8b62bc96 HC |
500 | memory_end &= PAGE_MASK; |
501 | ||
0189103c | 502 | max_mem = memory_end ? min(VMEM_MAX_PHYS, memory_end) : VMEM_MAX_PHYS; |
5fd9c6e2 | 503 | memory_end = min(max_mem, memory_end); |
8b62bc96 | 504 | |
9f4b0ba8 HC |
505 | /* |
506 | * Make sure all chunks are MAX_ORDER aligned so we don't need the | |
507 | * extra checks that HOLES_IN_ZONE would require. | |
508 | */ | |
509 | for (i = 0; i < MEMORY_CHUNKS; i++) { | |
510 | unsigned long start, end; | |
511 | struct mem_chunk *chunk; | |
512 | unsigned long align; | |
513 | ||
514 | chunk = &memory_chunk[i]; | |
515 | align = 1UL << (MAX_ORDER + PAGE_SHIFT - 1); | |
516 | start = (chunk->addr + align - 1) & ~(align - 1); | |
517 | end = (chunk->addr + chunk->size) & ~(align - 1); | |
518 | if (start >= end) | |
519 | memset(chunk, 0, sizeof(*chunk)); | |
520 | else { | |
521 | chunk->addr = start; | |
522 | chunk->size = end - start; | |
523 | } | |
524 | } | |
525 | ||
8b62bc96 HC |
526 | for (i = 0; i < MEMORY_CHUNKS; i++) { |
527 | struct mem_chunk *chunk = &memory_chunk[i]; | |
528 | ||
411ed322 MH |
529 | real_memory_size = max(real_memory_size, |
530 | chunk->addr + chunk->size); | |
8b62bc96 HC |
531 | if (chunk->addr >= max_mem) { |
532 | memset(chunk, 0, sizeof(*chunk)); | |
533 | continue; | |
534 | } | |
535 | if (chunk->addr + chunk->size > max_mem) | |
536 | chunk->size = max_mem - chunk->addr; | |
537 | memory_size = max(memory_size, chunk->addr + chunk->size); | |
538 | } | |
539 | if (!memory_end) | |
540 | memory_end = memory_size; | |
8b62bc96 HC |
541 | } |
542 | ||
c9e37353 HC |
543 | static void __init |
544 | setup_memory(void) | |
545 | { | |
546 | unsigned long bootmap_size; | |
fe355b7f | 547 | unsigned long start_pfn, end_pfn; |
c9e37353 | 548 | int i; |
1da177e4 LT |
549 | |
550 | /* | |
551 | * partially used pages are not usable - thus | |
552 | * we are rounding upwards: | |
553 | */ | |
65912a84 HC |
554 | start_pfn = PFN_UP(__pa(&_end)); |
555 | end_pfn = max_pfn = PFN_DOWN(memory_end); | |
1da177e4 | 556 | |
65912a84 HC |
557 | #ifdef CONFIG_BLK_DEV_INITRD |
558 | /* | |
559 | * Move the initrd in case the bitmap of the bootmem allocater | |
560 | * would overwrite it. | |
561 | */ | |
562 | ||
563 | if (INITRD_START && INITRD_SIZE) { | |
564 | unsigned long bmap_size; | |
565 | unsigned long start; | |
566 | ||
567 | bmap_size = bootmem_bootmap_pages(end_pfn - start_pfn + 1); | |
568 | bmap_size = PFN_PHYS(bmap_size); | |
569 | ||
570 | if (PFN_PHYS(start_pfn) + bmap_size > INITRD_START) { | |
571 | start = PFN_PHYS(start_pfn) + bmap_size + PAGE_SIZE; | |
572 | ||
573 | if (start + INITRD_SIZE > memory_end) { | |
574 | printk("initrd extends beyond end of memory " | |
575 | "(0x%08lx > 0x%08lx)\n" | |
576 | "disabling initrd\n", | |
577 | start + INITRD_SIZE, memory_end); | |
578 | INITRD_START = INITRD_SIZE = 0; | |
579 | } else { | |
580 | printk("Moving initrd (0x%08lx -> 0x%08lx, " | |
581 | "size: %ld)\n", | |
582 | INITRD_START, start, INITRD_SIZE); | |
583 | memmove((void *) start, (void *) INITRD_START, | |
584 | INITRD_SIZE); | |
585 | INITRD_START = start; | |
586 | } | |
587 | } | |
588 | } | |
589 | #endif | |
590 | ||
1da177e4 | 591 | /* |
7676bef9 | 592 | * Initialize the boot-time allocator |
1da177e4 LT |
593 | */ |
594 | bootmap_size = init_bootmem(start_pfn, end_pfn); | |
595 | ||
596 | /* | |
597 | * Register RAM areas with the bootmem allocator. | |
598 | */ | |
c9e37353 | 599 | |
0b642ede | 600 | for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) { |
39b742f9 | 601 | unsigned long start_chunk, end_chunk, pfn; |
1da177e4 LT |
602 | |
603 | if (memory_chunk[i].type != CHUNK_READ_WRITE) | |
604 | continue; | |
39b742f9 HC |
605 | start_chunk = PFN_DOWN(memory_chunk[i].addr); |
606 | end_chunk = start_chunk + PFN_DOWN(memory_chunk[i].size) - 1; | |
607 | end_chunk = min(end_chunk, end_pfn); | |
608 | if (start_chunk >= end_chunk) | |
609 | continue; | |
610 | add_active_range(0, start_chunk, end_chunk); | |
611 | pfn = max(start_chunk, start_pfn); | |
612 | for (; pfn <= end_chunk; pfn++) | |
613 | page_set_storage_key(PFN_PHYS(pfn), PAGE_DEFAULT_KEY); | |
1da177e4 LT |
614 | } |
615 | ||
0b642ede PO |
616 | psw_set_key(PAGE_DEFAULT_KEY); |
617 | ||
39b742f9 | 618 | free_bootmem_with_active_regions(0, max_pfn); |
c9e37353 | 619 | |
615b04b3 HC |
620 | /* |
621 | * Reserve memory used for lowcore/command line/kernel image. | |
622 | */ | |
72a7fe39 | 623 | reserve_bootmem(0, (unsigned long)_ehead, BOOTMEM_DEFAULT); |
615b04b3 | 624 | reserve_bootmem((unsigned long)_stext, |
72a7fe39 BW |
625 | PFN_PHYS(start_pfn) - (unsigned long)_stext, |
626 | BOOTMEM_DEFAULT); | |
c9e37353 HC |
627 | /* |
628 | * Reserve the bootmem bitmap itself as well. We do this in two | |
629 | * steps (first step was init_bootmem()) because this catches | |
630 | * the (very unlikely) case of us accidentally initializing the | |
631 | * bootmem allocator with an invalid RAM area. | |
632 | */ | |
72a7fe39 BW |
633 | reserve_bootmem(start_pfn << PAGE_SHIFT, bootmap_size, |
634 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
635 | |
636 | #ifdef CONFIG_BLK_DEV_INITRD | |
65912a84 | 637 | if (INITRD_START && INITRD_SIZE) { |
1da177e4 | 638 | if (INITRD_START + INITRD_SIZE <= memory_end) { |
72a7fe39 BW |
639 | reserve_bootmem(INITRD_START, INITRD_SIZE, |
640 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
641 | initrd_start = INITRD_START; |
642 | initrd_end = initrd_start + INITRD_SIZE; | |
643 | } else { | |
c9e37353 HC |
644 | printk("initrd extends beyond end of memory " |
645 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", | |
646 | initrd_start + INITRD_SIZE, memory_end); | |
647 | initrd_start = initrd_end = 0; | |
1da177e4 | 648 | } |
c9e37353 | 649 | } |
1da177e4 | 650 | #endif |
c9e37353 | 651 | } |
1da177e4 | 652 | |
7b758389 | 653 | static int __init __stfle(unsigned long long *list, int doublewords) |
cf8ba7a9 MS |
654 | { |
655 | typedef struct { unsigned long long _[doublewords]; } addrtype; | |
656 | register unsigned long __nr asm("0") = doublewords - 1; | |
657 | ||
658 | asm volatile(".insn s,0xb2b00000,%0" /* stfle */ | |
659 | : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc"); | |
660 | return __nr + 1; | |
661 | } | |
662 | ||
7b758389 HC |
663 | int __init stfle(unsigned long long *list, int doublewords) |
664 | { | |
665 | if (!(stfl() & (1UL << 24))) | |
666 | return -EOPNOTSUPP; | |
667 | return __stfle(list, doublewords); | |
668 | } | |
669 | ||
cf8ba7a9 MS |
670 | /* |
671 | * Setup hardware capabilities. | |
672 | */ | |
673 | static void __init setup_hwcaps(void) | |
674 | { | |
675 | static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 }; | |
676 | struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data; | |
677 | unsigned long long facility_list_extended; | |
678 | unsigned int facility_list; | |
679 | int i; | |
680 | ||
681 | facility_list = stfl(); | |
682 | /* | |
683 | * The store facility list bits numbers as found in the principles | |
684 | * of operation are numbered with bit 1UL<<31 as number 0 to | |
685 | * bit 1UL<<0 as number 31. | |
686 | * Bit 0: instructions named N3, "backported" to esa-mode | |
687 | * Bit 2: z/Architecture mode is active | |
688 | * Bit 7: the store-facility-list-extended facility is installed | |
689 | * Bit 17: the message-security assist is installed | |
690 | * Bit 19: the long-displacement facility is installed | |
691 | * Bit 21: the extended-immediate facility is installed | |
692 | * These get translated to: | |
693 | * HWCAP_S390_ESAN3 bit 0, HWCAP_S390_ZARCH bit 1, | |
694 | * HWCAP_S390_STFLE bit 2, HWCAP_S390_MSA bit 3, | |
695 | * HWCAP_S390_LDISP bit 4, and HWCAP_S390_EIMM bit 5. | |
696 | */ | |
697 | for (i = 0; i < 6; i++) | |
698 | if (facility_list & (1UL << (31 - stfl_bits[i]))) | |
699 | elf_hwcap |= 1UL << i; | |
700 | ||
701 | /* | |
702 | * Check for additional facilities with store-facility-list-extended. | |
703 | * stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0 | |
704 | * and 1ULL<<0 as bit 63. Bits 0-31 contain the same information | |
705 | * as stored by stfl, bits 32-xxx contain additional facilities. | |
706 | * How many facility words are stored depends on the number of | |
707 | * doublewords passed to the instruction. The additional facilites | |
708 | * are: | |
709 | * Bit 43: decimal floating point facility is installed | |
710 | * translated to: | |
711 | * HWCAP_S390_DFP bit 6. | |
712 | */ | |
713 | if ((elf_hwcap & (1UL << 2)) && | |
7b758389 | 714 | __stfle(&facility_list_extended, 1) > 0) { |
cf8ba7a9 MS |
715 | if (facility_list_extended & (1ULL << (64 - 43))) |
716 | elf_hwcap |= 1UL << 6; | |
717 | } | |
718 | ||
53492b1d GS |
719 | if (MACHINE_HAS_HPAGE) |
720 | elf_hwcap |= 1UL << 7; | |
721 | ||
cf8ba7a9 MS |
722 | switch (cpuinfo->cpu_id.machine) { |
723 | case 0x9672: | |
724 | #if !defined(CONFIG_64BIT) | |
725 | default: /* Use "g5" as default for 31 bit kernels. */ | |
726 | #endif | |
727 | strcpy(elf_platform, "g5"); | |
728 | break; | |
729 | case 0x2064: | |
730 | case 0x2066: | |
731 | #if defined(CONFIG_64BIT) | |
732 | default: /* Use "z900" as default for 64 bit kernels. */ | |
733 | #endif | |
734 | strcpy(elf_platform, "z900"); | |
735 | break; | |
736 | case 0x2084: | |
737 | case 0x2086: | |
738 | strcpy(elf_platform, "z990"); | |
739 | break; | |
740 | case 0x2094: | |
741 | strcpy(elf_platform, "z9-109"); | |
742 | break; | |
743 | } | |
744 | } | |
745 | ||
c9e37353 HC |
746 | /* |
747 | * Setup function called from init/main.c just after the banner | |
748 | * was printed. | |
749 | */ | |
1da177e4 | 750 | |
c9e37353 HC |
751 | void __init |
752 | setup_arch(char **cmdline_p) | |
753 | { | |
1da177e4 | 754 | /* |
c9e37353 | 755 | * print what head.S has found out about the machine |
1da177e4 | 756 | */ |
347a8dc3 | 757 | #ifndef CONFIG_64BIT |
c9e37353 HC |
758 | printk((MACHINE_IS_VM) ? |
759 | "We are running under VM (31 bit mode)\n" : | |
760 | "We are running native (31 bit mode)\n"); | |
761 | printk((MACHINE_HAS_IEEE) ? | |
762 | "This machine has an IEEE fpu\n" : | |
763 | "This machine has no IEEE fpu\n"); | |
347a8dc3 | 764 | #else /* CONFIG_64BIT */ |
fa587743 CO |
765 | if (MACHINE_IS_VM) |
766 | printk("We are running under VM (64 bit mode)\n"); | |
767 | else if (MACHINE_IS_KVM) { | |
768 | printk("We are running under KVM (64 bit mode)\n"); | |
769 | add_preferred_console("ttyS", 1, NULL); | |
770 | } else | |
771 | printk("We are running native (64 bit mode)\n"); | |
347a8dc3 | 772 | #endif /* CONFIG_64BIT */ |
c9e37353 | 773 | |
a0443fbb HB |
774 | /* Have one command line that is parsed and saved in /proc/cmdline */ |
775 | /* boot_command_line has been already set up in early.c */ | |
776 | *cmdline_p = boot_command_line; | |
59685296 | 777 | |
c9e37353 | 778 | ROOT_DEV = Root_RAM0; |
59685296 HC |
779 | |
780 | init_mm.start_code = PAGE_OFFSET; | |
781 | init_mm.end_code = (unsigned long) &_etext; | |
782 | init_mm.end_data = (unsigned long) &_edata; | |
783 | init_mm.brk = (unsigned long) &_end; | |
784 | ||
6c2a9e6d GS |
785 | if (MACHINE_HAS_MVCOS) |
786 | memcpy(&uaccess, &uaccess_mvcos, sizeof(uaccess)); | |
787 | else | |
788 | memcpy(&uaccess, &uaccess_std, sizeof(uaccess)); | |
789 | ||
59685296 HC |
790 | parse_early_param(); |
791 | ||
99ca4e58 | 792 | setup_ipl(); |
8b62bc96 | 793 | setup_memory_end(); |
c1821c2e | 794 | setup_addressing_mode(); |
c9e37353 HC |
795 | setup_memory(); |
796 | setup_resources(); | |
797 | setup_lowcore(); | |
798 | ||
1da177e4 LT |
799 | cpu_init(); |
800 | __cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr; | |
dbd70fb4 | 801 | s390_init_cpu_topology(); |
1da177e4 | 802 | |
cf8ba7a9 MS |
803 | /* |
804 | * Setup capabilities (ELF_HWCAP & ELF_PLATFORM). | |
805 | */ | |
806 | setup_hwcaps(); | |
807 | ||
1da177e4 LT |
808 | /* |
809 | * Create kernel page tables and switch to virtual addressing. | |
810 | */ | |
811 | paging_init(); | |
812 | ||
813 | /* Setup default console */ | |
814 | conmode_default(); | |
411ed322 MH |
815 | |
816 | /* Setup zfcpdump support */ | |
817 | setup_zfcpdump(console_devno); | |
1da177e4 LT |
818 | } |
819 | ||
ea1f4eec | 820 | void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo) |
1da177e4 | 821 | { |
08d07968 | 822 | printk(KERN_INFO "cpu %d " |
1da177e4 LT |
823 | #ifdef CONFIG_SMP |
824 | "phys_idx=%d " | |
825 | #endif | |
826 | "vers=%02X ident=%06X machine=%04X unused=%04X\n", | |
827 | cpuinfo->cpu_nr, | |
828 | #ifdef CONFIG_SMP | |
829 | cpuinfo->cpu_addr, | |
830 | #endif | |
831 | cpuinfo->cpu_id.version, | |
832 | cpuinfo->cpu_id.ident, | |
833 | cpuinfo->cpu_id.machine, | |
834 | cpuinfo->cpu_id.unused); | |
835 | } | |
836 | ||
837 | /* | |
838 | * show_cpuinfo - Get information on one CPU for use by procfs. | |
839 | */ | |
840 | ||
841 | static int show_cpuinfo(struct seq_file *m, void *v) | |
842 | { | |
53492b1d GS |
843 | static const char *hwcap_str[8] = { |
844 | "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp", | |
845 | "edat" | |
cf8ba7a9 | 846 | }; |
1da177e4 LT |
847 | struct cpuinfo_S390 *cpuinfo; |
848 | unsigned long n = (unsigned long) v - 1; | |
cf8ba7a9 | 849 | int i; |
1da177e4 | 850 | |
31ee4b2f | 851 | s390_adjust_jiffies(); |
b7ae9dd8 | 852 | preempt_disable(); |
1da177e4 LT |
853 | if (!n) { |
854 | seq_printf(m, "vendor_id : IBM/S390\n" | |
855 | "# processors : %i\n" | |
856 | "bogomips per cpu: %lu.%02lu\n", | |
857 | num_online_cpus(), loops_per_jiffy/(500000/HZ), | |
858 | (loops_per_jiffy/(5000/HZ))%100); | |
cf8ba7a9 | 859 | seq_puts(m, "features\t: "); |
53492b1d | 860 | for (i = 0; i < 8; i++) |
cf8ba7a9 MS |
861 | if (hwcap_str[i] && (elf_hwcap & (1UL << i))) |
862 | seq_printf(m, "%s ", hwcap_str[i]); | |
863 | seq_puts(m, "\n"); | |
1da177e4 | 864 | } |
cf8ba7a9 | 865 | |
1da177e4 LT |
866 | if (cpu_online(n)) { |
867 | #ifdef CONFIG_SMP | |
868 | if (smp_processor_id() == n) | |
869 | cpuinfo = &S390_lowcore.cpu_data; | |
870 | else | |
871 | cpuinfo = &lowcore_ptr[n]->cpu_data; | |
872 | #else | |
873 | cpuinfo = &S390_lowcore.cpu_data; | |
874 | #endif | |
875 | seq_printf(m, "processor %li: " | |
876 | "version = %02X, " | |
877 | "identification = %06X, " | |
878 | "machine = %04X\n", | |
879 | n, cpuinfo->cpu_id.version, | |
880 | cpuinfo->cpu_id.ident, | |
881 | cpuinfo->cpu_id.machine); | |
882 | } | |
b7ae9dd8 | 883 | preempt_enable(); |
1da177e4 LT |
884 | return 0; |
885 | } | |
886 | ||
887 | static void *c_start(struct seq_file *m, loff_t *pos) | |
888 | { | |
889 | return *pos < NR_CPUS ? (void *)((unsigned long) *pos + 1) : NULL; | |
890 | } | |
891 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
892 | { | |
893 | ++*pos; | |
894 | return c_start(m, pos); | |
895 | } | |
896 | static void c_stop(struct seq_file *m, void *v) | |
897 | { | |
898 | } | |
5c81cdbe | 899 | const struct seq_operations cpuinfo_op = { |
1da177e4 LT |
900 | .start = c_start, |
901 | .next = c_next, | |
902 | .stop = c_stop, | |
903 | .show = show_cpuinfo, | |
904 | }; | |
905 |