Merge branch 'drm-nouveau-fixes-3.8' of git://anongit.freedesktop.org/git/nouveau...
[deliverable/linux.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4 1/*
8b646bd7 2 * SMP related functions
1da177e4 3 *
a53c8fab 4 * Copyright IBM Corp. 1999, 2012
8b646bd7
MS
5 * Author(s): Denis Joseph Barrow,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
8b646bd7
MS
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
1da177e4
LT
16 */
17
395d31d4
MS
18#define KMSG_COMPONENT "cpu"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
f230886b 21#include <linux/workqueue.h>
1da177e4
LT
22#include <linux/module.h>
23#include <linux/init.h>
1da177e4 24#include <linux/mm.h>
4e950f6f 25#include <linux/err.h>
1da177e4
LT
26#include <linux/spinlock.h>
27#include <linux/kernel_stat.h>
1da177e4 28#include <linux/delay.h>
1da177e4 29#include <linux/interrupt.h>
3324e60a 30#include <linux/irqflags.h>
1da177e4 31#include <linux/cpu.h>
5a0e3ad6 32#include <linux/slab.h>
60a0c68d 33#include <linux/crash_dump.h>
cbb870c8 34#include <asm/asm-offsets.h>
1e3cab2f
HC
35#include <asm/switch_to.h>
36#include <asm/facility.h>
46b05d26 37#include <asm/ipl.h>
2b67fc46 38#include <asm/setup.h>
1da177e4 39#include <asm/irq.h>
1da177e4 40#include <asm/tlbflush.h>
27f6b416 41#include <asm/vtimer.h>
411ed322 42#include <asm/lowcore.h>
08d07968 43#include <asm/sclp.h>
c742b31c 44#include <asm/vdso.h>
3ab121ab 45#include <asm/debug.h>
4857d4bb 46#include <asm/os_info.h>
a9ae32c3 47#include <asm/sigp.h>
a806170e 48#include "entry.h"
1da177e4 49
8b646bd7
MS
50enum {
51 ec_schedule = 0,
52 ec_call_function,
53 ec_call_function_single,
54 ec_stop_cpu,
55};
08d07968 56
8b646bd7 57enum {
08d07968
HC
58 CPU_STATE_STANDBY,
59 CPU_STATE_CONFIGURED,
60};
61
8b646bd7
MS
62struct pcpu {
63 struct cpu cpu;
8b646bd7
MS
64 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
65 unsigned long async_stack; /* async stack for the cpu */
66 unsigned long panic_stack; /* panic stack for the cpu */
67 unsigned long ec_mask; /* bit mask for ec_xxx functions */
68 int state; /* physical cpu state */
50ab9a9a 69 int polarization; /* physical polarization */
8b646bd7
MS
70 u16 address; /* physical cpu address */
71};
72
73static u8 boot_cpu_type;
74static u16 boot_cpu_address;
75static struct pcpu pcpu_devices[NR_CPUS];
76
50ab9a9a
HC
77/*
78 * The smp_cpu_state_mutex must be held when changing the state or polarization
79 * member of a pcpu data structure within the pcpu_devices arreay.
80 */
dbd70fb4 81DEFINE_MUTEX(smp_cpu_state_mutex);
08d07968 82
8b646bd7
MS
83/*
84 * Signal processor helper functions.
85 */
86static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
87{
88 register unsigned int reg1 asm ("1") = parm;
89 int cc;
08d07968 90
8b646bd7
MS
91 asm volatile(
92 " sigp %1,%2,0(%3)\n"
93 " ipm %0\n"
94 " srl %0,28\n"
95 : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
96 if (status && cc == 1)
97 *status = reg1;
98 return cc;
99}
1da177e4 100
8b646bd7 101static inline int __pcpu_sigp_relax(u16 addr, u8 order, u32 parm, u32 *status)
5c0b912e 102{
8b646bd7 103 int cc;
5c0b912e 104
8b646bd7 105 while (1) {
c5e3acd6 106 cc = __pcpu_sigp(addr, order, parm, NULL);
a9ae32c3 107 if (cc != SIGP_CC_BUSY)
8b646bd7
MS
108 return cc;
109 cpu_relax();
5c0b912e 110 }
5c0b912e
HC
111}
112
8b646bd7 113static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
a93b8ec1 114{
8b646bd7
MS
115 int cc, retry;
116
117 for (retry = 0; ; retry++) {
c5e3acd6 118 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
a9ae32c3 119 if (cc != SIGP_CC_BUSY)
8b646bd7
MS
120 break;
121 if (retry >= 3)
122 udelay(10);
123 }
124 return cc;
125}
126
127static inline int pcpu_stopped(struct pcpu *pcpu)
128{
41459d36 129 u32 uninitialized_var(status);
c5e3acd6 130
a9ae32c3 131 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
c5e3acd6 132 0, &status) != SIGP_CC_STATUS_STORED)
8b646bd7 133 return 0;
c5e3acd6 134 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
8b646bd7
MS
135}
136
137static inline int pcpu_running(struct pcpu *pcpu)
a93b8ec1 138{
a9ae32c3 139 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
c5e3acd6 140 0, NULL) != SIGP_CC_STATUS_STORED)
8b646bd7 141 return 1;
524b24ad
HC
142 /* Status stored condition code is equivalent to cpu not running. */
143 return 0;
a93b8ec1
HC
144}
145
1943f53c 146/*
8b646bd7 147 * Find struct pcpu by cpu address.
1943f53c 148 */
8b646bd7 149static struct pcpu *pcpu_find_address(const struct cpumask *mask, int address)
1943f53c
MH
150{
151 int cpu;
152
8b646bd7
MS
153 for_each_cpu(cpu, mask)
154 if (pcpu_devices[cpu].address == address)
155 return pcpu_devices + cpu;
156 return NULL;
157}
158
159static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
160{
161 int order;
162
163 set_bit(ec_bit, &pcpu->ec_mask);
164 order = pcpu_running(pcpu) ?
a9ae32c3 165 SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
8b646bd7
MS
166 pcpu_sigp_retry(pcpu, order, 0);
167}
168
169static int __cpuinit pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
170{
171 struct _lowcore *lc;
172
173 if (pcpu != &pcpu_devices[0]) {
174 pcpu->lowcore = (struct _lowcore *)
175 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
176 pcpu->async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
177 pcpu->panic_stack = __get_free_page(GFP_KERNEL);
178 if (!pcpu->lowcore || !pcpu->panic_stack || !pcpu->async_stack)
179 goto out;
1943f53c 180 }
8b646bd7
MS
181 lc = pcpu->lowcore;
182 memcpy(lc, &S390_lowcore, 512);
183 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
184 lc->async_stack = pcpu->async_stack + ASYNC_SIZE;
185 lc->panic_stack = pcpu->panic_stack + PAGE_SIZE;
186 lc->cpu_nr = cpu;
187#ifndef CONFIG_64BIT
188 if (MACHINE_HAS_IEEE) {
189 lc->extended_save_area_addr = get_zeroed_page(GFP_KERNEL);
190 if (!lc->extended_save_area_addr)
191 goto out;
192 }
193#else
194 if (vdso_alloc_per_cpu(lc))
195 goto out;
196#endif
197 lowcore_ptr[cpu] = lc;
a9ae32c3 198 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
8b646bd7
MS
199 return 0;
200out:
201 if (pcpu != &pcpu_devices[0]) {
202 free_page(pcpu->panic_stack);
203 free_pages(pcpu->async_stack, ASYNC_ORDER);
204 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
205 }
206 return -ENOMEM;
1943f53c
MH
207}
208
9d0f46af
HC
209#ifdef CONFIG_HOTPLUG_CPU
210
8b646bd7 211static void pcpu_free_lowcore(struct pcpu *pcpu)
2c2df118 212{
a9ae32c3 213 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
8b646bd7
MS
214 lowcore_ptr[pcpu - pcpu_devices] = NULL;
215#ifndef CONFIG_64BIT
216 if (MACHINE_HAS_IEEE) {
217 struct _lowcore *lc = pcpu->lowcore;
218
219 free_page((unsigned long) lc->extended_save_area_addr);
220 lc->extended_save_area_addr = 0;
221 }
222#else
223 vdso_free_per_cpu(pcpu->lowcore);
224#endif
225 if (pcpu != &pcpu_devices[0]) {
226 free_page(pcpu->panic_stack);
227 free_pages(pcpu->async_stack, ASYNC_ORDER);
228 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
229 }
230}
231
9d0f46af
HC
232#endif /* CONFIG_HOTPLUG_CPU */
233
8b646bd7
MS
234static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
235{
236 struct _lowcore *lc = pcpu->lowcore;
237
238 atomic_inc(&init_mm.context.attach_count);
239 lc->cpu_nr = cpu;
240 lc->percpu_offset = __per_cpu_offset[cpu];
241 lc->kernel_asce = S390_lowcore.kernel_asce;
242 lc->machine_flags = S390_lowcore.machine_flags;
243 lc->ftrace_func = S390_lowcore.ftrace_func;
244 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
245 __ctl_store(lc->cregs_save_area, 0, 15);
246 save_access_regs((unsigned int *) lc->access_regs_save_area);
247 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
248 MAX_FACILITY_BIT/8);
249}
250
251static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
252{
253 struct _lowcore *lc = pcpu->lowcore;
254 struct thread_info *ti = task_thread_info(tsk);
255
256 lc->kernel_stack = (unsigned long) task_stack_page(tsk) + THREAD_SIZE;
257 lc->thread_info = (unsigned long) task_thread_info(tsk);
258 lc->current_task = (unsigned long) tsk;
259 lc->user_timer = ti->user_timer;
260 lc->system_timer = ti->system_timer;
261 lc->steal_timer = 0;
262}
263
264static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
265{
266 struct _lowcore *lc = pcpu->lowcore;
267
268 lc->restart_stack = lc->kernel_stack;
269 lc->restart_fn = (unsigned long) func;
270 lc->restart_data = (unsigned long) data;
271 lc->restart_source = -1UL;
a9ae32c3 272 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
8b646bd7
MS
273}
274
275/*
276 * Call function via PSW restart on pcpu and stop the current cpu.
277 */
278static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
279 void *data, unsigned long stack)
280{
061da3df 281 struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
fbe76568 282 unsigned long source_cpu = stap();
8b646bd7
MS
283
284 __load_psw_mask(psw_kernel_bits);
fbe76568 285 if (pcpu->address == source_cpu)
8b646bd7
MS
286 func(data); /* should not return */
287 /* Stop target cpu (if func returns this stops the current cpu). */
a9ae32c3 288 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
8b646bd7 289 /* Restart func on the target cpu and stop the current cpu. */
fbe76568
HC
290 mem_assign_absolute(lc->restart_stack, stack);
291 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
292 mem_assign_absolute(lc->restart_data, (unsigned long) data);
293 mem_assign_absolute(lc->restart_source, source_cpu);
8b646bd7 294 asm volatile(
eb546195 295 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
8b646bd7 296 " brc 2,0b # busy, try again\n"
eb546195 297 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
8b646bd7 298 " brc 2,1b # busy, try again\n"
fbe76568 299 : : "d" (pcpu->address), "d" (source_cpu),
eb546195
HC
300 "K" (SIGP_RESTART), "K" (SIGP_STOP)
301 : "0", "1", "cc");
8b646bd7
MS
302 for (;;) ;
303}
304
305/*
306 * Call function on an online CPU.
307 */
308void smp_call_online_cpu(void (*func)(void *), void *data)
309{
310 struct pcpu *pcpu;
311
312 /* Use the current cpu if it is online. */
313 pcpu = pcpu_find_address(cpu_online_mask, stap());
314 if (!pcpu)
315 /* Use the first online cpu. */
316 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
317 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
318}
319
320/*
321 * Call function on the ipl CPU.
322 */
323void smp_call_ipl_cpu(void (*func)(void *), void *data)
324{
c6da39f2
MH
325 pcpu_delegate(&pcpu_devices[0], func, data,
326 pcpu_devices->panic_stack + PAGE_SIZE);
8b646bd7
MS
327}
328
329int smp_find_processor_id(u16 address)
330{
331 int cpu;
332
333 for_each_present_cpu(cpu)
334 if (pcpu_devices[cpu].address == address)
335 return cpu;
336 return -1;
2c2df118
HC
337}
338
8b646bd7 339int smp_vcpu_scheduled(int cpu)
85ac7ca5 340{
8b646bd7
MS
341 return pcpu_running(pcpu_devices + cpu);
342}
343
344void smp_yield(void)
345{
346 if (MACHINE_HAS_DIAG44)
347 asm volatile("diag 0,0,0x44");
2c2df118
HC
348}
349
8b646bd7 350void smp_yield_cpu(int cpu)
85ac7ca5 351{
8b646bd7
MS
352 if (MACHINE_HAS_DIAG9C)
353 asm volatile("diag %0,0,0x9c"
354 : : "d" (pcpu_devices[cpu].address));
355 else if (MACHINE_HAS_DIAG44)
356 asm volatile("diag 0,0,0x44");
357}
358
359/*
360 * Send cpus emergency shutdown signal. This gives the cpus the
361 * opportunity to complete outstanding interrupts.
362 */
363void smp_emergency_stop(cpumask_t *cpumask)
364{
365 u64 end;
366 int cpu;
367
368 end = get_clock() + (1000000UL << 12);
369 for_each_cpu(cpu, cpumask) {
370 struct pcpu *pcpu = pcpu_devices + cpu;
371 set_bit(ec_stop_cpu, &pcpu->ec_mask);
a9ae32c3
HC
372 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
373 0, NULL) == SIGP_CC_BUSY &&
8b646bd7
MS
374 get_clock() < end)
375 cpu_relax();
376 }
377 while (get_clock() < end) {
378 for_each_cpu(cpu, cpumask)
379 if (pcpu_stopped(pcpu_devices + cpu))
380 cpumask_clear_cpu(cpu, cpumask);
381 if (cpumask_empty(cpumask))
382 break;
85ac7ca5 383 cpu_relax();
8b646bd7 384 }
85ac7ca5
MS
385}
386
8b646bd7
MS
387/*
388 * Stop all cpus but the current one.
389 */
677d7623 390void smp_send_stop(void)
1da177e4 391{
85ac7ca5
MS
392 cpumask_t cpumask;
393 int cpu;
1da177e4 394
677d7623 395 /* Disable all interrupts/machine checks */
b50511e4 396 __load_psw_mask(psw_kernel_bits | PSW_MASK_DAT);
3324e60a 397 trace_hardirqs_off();
1da177e4 398
3ab121ab 399 debug_set_critical();
85ac7ca5
MS
400 cpumask_copy(&cpumask, cpu_online_mask);
401 cpumask_clear_cpu(smp_processor_id(), &cpumask);
402
8b646bd7
MS
403 if (oops_in_progress)
404 smp_emergency_stop(&cpumask);
1da177e4 405
85ac7ca5
MS
406 /* stop all processors */
407 for_each_cpu(cpu, &cpumask) {
8b646bd7 408 struct pcpu *pcpu = pcpu_devices + cpu;
a9ae32c3 409 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
8b646bd7 410 while (!pcpu_stopped(pcpu))
c6b5b847
HC
411 cpu_relax();
412 }
413}
414
8b646bd7
MS
415/*
416 * Stop the current cpu.
417 */
418void smp_stop_cpu(void)
419{
a9ae32c3 420 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
8b646bd7
MS
421 for (;;) ;
422}
423
1da177e4
LT
424/*
425 * This is the main routine where commands issued by other
426 * cpus are handled.
427 */
fde15c3a 428static void do_ext_call_interrupt(struct ext_code ext_code,
f6649a7e 429 unsigned int param32, unsigned long param64)
1da177e4 430{
39ce010d 431 unsigned long bits;
8b646bd7 432 int cpu;
1da177e4 433
8b646bd7 434 cpu = smp_processor_id();
fde15c3a 435 if (ext_code.code == 0x1202)
420f42ec 436 inc_irq_stat(IRQEXT_EXC);
2a3a2d66 437 else
420f42ec 438 inc_irq_stat(IRQEXT_EMS);
39ce010d
HC
439 /*
440 * handle bit signal external calls
39ce010d 441 */
8b646bd7 442 bits = xchg(&pcpu_devices[cpu].ec_mask, 0);
1da177e4 443
85ac7ca5
MS
444 if (test_bit(ec_stop_cpu, &bits))
445 smp_stop_cpu();
446
184748cc
PZ
447 if (test_bit(ec_schedule, &bits))
448 scheduler_ipi();
449
39ce010d 450 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
451 generic_smp_call_function_interrupt();
452
453 if (test_bit(ec_call_function_single, &bits))
454 generic_smp_call_function_single_interrupt();
85ac7ca5 455
1da177e4
LT
456}
457
630cd046 458void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
459{
460 int cpu;
461
630cd046 462 for_each_cpu(cpu, mask)
8b646bd7 463 pcpu_ec_call(pcpu_devices + cpu, ec_call_function);
ca9fc75a
HC
464}
465
466void arch_send_call_function_single_ipi(int cpu)
467{
8b646bd7 468 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
ca9fc75a
HC
469}
470
347a8dc3 471#ifndef CONFIG_64BIT
1da177e4
LT
472/*
473 * this function sends a 'purge tlb' signal to another CPU.
474 */
a806170e 475static void smp_ptlb_callback(void *info)
1da177e4 476{
ba8a9229 477 __tlb_flush_local();
1da177e4
LT
478}
479
480void smp_ptlb_all(void)
481{
15c8b6c1 482 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
483}
484EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 485#endif /* ! CONFIG_64BIT */
1da177e4
LT
486
487/*
488 * this function sends a 'reschedule' IPI to another CPU.
489 * it goes straight through and wastes no time serializing
490 * anything. Worst case is that we lose a reschedule ...
491 */
492void smp_send_reschedule(int cpu)
493{
8b646bd7 494 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
1da177e4
LT
495}
496
497/*
498 * parameter area for the set/clear control bit callbacks
499 */
94c12cc7 500struct ec_creg_mask_parms {
8b646bd7
MS
501 unsigned long orval;
502 unsigned long andval;
503 int cr;
94c12cc7 504};
1da177e4
LT
505
506/*
507 * callback for setting/clearing control bits
508 */
39ce010d
HC
509static void smp_ctl_bit_callback(void *info)
510{
94c12cc7 511 struct ec_creg_mask_parms *pp = info;
1da177e4 512 unsigned long cregs[16];
39ce010d 513
94c12cc7 514 __ctl_store(cregs, 0, 15);
8b646bd7 515 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
94c12cc7 516 __ctl_load(cregs, 0, 15);
1da177e4
LT
517}
518
519/*
520 * Set a bit in a control register of all cpus
521 */
94c12cc7
MS
522void smp_ctl_set_bit(int cr, int bit)
523{
8b646bd7 524 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
1da177e4 525
15c8b6c1 526 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 527}
39ce010d 528EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
529
530/*
531 * Clear a bit in a control register of all cpus
532 */
94c12cc7
MS
533void smp_ctl_clear_bit(int cr, int bit)
534{
8b646bd7 535 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
1da177e4 536
15c8b6c1 537 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 538}
39ce010d 539EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 540
60a0c68d 541#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_CRASH_DUMP)
411ed322 542
8b646bd7
MS
543struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
544EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
545
546static void __init smp_get_save_area(int cpu, u16 address)
411ed322 547{
8b646bd7
MS
548 void *lc = pcpu_devices[0].lowcore;
549 struct save_area *save_area;
550
60a0c68d 551 if (is_kdump_kernel())
411ed322 552 return;
8b646bd7
MS
553 if (!OLDMEM_BASE && (address == boot_cpu_address ||
554 ipl_info.type != IPL_TYPE_FCP_DUMP))
555 return;
285f6722 556 if (cpu >= NR_CPUS) {
8b646bd7
MS
557 pr_warning("CPU %i exceeds the maximum %i and is excluded "
558 "from the dump\n", cpu, NR_CPUS - 1);
285f6722 559 return;
411ed322 560 }
8b646bd7
MS
561 save_area = kmalloc(sizeof(struct save_area), GFP_KERNEL);
562 if (!save_area)
563 panic("could not allocate memory for save area\n");
564 zfcpdump_save_areas[cpu] = save_area;
565#ifdef CONFIG_CRASH_DUMP
566 if (address == boot_cpu_address) {
567 /* Copy the registers of the boot cpu. */
568 copy_oldmem_page(1, (void *) save_area, sizeof(*save_area),
569 SAVE_AREA_BASE - PAGE_SIZE, 0);
570 return;
571 }
572#endif
573 /* Get the registers of a non-boot cpu. */
a9ae32c3 574 __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
8b646bd7 575 memcpy_real(save_area, lc + SAVE_AREA_BASE, sizeof(*save_area));
411ed322
MH
576}
577
8b646bd7 578int smp_store_status(int cpu)
08d07968 579{
8b646bd7 580 struct pcpu *pcpu;
08d07968 581
8b646bd7 582 pcpu = pcpu_devices + cpu;
a9ae32c3
HC
583 if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
584 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
8b646bd7 585 return -EIO;
08d07968
HC
586 return 0;
587}
588
8b646bd7 589#else /* CONFIG_ZFCPDUMP || CONFIG_CRASH_DUMP */
08d07968 590
8b646bd7 591static inline void smp_get_save_area(int cpu, u16 address) { }
08d07968 592
8b646bd7 593#endif /* CONFIG_ZFCPDUMP || CONFIG_CRASH_DUMP */
08d07968 594
50ab9a9a
HC
595void smp_cpu_set_polarization(int cpu, int val)
596{
597 pcpu_devices[cpu].polarization = val;
598}
599
600int smp_cpu_get_polarization(int cpu)
601{
602 return pcpu_devices[cpu].polarization;
603}
604
8b646bd7 605static struct sclp_cpu_info *smp_get_cpu_info(void)
08d07968 606{
8b646bd7 607 static int use_sigp_detection;
08d07968 608 struct sclp_cpu_info *info;
8b646bd7
MS
609 int address;
610
611 info = kzalloc(sizeof(*info), GFP_KERNEL);
612 if (info && (use_sigp_detection || sclp_get_cpu_info(info))) {
613 use_sigp_detection = 1;
614 for (address = 0; address <= MAX_CPU_ADDRESS; address++) {
a9ae32c3
HC
615 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
616 SIGP_CC_NOT_OPERATIONAL)
8b646bd7
MS
617 continue;
618 info->cpu[info->configured].address = address;
619 info->configured++;
620 }
621 info->combined = info->configured;
08d07968 622 }
8b646bd7 623 return info;
08d07968
HC
624}
625
eba61970 626static int __cpuinit smp_add_present_cpu(int cpu);
8b646bd7 627
eba61970
HC
628static int __cpuinit __smp_rescan_cpus(struct sclp_cpu_info *info,
629 int sysfs_add)
08d07968 630{
8b646bd7 631 struct pcpu *pcpu;
08d07968 632 cpumask_t avail;
8b646bd7 633 int cpu, nr, i;
08d07968 634
8b646bd7 635 nr = 0;
0f1959f5 636 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
8b646bd7
MS
637 cpu = cpumask_first(&avail);
638 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
639 if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
640 continue;
641 if (pcpu_find_address(cpu_present_mask, info->cpu[i].address))
642 continue;
643 pcpu = pcpu_devices + cpu;
644 pcpu->address = info->cpu[i].address;
645 pcpu->state = (cpu >= info->configured) ?
646 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
50ab9a9a 647 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
8b646bd7
MS
648 set_cpu_present(cpu, true);
649 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
650 set_cpu_present(cpu, false);
651 else
652 nr++;
653 cpu = cpumask_next(cpu, &avail);
654 }
655 return nr;
1da177e4
LT
656}
657
48483b32
HC
658static void __init smp_detect_cpus(void)
659{
660 unsigned int cpu, c_cpus, s_cpus;
661 struct sclp_cpu_info *info;
48483b32 662
8b646bd7 663 info = smp_get_cpu_info();
48483b32
HC
664 if (!info)
665 panic("smp_detect_cpus failed to allocate memory\n");
48483b32
HC
666 if (info->has_cpu_type) {
667 for (cpu = 0; cpu < info->combined; cpu++) {
8b646bd7
MS
668 if (info->cpu[cpu].address != boot_cpu_address)
669 continue;
670 /* The boot cpu dictates the cpu type. */
671 boot_cpu_type = info->cpu[cpu].type;
672 break;
48483b32
HC
673 }
674 }
8b646bd7 675 c_cpus = s_cpus = 0;
48483b32 676 for (cpu = 0; cpu < info->combined; cpu++) {
8b646bd7 677 if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type)
48483b32 678 continue;
8b646bd7
MS
679 if (cpu < info->configured) {
680 smp_get_save_area(c_cpus, info->cpu[cpu].address);
681 c_cpus++;
682 } else
48483b32 683 s_cpus++;
48483b32 684 }
395d31d4 685 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 686 get_online_cpus();
8b646bd7 687 __smp_rescan_cpus(info, 0);
9d40d2e3 688 put_online_cpus();
8b646bd7 689 kfree(info);
48483b32
HC
690}
691
1da177e4 692/*
39ce010d 693 * Activate a secondary processor.
1da177e4 694 */
8b646bd7 695static void __cpuinit smp_start_secondary(void *cpuvoid)
1da177e4 696{
8b646bd7
MS
697 S390_lowcore.last_update_clock = get_clock();
698 S390_lowcore.restart_stack = (unsigned long) restart_stack;
699 S390_lowcore.restart_fn = (unsigned long) do_restart;
700 S390_lowcore.restart_data = 0;
701 S390_lowcore.restart_source = -1UL;
702 restore_access_regs(S390_lowcore.access_regs_save_area);
703 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
704 __load_psw_mask(psw_kernel_bits | PSW_MASK_DAT);
39ce010d 705 cpu_init();
5bfb5d69 706 preempt_disable();
39ce010d 707 init_cpu_timer();
39ce010d 708 init_cpu_vtimer();
29b08d2b 709 pfault_init();
e545a614 710 notify_cpu_starting(smp_processor_id());
0f1959f5 711 set_cpu_online(smp_processor_id(), true);
93f3b2ee 712 inc_irq_stat(CPU_RST);
1da177e4 713 local_irq_enable();
39ce010d
HC
714 /* cpu_idle will call schedule for us */
715 cpu_idle();
1da177e4
LT
716}
717
1da177e4 718/* Upping and downing of CPUs */
8239c25f 719int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
1da177e4 720{
8b646bd7
MS
721 struct pcpu *pcpu;
722 int rc;
1da177e4 723
8b646bd7
MS
724 pcpu = pcpu_devices + cpu;
725 if (pcpu->state != CPU_STATE_CONFIGURED)
08d07968 726 return -EIO;
a9ae32c3
HC
727 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
728 SIGP_CC_ORDER_CODE_ACCEPTED)
08d07968 729 return -EIO;
e80e7813 730
8b646bd7
MS
731 rc = pcpu_alloc_lowcore(pcpu, cpu);
732 if (rc)
733 return rc;
734 pcpu_prepare_secondary(pcpu, cpu);
e80e7813 735 pcpu_attach_task(pcpu, tidle);
8b646bd7 736 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
1da177e4
LT
737 while (!cpu_online(cpu))
738 cpu_relax();
739 return 0;
740}
741
48483b32 742static int __init setup_possible_cpus(char *s)
255acee7 743{
8b646bd7 744 int max, cpu;
255acee7 745
8b646bd7
MS
746 if (kstrtoint(s, 0, &max) < 0)
747 return 0;
88e01285 748 init_cpu_possible(cpumask_of(0));
8b646bd7 749 for (cpu = 1; cpu < max && cpu < nr_cpu_ids; cpu++)
def6cfb7 750 set_cpu_possible(cpu, true);
37a33026
HC
751 return 0;
752}
753early_param("possible_cpus", setup_possible_cpus);
754
48483b32
HC
755#ifdef CONFIG_HOTPLUG_CPU
756
39ce010d 757int __cpu_disable(void)
1da177e4 758{
8b646bd7 759 unsigned long cregs[16];
1da177e4 760
8b646bd7
MS
761 set_cpu_online(smp_processor_id(), false);
762 /* Disable pseudo page faults on this cpu. */
29b08d2b 763 pfault_fini();
8b646bd7
MS
764 /* Disable interrupt sources via control register. */
765 __ctl_store(cregs, 0, 15);
766 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
767 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
768 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
769 __ctl_load(cregs, 0, 15);
1da177e4
LT
770 return 0;
771}
772
39ce010d 773void __cpu_die(unsigned int cpu)
1da177e4 774{
8b646bd7
MS
775 struct pcpu *pcpu;
776
1da177e4 777 /* Wait until target cpu is down */
8b646bd7
MS
778 pcpu = pcpu_devices + cpu;
779 while (!pcpu_stopped(pcpu))
1da177e4 780 cpu_relax();
8b646bd7 781 pcpu_free_lowcore(pcpu);
050eef36 782 atomic_dec(&init_mm.context.attach_count);
1da177e4
LT
783}
784
b456d94a 785void __noreturn cpu_die(void)
1da177e4
LT
786{
787 idle_task_exit();
a9ae32c3 788 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
8b646bd7 789 for (;;) ;
1da177e4
LT
790}
791
255acee7
HC
792#endif /* CONFIG_HOTPLUG_CPU */
793
1da177e4
LT
794void __init smp_prepare_cpus(unsigned int max_cpus)
795{
39ce010d
HC
796 /* request the 0x1201 emergency signal external interrupt */
797 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
798 panic("Couldn't request external interrupt 0x1201");
d98e19cc
MS
799 /* request the 0x1202 external call external interrupt */
800 if (register_external_interrupt(0x1202, do_ext_call_interrupt) != 0)
801 panic("Couldn't request external interrupt 0x1202");
8b646bd7 802 smp_detect_cpus();
1da177e4
LT
803}
804
ea1f4eec 805void __init smp_prepare_boot_cpu(void)
1da177e4 806{
8b646bd7
MS
807 struct pcpu *pcpu = pcpu_devices;
808
809 boot_cpu_address = stap();
8b646bd7
MS
810 pcpu->state = CPU_STATE_CONFIGURED;
811 pcpu->address = boot_cpu_address;
812 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
813 pcpu->async_stack = S390_lowcore.async_stack - ASYNC_SIZE;
814 pcpu->panic_stack = S390_lowcore.panic_stack - PAGE_SIZE;
1da177e4 815 S390_lowcore.percpu_offset = __per_cpu_offset[0];
50ab9a9a 816 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
8b646bd7
MS
817 set_cpu_present(0, true);
818 set_cpu_online(0, true);
1da177e4
LT
819}
820
ea1f4eec 821void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 822{
1da177e4
LT
823}
824
02beaccc
HC
825void __init smp_setup_processor_id(void)
826{
827 S390_lowcore.cpu_nr = 0;
02beaccc
HC
828}
829
1da177e4
LT
830/*
831 * the frequency of the profiling timer can be changed
832 * by writing a multiplier value into /proc/profile.
833 *
834 * usually you want to run this on all CPUs ;)
835 */
836int setup_profiling_timer(unsigned int multiplier)
837{
39ce010d 838 return 0;
1da177e4
LT
839}
840
08d07968 841#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 842static ssize_t cpu_configure_show(struct device *dev,
8b646bd7 843 struct device_attribute *attr, char *buf)
08d07968
HC
844{
845 ssize_t count;
846
847 mutex_lock(&smp_cpu_state_mutex);
8b646bd7 848 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
08d07968
HC
849 mutex_unlock(&smp_cpu_state_mutex);
850 return count;
851}
852
8a25a2fd 853static ssize_t cpu_configure_store(struct device *dev,
8b646bd7
MS
854 struct device_attribute *attr,
855 const char *buf, size_t count)
08d07968 856{
8b646bd7
MS
857 struct pcpu *pcpu;
858 int cpu, val, rc;
08d07968
HC
859 char delim;
860
861 if (sscanf(buf, "%d %c", &val, &delim) != 1)
862 return -EINVAL;
863 if (val != 0 && val != 1)
864 return -EINVAL;
9d40d2e3 865 get_online_cpus();
0b18d318 866 mutex_lock(&smp_cpu_state_mutex);
08d07968 867 rc = -EBUSY;
2c2df118 868 /* disallow configuration changes of online cpus and cpu 0 */
8b646bd7 869 cpu = dev->id;
2c2df118 870 if (cpu_online(cpu) || cpu == 0)
08d07968 871 goto out;
8b646bd7 872 pcpu = pcpu_devices + cpu;
08d07968
HC
873 rc = 0;
874 switch (val) {
875 case 0:
8b646bd7
MS
876 if (pcpu->state != CPU_STATE_CONFIGURED)
877 break;
878 rc = sclp_cpu_deconfigure(pcpu->address);
879 if (rc)
880 break;
881 pcpu->state = CPU_STATE_STANDBY;
50ab9a9a 882 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
8b646bd7 883 topology_expect_change();
08d07968
HC
884 break;
885 case 1:
8b646bd7
MS
886 if (pcpu->state != CPU_STATE_STANDBY)
887 break;
888 rc = sclp_cpu_configure(pcpu->address);
889 if (rc)
890 break;
891 pcpu->state = CPU_STATE_CONFIGURED;
50ab9a9a 892 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
8b646bd7 893 topology_expect_change();
08d07968
HC
894 break;
895 default:
896 break;
897 }
898out:
08d07968 899 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 900 put_online_cpus();
08d07968
HC
901 return rc ? rc : count;
902}
8a25a2fd 903static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
08d07968
HC
904#endif /* CONFIG_HOTPLUG_CPU */
905
8a25a2fd
KS
906static ssize_t show_cpu_address(struct device *dev,
907 struct device_attribute *attr, char *buf)
08d07968 908{
8b646bd7 909 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
08d07968 910}
8a25a2fd 911static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
08d07968 912
08d07968
HC
913static struct attribute *cpu_common_attrs[] = {
914#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 915 &dev_attr_configure.attr,
08d07968 916#endif
8a25a2fd 917 &dev_attr_address.attr,
08d07968
HC
918 NULL,
919};
920
921static struct attribute_group cpu_common_attr_group = {
922 .attrs = cpu_common_attrs,
923};
1da177e4 924
8a25a2fd
KS
925static ssize_t show_idle_count(struct device *dev,
926 struct device_attribute *attr, char *buf)
fae8b22d 927{
4c1051e3 928 struct s390_idle_data *idle = &per_cpu(s390_idle, dev->id);
fae8b22d 929 unsigned long long idle_count;
e98bbaaf 930 unsigned int sequence;
fae8b22d 931
4c1051e3
MS
932 do {
933 sequence = ACCESS_ONCE(idle->sequence);
934 idle_count = ACCESS_ONCE(idle->idle_count);
27f6b416 935 if (ACCESS_ONCE(idle->clock_idle_enter))
4c1051e3
MS
936 idle_count++;
937 } while ((sequence & 1) || (idle->sequence != sequence));
fae8b22d
HC
938 return sprintf(buf, "%llu\n", idle_count);
939}
8a25a2fd 940static DEVICE_ATTR(idle_count, 0444, show_idle_count, NULL);
fae8b22d 941
8a25a2fd
KS
942static ssize_t show_idle_time(struct device *dev,
943 struct device_attribute *attr, char *buf)
fae8b22d 944{
4c1051e3
MS
945 struct s390_idle_data *idle = &per_cpu(s390_idle, dev->id);
946 unsigned long long now, idle_time, idle_enter, idle_exit;
e98bbaaf 947 unsigned int sequence;
fae8b22d 948
4c1051e3
MS
949 do {
950 now = get_clock();
951 sequence = ACCESS_ONCE(idle->sequence);
952 idle_time = ACCESS_ONCE(idle->idle_time);
27f6b416
MS
953 idle_enter = ACCESS_ONCE(idle->clock_idle_enter);
954 idle_exit = ACCESS_ONCE(idle->clock_idle_exit);
4c1051e3
MS
955 } while ((sequence & 1) || (idle->sequence != sequence));
956 idle_time += idle_enter ? ((idle_exit ? : now) - idle_enter) : 0;
6f430924 957 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 958}
8a25a2fd 959static DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 960
08d07968 961static struct attribute *cpu_online_attrs[] = {
8a25a2fd
KS
962 &dev_attr_idle_count.attr,
963 &dev_attr_idle_time_us.attr,
fae8b22d
HC
964 NULL,
965};
966
08d07968
HC
967static struct attribute_group cpu_online_attr_group = {
968 .attrs = cpu_online_attrs,
fae8b22d
HC
969};
970
2fc2d1e9
HC
971static int __cpuinit smp_cpu_notify(struct notifier_block *self,
972 unsigned long action, void *hcpu)
973{
974 unsigned int cpu = (unsigned int)(long)hcpu;
8b646bd7 975 struct cpu *c = &pcpu_devices[cpu].cpu;
8a25a2fd 976 struct device *s = &c->dev;
d882ba69 977 int err = 0;
2fc2d1e9 978
1c725922 979 switch (action & ~CPU_TASKS_FROZEN) {
2fc2d1e9 980 case CPU_ONLINE:
d882ba69 981 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
982 break;
983 case CPU_DEAD:
08d07968 984 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
985 break;
986 }
d882ba69 987 return notifier_from_errno(err);
2fc2d1e9
HC
988}
989
eba61970 990static int __cpuinit smp_add_present_cpu(int cpu)
08d07968 991{
8b646bd7 992 struct cpu *c = &pcpu_devices[cpu].cpu;
8a25a2fd 993 struct device *s = &c->dev;
08d07968
HC
994 int rc;
995
996 c->hotpluggable = 1;
997 rc = register_cpu(c, cpu);
998 if (rc)
999 goto out;
1000 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1001 if (rc)
1002 goto out_cpu;
83a24e32
HC
1003 if (cpu_online(cpu)) {
1004 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1005 if (rc)
1006 goto out_online;
1007 }
1008 rc = topology_cpu_init(c);
1009 if (rc)
1010 goto out_topology;
1011 return 0;
1012
1013out_topology:
1014 if (cpu_online(cpu))
1015 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1016out_online:
08d07968
HC
1017 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1018out_cpu:
1019#ifdef CONFIG_HOTPLUG_CPU
1020 unregister_cpu(c);
1021#endif
1022out:
1023 return rc;
1024}
1025
1026#ifdef CONFIG_HOTPLUG_CPU
1e489518 1027
67060d9c 1028int __ref smp_rescan_cpus(void)
08d07968 1029{
8b646bd7
MS
1030 struct sclp_cpu_info *info;
1031 int nr;
08d07968 1032
8b646bd7
MS
1033 info = smp_get_cpu_info();
1034 if (!info)
1035 return -ENOMEM;
9d40d2e3 1036 get_online_cpus();
0b18d318 1037 mutex_lock(&smp_cpu_state_mutex);
8b646bd7 1038 nr = __smp_rescan_cpus(info, 1);
08d07968 1039 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1040 put_online_cpus();
8b646bd7
MS
1041 kfree(info);
1042 if (nr)
c10fde0d 1043 topology_schedule_update();
8b646bd7 1044 return 0;
1e489518
HC
1045}
1046
8a25a2fd
KS
1047static ssize_t __ref rescan_store(struct device *dev,
1048 struct device_attribute *attr,
c9be0a36 1049 const char *buf,
1e489518
HC
1050 size_t count)
1051{
1052 int rc;
1053
1054 rc = smp_rescan_cpus();
08d07968
HC
1055 return rc ? rc : count;
1056}
8a25a2fd 1057static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1058#endif /* CONFIG_HOTPLUG_CPU */
1059
83a24e32 1060static int __init s390_smp_init(void)
1da177e4 1061{
83a24e32 1062 int cpu, rc;
2fc2d1e9 1063
7755d6b2 1064 hotcpu_notifier(smp_cpu_notify, 0);
08d07968 1065#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 1066 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
08d07968
HC
1067 if (rc)
1068 return rc;
1069#endif
1070 for_each_present_cpu(cpu) {
1071 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1072 if (rc)
1073 return rc;
1da177e4
LT
1074 }
1075 return 0;
1076}
83a24e32 1077subsys_initcall(s390_smp_init);
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