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1 | /* |
2 | * S390 64-bit swsusp implementation | |
3 | * | |
4 | * Copyright IBM Corp. 2009 | |
5 | * | |
6 | * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com> | |
7 | * Michael Holzheu <holzheu@linux.vnet.ibm.com> | |
8 | */ | |
9 | ||
10 | #include <asm/page.h> | |
11 | #include <asm/ptrace.h> | |
12 | #include <asm/asm-offsets.h> | |
13 | ||
14 | /* | |
15 | * Save register context in absolute 0 lowcore and call swsusp_save() to | |
16 | * create in-memory kernel image. The context is saved in the designated | |
17 | * "store status" memory locations (see POP). | |
18 | * We return from this function twice. The first time during the suspend to | |
19 | * disk process. The second time via the swsusp_arch_resume() function | |
20 | * (see below) in the resume process. | |
21 | * This function runs with disabled interrupts. | |
22 | */ | |
23 | .section .text | |
c48ff644 | 24 | .align 4 |
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25 | .globl swsusp_arch_suspend |
26 | swsusp_arch_suspend: | |
27 | stmg %r6,%r15,__SF_GPRS(%r15) | |
28 | lgr %r1,%r15 | |
29 | aghi %r15,-STACK_FRAME_OVERHEAD | |
30 | stg %r1,__SF_BACKCHAIN(%r15) | |
31 | ||
32 | /* Deactivate DAT */ | |
33 | stnsm __SF_EMPTY(%r15),0xfb | |
34 | ||
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35 | /* Store prefix register on stack */ |
36 | stpx __SF_EMPTY(%r15) | |
37 | ||
5f954c34 HC |
38 | /* Save prefix register contents for lowcore */ |
39 | llgf %r4,__SF_EMPTY(%r15) | |
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40 | |
41 | /* Get pointer to save area */ | |
5f954c34 | 42 | lghi %r1,0x1000 |
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43 | |
44 | /* Store registers */ | |
45 | mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */ | |
46 | stfpc 0x31c(%r1) /* store fpu control */ | |
47 | std 0,0x200(%r1) /* store f0 */ | |
48 | std 1,0x208(%r1) /* store f1 */ | |
49 | std 2,0x210(%r1) /* store f2 */ | |
50 | std 3,0x218(%r1) /* store f3 */ | |
51 | std 4,0x220(%r1) /* store f4 */ | |
52 | std 5,0x228(%r1) /* store f5 */ | |
53 | std 6,0x230(%r1) /* store f6 */ | |
54 | std 7,0x238(%r1) /* store f7 */ | |
55 | std 8,0x240(%r1) /* store f8 */ | |
56 | std 9,0x248(%r1) /* store f9 */ | |
57 | std 10,0x250(%r1) /* store f10 */ | |
58 | std 11,0x258(%r1) /* store f11 */ | |
59 | std 12,0x260(%r1) /* store f12 */ | |
60 | std 13,0x268(%r1) /* store f13 */ | |
61 | std 14,0x270(%r1) /* store f14 */ | |
62 | std 15,0x278(%r1) /* store f15 */ | |
63 | stam %a0,%a15,0x340(%r1) /* store access registers */ | |
64 | stctg %c0,%c15,0x380(%r1) /* store control registers */ | |
65 | stmg %r0,%r15,0x280(%r1) /* store general registers */ | |
66 | ||
67 | stpt 0x328(%r1) /* store timer */ | |
68 | stckc 0x330(%r1) /* store clock comparator */ | |
69 | ||
70 | /* Activate DAT */ | |
71 | stosm __SF_EMPTY(%r15),0x04 | |
72 | ||
73 | /* Set prefix page to zero */ | |
74 | xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15) | |
75 | spx __SF_EMPTY(%r15) | |
76 | ||
5f954c34 HC |
77 | lghi %r2,0 |
78 | lghi %r3,2*PAGE_SIZE | |
79 | lghi %r5,2*PAGE_SIZE | |
80 | 1: mvcle %r2,%r4,0 | |
81 | jo 1b | |
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82 | |
83 | /* Save image */ | |
84 | brasl %r14,swsusp_save | |
85 | ||
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86 | /* Restore prefix register and return */ |
87 | lghi %r1,0x1000 | |
88 | spx 0x318(%r1) | |
89 | lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) | |
90 | lghi %r2,0 | |
91 | br %r14 | |
92 | ||
93 | /* | |
94 | * Restore saved memory image to correct place and restore register context. | |
95 | * Then we return to the function that called swsusp_arch_suspend(). | |
96 | * swsusp_arch_resume() runs with disabled interrupts. | |
97 | */ | |
98 | .globl swsusp_arch_resume | |
99 | swsusp_arch_resume: | |
100 | stmg %r6,%r15,__SF_GPRS(%r15) | |
101 | lgr %r1,%r15 | |
102 | aghi %r15,-STACK_FRAME_OVERHEAD | |
103 | stg %r1,__SF_BACKCHAIN(%r15) | |
104 | ||
4a9c7525 | 105 | #ifdef CONFIG_SMP |
155af2f9 HJP |
106 | /* Save boot cpu number */ |
107 | brasl %r14,smp_get_phys_cpu_id | |
108 | lgr %r10,%r2 | |
4a9c7525 | 109 | #endif |
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110 | /* Deactivate DAT */ |
111 | stnsm __SF_EMPTY(%r15),0xfb | |
112 | ||
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113 | /* Set prefix page to zero */ |
114 | xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15) | |
115 | spx __SF_EMPTY(%r15) | |
116 | ||
117 | /* Restore saved image */ | |
118 | larl %r1,restore_pblist | |
119 | lg %r1,0(%r1) | |
120 | ltgr %r1,%r1 | |
121 | jz 2f | |
122 | 0: | |
123 | lg %r2,8(%r1) | |
124 | lg %r4,0(%r1) | |
125 | lghi %r3,PAGE_SIZE | |
126 | lghi %r5,PAGE_SIZE | |
127 | 1: | |
128 | mvcle %r2,%r4,0 | |
129 | jo 1b | |
130 | lg %r1,16(%r1) | |
131 | ltgr %r1,%r1 | |
132 | jnz 0b | |
133 | 2: | |
134 | ptlb /* flush tlb */ | |
135 | ||
136 | /* Restore registers */ | |
137 | lghi %r13,0x1000 /* %r1 = pointer to save arae */ | |
138 | ||
139 | spt 0x328(%r13) /* reprogram timer */ | |
140 | //sckc 0x330(%r13) /* set clock comparator */ | |
141 | ||
142 | lctlg %c0,%c15,0x380(%r13) /* load control registers */ | |
143 | lam %a0,%a15,0x340(%r13) /* load access registers */ | |
144 | ||
145 | lfpc 0x31c(%r13) /* load fpu control */ | |
146 | ld 0,0x200(%r13) /* load f0 */ | |
147 | ld 1,0x208(%r13) /* load f1 */ | |
148 | ld 2,0x210(%r13) /* load f2 */ | |
149 | ld 3,0x218(%r13) /* load f3 */ | |
150 | ld 4,0x220(%r13) /* load f4 */ | |
151 | ld 5,0x228(%r13) /* load f5 */ | |
152 | ld 6,0x230(%r13) /* load f6 */ | |
153 | ld 7,0x238(%r13) /* load f7 */ | |
154 | ld 8,0x240(%r13) /* load f8 */ | |
155 | ld 9,0x248(%r13) /* load f9 */ | |
156 | ld 10,0x250(%r13) /* load f10 */ | |
157 | ld 11,0x258(%r13) /* load f11 */ | |
158 | ld 12,0x260(%r13) /* load f12 */ | |
159 | ld 13,0x268(%r13) /* load f13 */ | |
160 | ld 14,0x270(%r13) /* load f14 */ | |
161 | ld 15,0x278(%r13) /* load f15 */ | |
162 | ||
163 | /* Load old stack */ | |
164 | lg %r15,0x2f8(%r13) | |
165 | ||
c63b196a | 166 | /* Pointer to save area */ |
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167 | lghi %r13,0x1000 |
168 | ||
4a9c7525 | 169 | #ifdef CONFIG_SMP |
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170 | /* Switch CPUs */ |
171 | lgr %r2,%r10 /* get cpu id */ | |
172 | llgf %r3,0x318(%r13) | |
173 | brasl %r14,smp_switch_boot_cpu_in_resume | |
4a9c7525 | 174 | #endif |
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175 | /* Restore prefix register */ |
176 | spx 0x318(%r13) | |
177 | ||
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178 | /* Activate DAT */ |
179 | stosm __SF_EMPTY(%r15),0x04 | |
180 | ||
181 | /* Return 0 */ | |
182 | lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) | |
183 | lghi %r2,0 | |
184 | br %r14 |