Commit | Line | Data |
---|---|---|
453423dc | 1 | /* |
a53c8fab | 2 | * handling privileged instructions |
453423dc | 3 | * |
69d0d3a3 | 4 | * Copyright IBM Corp. 2008, 2013 |
453423dc CB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License (version 2 only) | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * Author(s): Carsten Otte <cotte@de.ibm.com> | |
11 | * Christian Borntraeger <borntraeger@de.ibm.com> | |
12 | */ | |
13 | ||
14 | #include <linux/kvm.h> | |
5a0e3ad6 | 15 | #include <linux/gfp.h> |
453423dc | 16 | #include <linux/errno.h> |
b13b5dc7 | 17 | #include <linux/compat.h> |
7c959e82 | 18 | #include <asm/asm-offsets.h> |
e769ece3 | 19 | #include <asm/facility.h> |
453423dc CB |
20 | #include <asm/current.h> |
21 | #include <asm/debug.h> | |
22 | #include <asm/ebcdic.h> | |
23 | #include <asm/sysinfo.h> | |
69d0d3a3 CB |
24 | #include <asm/pgtable.h> |
25 | #include <asm/pgalloc.h> | |
1e133ab2 | 26 | #include <asm/gmap.h> |
69d0d3a3 | 27 | #include <asm/io.h> |
48a3e950 CH |
28 | #include <asm/ptrace.h> |
29 | #include <asm/compat.h> | |
a7e19ab5 | 30 | #include <asm/sclp.h> |
453423dc CB |
31 | #include "gaccess.h" |
32 | #include "kvm-s390.h" | |
5786fffa | 33 | #include "trace.h" |
453423dc | 34 | |
6a3f95a6 TH |
35 | /* Handle SCK (SET CLOCK) interception */ |
36 | static int handle_set_clock(struct kvm_vcpu *vcpu) | |
37 | { | |
25ed1675 | 38 | int rc; |
8ae04b8f | 39 | ar_t ar; |
25ed1675 | 40 | u64 op2, val; |
6a3f95a6 TH |
41 | |
42 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
43 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
44 | ||
8ae04b8f | 45 | op2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
6a3f95a6 TH |
46 | if (op2 & 7) /* Operand must be on a doubleword boundary */ |
47 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
8ae04b8f | 48 | rc = read_guest(vcpu, op2, ar, &val, sizeof(val)); |
0e7a3f94 HC |
49 | if (rc) |
50 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
6a3f95a6 | 51 | |
7cbde76b | 52 | VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val); |
25ed1675 | 53 | kvm_s390_set_tod_clock(vcpu->kvm, val); |
6a3f95a6 TH |
54 | |
55 | kvm_s390_set_psw_cc(vcpu, 0); | |
56 | return 0; | |
57 | } | |
58 | ||
453423dc CB |
59 | static int handle_set_prefix(struct kvm_vcpu *vcpu) |
60 | { | |
453423dc | 61 | u64 operand2; |
665170cb HC |
62 | u32 address; |
63 | int rc; | |
8ae04b8f | 64 | ar_t ar; |
453423dc CB |
65 | |
66 | vcpu->stat.instruction_spx++; | |
67 | ||
5087dfa6 TH |
68 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
69 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
70 | ||
8ae04b8f | 71 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc CB |
72 | |
73 | /* must be word boundary */ | |
db4a29cb HC |
74 | if (operand2 & 3) |
75 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc CB |
76 | |
77 | /* get the value */ | |
8ae04b8f | 78 | rc = read_guest(vcpu, operand2, ar, &address, sizeof(address)); |
665170cb HC |
79 | if (rc) |
80 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
81 | ||
82 | address &= 0x7fffe000u; | |
83 | ||
84 | /* | |
85 | * Make sure the new value is valid memory. We only need to check the | |
86 | * first page, since address is 8k aligned and memory pieces are always | |
87 | * at least 1MB aligned and have at least a size of 1MB. | |
88 | */ | |
89 | if (kvm_is_error_gpa(vcpu->kvm, address)) | |
db4a29cb | 90 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
453423dc | 91 | |
8d26cf7b | 92 | kvm_s390_set_prefix(vcpu, address); |
5786fffa | 93 | trace_kvm_s390_handle_prefix(vcpu, 1, address); |
453423dc CB |
94 | return 0; |
95 | } | |
96 | ||
97 | static int handle_store_prefix(struct kvm_vcpu *vcpu) | |
98 | { | |
453423dc CB |
99 | u64 operand2; |
100 | u32 address; | |
f748f4a7 | 101 | int rc; |
8ae04b8f | 102 | ar_t ar; |
453423dc CB |
103 | |
104 | vcpu->stat.instruction_stpx++; | |
b1c571a5 | 105 | |
5087dfa6 TH |
106 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
107 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
108 | ||
8ae04b8f | 109 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc CB |
110 | |
111 | /* must be word boundary */ | |
db4a29cb HC |
112 | if (operand2 & 3) |
113 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc | 114 | |
fda902cb | 115 | address = kvm_s390_get_prefix(vcpu); |
453423dc CB |
116 | |
117 | /* get the value */ | |
8ae04b8f | 118 | rc = write_guest(vcpu, operand2, ar, &address, sizeof(address)); |
f748f4a7 HC |
119 | if (rc) |
120 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 121 | |
7cbde76b | 122 | VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2); |
5786fffa | 123 | trace_kvm_s390_handle_prefix(vcpu, 0, address); |
453423dc CB |
124 | return 0; |
125 | } | |
126 | ||
127 | static int handle_store_cpu_address(struct kvm_vcpu *vcpu) | |
128 | { | |
8b96de0e HC |
129 | u16 vcpu_id = vcpu->vcpu_id; |
130 | u64 ga; | |
131 | int rc; | |
8ae04b8f | 132 | ar_t ar; |
453423dc CB |
133 | |
134 | vcpu->stat.instruction_stap++; | |
b1c571a5 | 135 | |
5087dfa6 TH |
136 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
137 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
138 | ||
8ae04b8f | 139 | ga = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc | 140 | |
8b96de0e | 141 | if (ga & 1) |
db4a29cb | 142 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
453423dc | 143 | |
8ae04b8f | 144 | rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id)); |
8b96de0e HC |
145 | if (rc) |
146 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 147 | |
7cbde76b | 148 | VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga); |
8b96de0e | 149 | trace_kvm_s390_handle_stap(vcpu, ga); |
453423dc CB |
150 | return 0; |
151 | } | |
152 | ||
3ac8e380 | 153 | static int __skey_check_enable(struct kvm_vcpu *vcpu) |
693ffc08 | 154 | { |
3ac8e380 | 155 | int rc = 0; |
11ddcd41 DH |
156 | |
157 | trace_kvm_s390_skey_related_inst(vcpu); | |
693ffc08 | 158 | if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE))) |
3ac8e380 | 159 | return rc; |
693ffc08 | 160 | |
3ac8e380 | 161 | rc = s390_enable_skey(); |
11ddcd41 DH |
162 | VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc); |
163 | if (!rc) | |
164 | vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE); | |
3ac8e380 | 165 | return rc; |
693ffc08 DD |
166 | } |
167 | ||
a7e19ab5 | 168 | static int try_handle_skey(struct kvm_vcpu *vcpu) |
453423dc | 169 | { |
11ddcd41 | 170 | int rc; |
693ffc08 | 171 | |
11ddcd41 DH |
172 | vcpu->stat.instruction_storage_key++; |
173 | rc = __skey_check_enable(vcpu); | |
3ac8e380 DD |
174 | if (rc) |
175 | return rc; | |
a7e19ab5 DH |
176 | if (sclp.has_skey) { |
177 | /* with storage-key facility, SIE interprets it for us */ | |
178 | kvm_s390_retry_instr(vcpu); | |
179 | VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation"); | |
180 | return -EAGAIN; | |
181 | } | |
5087dfa6 TH |
182 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
183 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
a7e19ab5 DH |
184 | return 0; |
185 | } | |
5087dfa6 | 186 | |
a7e19ab5 DH |
187 | static int handle_iske(struct kvm_vcpu *vcpu) |
188 | { | |
189 | unsigned long addr; | |
190 | unsigned char key; | |
191 | int reg1, reg2; | |
192 | int rc; | |
193 | ||
194 | rc = try_handle_skey(vcpu); | |
195 | if (rc) | |
196 | return rc != -EAGAIN ? rc : 0; | |
197 | ||
198 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
199 | ||
200 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
201 | addr = kvm_s390_logical_to_effective(vcpu, addr); | |
202 | addr = kvm_s390_real_to_abs(vcpu, addr); | |
203 | addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr)); | |
204 | if (kvm_is_error_hva(addr)) | |
205 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
206 | ||
207 | down_read(¤t->mm->mmap_sem); | |
208 | rc = get_guest_storage_key(current->mm, addr, &key); | |
209 | up_read(¤t->mm->mmap_sem); | |
210 | if (rc) | |
211 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
212 | vcpu->run->s.regs.gprs[reg1] &= ~0xff; | |
213 | vcpu->run->s.regs.gprs[reg1] |= key; | |
214 | return 0; | |
215 | } | |
216 | ||
217 | static int handle_rrbe(struct kvm_vcpu *vcpu) | |
218 | { | |
219 | unsigned long addr; | |
220 | int reg1, reg2; | |
221 | int rc; | |
222 | ||
223 | rc = try_handle_skey(vcpu); | |
224 | if (rc) | |
225 | return rc != -EAGAIN ? rc : 0; | |
226 | ||
227 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
228 | ||
229 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
230 | addr = kvm_s390_logical_to_effective(vcpu, addr); | |
231 | addr = kvm_s390_real_to_abs(vcpu, addr); | |
232 | addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr)); | |
233 | if (kvm_is_error_hva(addr)) | |
234 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
235 | ||
236 | down_read(¤t->mm->mmap_sem); | |
237 | rc = reset_guest_reference_bit(current->mm, addr); | |
238 | up_read(¤t->mm->mmap_sem); | |
239 | if (rc < 0) | |
240 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
241 | ||
242 | kvm_s390_set_psw_cc(vcpu, rc); | |
243 | return 0; | |
244 | } | |
245 | ||
246 | #define SSKE_NQ 0x8 | |
247 | #define SSKE_MR 0x4 | |
248 | #define SSKE_MC 0x2 | |
249 | #define SSKE_MB 0x1 | |
250 | static int handle_sske(struct kvm_vcpu *vcpu) | |
251 | { | |
252 | unsigned char m3 = vcpu->arch.sie_block->ipb >> 28; | |
253 | unsigned long start, end; | |
254 | unsigned char key, oldkey; | |
255 | int reg1, reg2; | |
256 | int rc; | |
257 | ||
258 | rc = try_handle_skey(vcpu); | |
259 | if (rc) | |
260 | return rc != -EAGAIN ? rc : 0; | |
261 | ||
262 | if (!test_kvm_facility(vcpu->kvm, 8)) | |
263 | m3 &= ~SSKE_MB; | |
264 | if (!test_kvm_facility(vcpu->kvm, 10)) | |
265 | m3 &= ~(SSKE_MC | SSKE_MR); | |
266 | if (!test_kvm_facility(vcpu->kvm, 14)) | |
267 | m3 &= ~SSKE_NQ; | |
268 | ||
269 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
270 | ||
271 | key = vcpu->run->s.regs.gprs[reg1] & 0xfe; | |
272 | start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
273 | start = kvm_s390_logical_to_effective(vcpu, start); | |
274 | if (m3 & SSKE_MB) { | |
275 | /* start already designates an absolute address */ | |
276 | end = (start + (1UL << 20)) & ~((1UL << 20) - 1); | |
277 | } else { | |
278 | start = kvm_s390_real_to_abs(vcpu, start); | |
279 | end = start + PAGE_SIZE; | |
280 | } | |
281 | ||
282 | while (start != end) { | |
283 | unsigned long addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start)); | |
284 | ||
285 | if (kvm_is_error_hva(addr)) | |
286 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
287 | ||
288 | down_read(¤t->mm->mmap_sem); | |
289 | rc = cond_set_guest_storage_key(current->mm, addr, key, &oldkey, | |
290 | m3 & SSKE_NQ, m3 & SSKE_MR, | |
291 | m3 & SSKE_MC); | |
292 | up_read(¤t->mm->mmap_sem); | |
293 | if (rc < 0) | |
294 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
295 | start += PAGE_SIZE; | |
296 | }; | |
297 | ||
298 | if (m3 & (SSKE_MC | SSKE_MR)) { | |
299 | if (m3 & SSKE_MB) { | |
300 | /* skey in reg1 is unpredictable */ | |
301 | kvm_s390_set_psw_cc(vcpu, 3); | |
302 | } else { | |
303 | kvm_s390_set_psw_cc(vcpu, rc); | |
304 | vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL; | |
305 | vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8; | |
306 | } | |
307 | } | |
308 | if (m3 & SSKE_MB) { | |
309 | if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_64BIT) | |
310 | vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK; | |
311 | else | |
312 | vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL; | |
313 | end = kvm_s390_logical_to_effective(vcpu, end); | |
314 | vcpu->run->s.regs.gprs[reg2] |= end; | |
315 | } | |
453423dc CB |
316 | return 0; |
317 | } | |
318 | ||
8a242234 HC |
319 | static int handle_ipte_interlock(struct kvm_vcpu *vcpu) |
320 | { | |
8a242234 | 321 | vcpu->stat.instruction_ipte_interlock++; |
04b41acd | 322 | if (psw_bits(vcpu->arch.sie_block->gpsw).p) |
8a242234 HC |
323 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
324 | wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu)); | |
0e8bc06a | 325 | kvm_s390_retry_instr(vcpu); |
8a242234 HC |
326 | VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation"); |
327 | return 0; | |
328 | } | |
329 | ||
aca84241 TH |
330 | static int handle_test_block(struct kvm_vcpu *vcpu) |
331 | { | |
aca84241 TH |
332 | gpa_t addr; |
333 | int reg2; | |
334 | ||
335 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
336 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
337 | ||
338 | kvm_s390_get_regs_rre(vcpu, NULL, ®2); | |
339 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
e45efa28 | 340 | addr = kvm_s390_logical_to_effective(vcpu, addr); |
dd9e5b7b | 341 | if (kvm_s390_check_low_addr_prot_real(vcpu, addr)) |
e45efa28 | 342 | return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); |
aca84241 TH |
343 | addr = kvm_s390_real_to_abs(vcpu, addr); |
344 | ||
ef23e779 | 345 | if (kvm_is_error_gpa(vcpu->kvm, addr)) |
aca84241 TH |
346 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
347 | /* | |
348 | * We don't expect errors on modern systems, and do not care | |
349 | * about storage keys (yet), so let's just clear the page. | |
350 | */ | |
ef23e779 | 351 | if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE)) |
aca84241 TH |
352 | return -EFAULT; |
353 | kvm_s390_set_psw_cc(vcpu, 0); | |
354 | vcpu->run->s.regs.gprs[0] = 0; | |
355 | return 0; | |
356 | } | |
357 | ||
fa6b7fe9 | 358 | static int handle_tpi(struct kvm_vcpu *vcpu) |
453423dc | 359 | { |
fa6b7fe9 | 360 | struct kvm_s390_interrupt_info *inti; |
4799b557 HC |
361 | unsigned long len; |
362 | u32 tpi_data[3]; | |
261520dc | 363 | int rc; |
7c959e82 | 364 | u64 addr; |
8ae04b8f | 365 | ar_t ar; |
fa6b7fe9 | 366 | |
8ae04b8f | 367 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
db4a29cb HC |
368 | if (addr & 3) |
369 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
261520dc | 370 | |
f092669e | 371 | inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0); |
261520dc DH |
372 | if (!inti) { |
373 | kvm_s390_set_psw_cc(vcpu, 0); | |
374 | return 0; | |
375 | } | |
376 | ||
4799b557 HC |
377 | tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr; |
378 | tpi_data[1] = inti->io.io_int_parm; | |
379 | tpi_data[2] = inti->io.io_int_word; | |
7c959e82 HC |
380 | if (addr) { |
381 | /* | |
382 | * Store the two-word I/O interruption code into the | |
383 | * provided area. | |
384 | */ | |
4799b557 | 385 | len = sizeof(tpi_data) - 4; |
8ae04b8f | 386 | rc = write_guest(vcpu, addr, ar, &tpi_data, len); |
261520dc DH |
387 | if (rc) { |
388 | rc = kvm_s390_inject_prog_cond(vcpu, rc); | |
389 | goto reinject_interrupt; | |
390 | } | |
7c959e82 HC |
391 | } else { |
392 | /* | |
393 | * Store the three-word I/O interruption code into | |
394 | * the appropriate lowcore area. | |
395 | */ | |
4799b557 | 396 | len = sizeof(tpi_data); |
261520dc DH |
397 | if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) { |
398 | /* failed writes to the low core are not recoverable */ | |
4799b557 | 399 | rc = -EFAULT; |
261520dc DH |
400 | goto reinject_interrupt; |
401 | } | |
7c959e82 | 402 | } |
261520dc DH |
403 | |
404 | /* irq was successfully handed to the guest */ | |
405 | kfree(inti); | |
406 | kvm_s390_set_psw_cc(vcpu, 1); | |
407 | return 0; | |
408 | reinject_interrupt: | |
2f32d4ea CH |
409 | /* |
410 | * If we encounter a problem storing the interruption code, the | |
411 | * instruction is suppressed from the guest's view: reinject the | |
412 | * interrupt. | |
413 | */ | |
15462e37 DH |
414 | if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) { |
415 | kfree(inti); | |
416 | rc = -EFAULT; | |
417 | } | |
261520dc | 418 | /* don't set the cc, a pgm irq was injected or we drop to user space */ |
4799b557 | 419 | return rc ? -EFAULT : 0; |
453423dc CB |
420 | } |
421 | ||
fa6b7fe9 CH |
422 | static int handle_tsch(struct kvm_vcpu *vcpu) |
423 | { | |
6d3da241 JF |
424 | struct kvm_s390_interrupt_info *inti = NULL; |
425 | const u64 isc_mask = 0xffUL << 24; /* all iscs set */ | |
fa6b7fe9 | 426 | |
6d3da241 JF |
427 | /* a valid schid has at least one bit set */ |
428 | if (vcpu->run->s.regs.gprs[1]) | |
429 | inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask, | |
430 | vcpu->run->s.regs.gprs[1]); | |
fa6b7fe9 CH |
431 | |
432 | /* | |
433 | * Prepare exit to userspace. | |
434 | * We indicate whether we dequeued a pending I/O interrupt | |
435 | * so that userspace can re-inject it if the instruction gets | |
436 | * a program check. While this may re-order the pending I/O | |
437 | * interrupts, this is no problem since the priority is kept | |
438 | * intact. | |
439 | */ | |
440 | vcpu->run->exit_reason = KVM_EXIT_S390_TSCH; | |
441 | vcpu->run->s390_tsch.dequeued = !!inti; | |
442 | if (inti) { | |
443 | vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id; | |
444 | vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr; | |
445 | vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm; | |
446 | vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word; | |
447 | } | |
448 | vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb; | |
449 | kfree(inti); | |
450 | return -EREMOTE; | |
451 | } | |
452 | ||
453 | static int handle_io_inst(struct kvm_vcpu *vcpu) | |
454 | { | |
455 | VCPU_EVENT(vcpu, 4, "%s", "I/O instruction"); | |
456 | ||
5087dfa6 TH |
457 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
458 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
459 | ||
fa6b7fe9 CH |
460 | if (vcpu->kvm->arch.css_support) { |
461 | /* | |
462 | * Most I/O instructions will be handled by userspace. | |
463 | * Exceptions are tpi and the interrupt portion of tsch. | |
464 | */ | |
465 | if (vcpu->arch.sie_block->ipa == 0xb236) | |
466 | return handle_tpi(vcpu); | |
467 | if (vcpu->arch.sie_block->ipa == 0xb235) | |
468 | return handle_tsch(vcpu); | |
469 | /* Handle in userspace. */ | |
470 | return -EOPNOTSUPP; | |
471 | } else { | |
472 | /* | |
b4a96015 | 473 | * Set condition code 3 to stop the guest from issuing channel |
fa6b7fe9 CH |
474 | * I/O instructions. |
475 | */ | |
ea828ebf | 476 | kvm_s390_set_psw_cc(vcpu, 3); |
fa6b7fe9 CH |
477 | return 0; |
478 | } | |
479 | } | |
480 | ||
453423dc CB |
481 | static int handle_stfl(struct kvm_vcpu *vcpu) |
482 | { | |
453423dc | 483 | int rc; |
9d8d5786 | 484 | unsigned int fac; |
453423dc CB |
485 | |
486 | vcpu->stat.instruction_stfl++; | |
5087dfa6 TH |
487 | |
488 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
489 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
490 | ||
9d8d5786 MM |
491 | /* |
492 | * We need to shift the lower 32 facility bits (bit 0-31) from a u64 | |
493 | * into a u32 memory representation. They will remain bits 0-31. | |
494 | */ | |
c54f0d6a | 495 | fac = *vcpu->kvm->arch.model.fac_list >> 32; |
c667aeac | 496 | rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list), |
9d8d5786 | 497 | &fac, sizeof(fac)); |
dc5008b9 | 498 | if (rc) |
0f9701c6 | 499 | return rc; |
7cbde76b | 500 | VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac); |
9d8d5786 | 501 | trace_kvm_s390_handle_stfl(vcpu, fac); |
453423dc CB |
502 | return 0; |
503 | } | |
504 | ||
48a3e950 CH |
505 | #define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA) |
506 | #define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL | |
d21683ea | 507 | #define PSW_ADDR_24 0x0000000000ffffffUL |
48a3e950 CH |
508 | #define PSW_ADDR_31 0x000000007fffffffUL |
509 | ||
a3fb577e TH |
510 | int is_valid_psw(psw_t *psw) |
511 | { | |
3736b874 HC |
512 | if (psw->mask & PSW_MASK_UNASSIGNED) |
513 | return 0; | |
514 | if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) { | |
515 | if (psw->addr & ~PSW_ADDR_31) | |
516 | return 0; | |
517 | } | |
518 | if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24)) | |
519 | return 0; | |
520 | if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA) | |
521 | return 0; | |
a3fb577e TH |
522 | if (psw->addr & 1) |
523 | return 0; | |
3736b874 HC |
524 | return 1; |
525 | } | |
526 | ||
48a3e950 CH |
527 | int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu) |
528 | { | |
3736b874 | 529 | psw_t *gpsw = &vcpu->arch.sie_block->gpsw; |
48a3e950 | 530 | psw_compat_t new_psw; |
3736b874 | 531 | u64 addr; |
2d8bcaed | 532 | int rc; |
8ae04b8f | 533 | ar_t ar; |
48a3e950 | 534 | |
3736b874 | 535 | if (gpsw->mask & PSW_MASK_PSTATE) |
208dd756 TH |
536 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
537 | ||
8ae04b8f | 538 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
6fd0fcc9 HC |
539 | if (addr & 7) |
540 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
2d8bcaed | 541 | |
8ae04b8f | 542 | rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); |
2d8bcaed HC |
543 | if (rc) |
544 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
6fd0fcc9 HC |
545 | if (!(new_psw.mask & PSW32_MASK_BASE)) |
546 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
3736b874 HC |
547 | gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32; |
548 | gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE; | |
549 | gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE; | |
550 | if (!is_valid_psw(gpsw)) | |
6fd0fcc9 | 551 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
48a3e950 CH |
552 | return 0; |
553 | } | |
554 | ||
555 | static int handle_lpswe(struct kvm_vcpu *vcpu) | |
556 | { | |
48a3e950 | 557 | psw_t new_psw; |
3736b874 | 558 | u64 addr; |
2d8bcaed | 559 | int rc; |
8ae04b8f | 560 | ar_t ar; |
48a3e950 | 561 | |
5087dfa6 TH |
562 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
563 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
564 | ||
8ae04b8f | 565 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
6fd0fcc9 HC |
566 | if (addr & 7) |
567 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
8ae04b8f | 568 | rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); |
2d8bcaed HC |
569 | if (rc) |
570 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
3736b874 HC |
571 | vcpu->arch.sie_block->gpsw = new_psw; |
572 | if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) | |
6fd0fcc9 | 573 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
48a3e950 CH |
574 | return 0; |
575 | } | |
576 | ||
453423dc CB |
577 | static int handle_stidp(struct kvm_vcpu *vcpu) |
578 | { | |
9bb0ec09 | 579 | u64 stidp_data = vcpu->kvm->arch.model.cpuid; |
453423dc | 580 | u64 operand2; |
7d777d78 | 581 | int rc; |
8ae04b8f | 582 | ar_t ar; |
453423dc CB |
583 | |
584 | vcpu->stat.instruction_stidp++; | |
b1c571a5 | 585 | |
5087dfa6 TH |
586 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
587 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
588 | ||
8ae04b8f | 589 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc | 590 | |
db4a29cb HC |
591 | if (operand2 & 7) |
592 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc | 593 | |
8ae04b8f | 594 | rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data)); |
7d777d78 HC |
595 | if (rc) |
596 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 597 | |
7cbde76b | 598 | VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data); |
453423dc CB |
599 | return 0; |
600 | } | |
601 | ||
602 | static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem) | |
603 | { | |
453423dc CB |
604 | int cpus = 0; |
605 | int n; | |
606 | ||
ff520a63 | 607 | cpus = atomic_read(&vcpu->kvm->online_vcpus); |
453423dc CB |
608 | |
609 | /* deal with other level 3 hypervisors */ | |
caf757c6 | 610 | if (stsi(mem, 3, 2, 2)) |
453423dc CB |
611 | mem->count = 0; |
612 | if (mem->count < 8) | |
613 | mem->count++; | |
614 | for (n = mem->count - 1; n > 0 ; n--) | |
615 | memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0])); | |
616 | ||
b75f4c9a | 617 | memset(&mem->vm[0], 0, sizeof(mem->vm[0])); |
453423dc CB |
618 | mem->vm[0].cpus_total = cpus; |
619 | mem->vm[0].cpus_configured = cpus; | |
620 | mem->vm[0].cpus_standby = 0; | |
621 | mem->vm[0].cpus_reserved = 0; | |
622 | mem->vm[0].caf = 1000; | |
623 | memcpy(mem->vm[0].name, "KVMguest", 8); | |
624 | ASCEBC(mem->vm[0].name, 8); | |
625 | memcpy(mem->vm[0].cpi, "KVM/Linux ", 16); | |
626 | ASCEBC(mem->vm[0].cpi, 16); | |
627 | } | |
628 | ||
e44fc8c9 ET |
629 | static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, ar_t ar, |
630 | u8 fc, u8 sel1, u16 sel2) | |
631 | { | |
632 | vcpu->run->exit_reason = KVM_EXIT_S390_STSI; | |
633 | vcpu->run->s390_stsi.addr = addr; | |
634 | vcpu->run->s390_stsi.ar = ar; | |
635 | vcpu->run->s390_stsi.fc = fc; | |
636 | vcpu->run->s390_stsi.sel1 = sel1; | |
637 | vcpu->run->s390_stsi.sel2 = sel2; | |
638 | } | |
639 | ||
453423dc CB |
640 | static int handle_stsi(struct kvm_vcpu *vcpu) |
641 | { | |
5a32c1af CB |
642 | int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28; |
643 | int sel1 = vcpu->run->s.regs.gprs[0] & 0xff; | |
644 | int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff; | |
c51f068c | 645 | unsigned long mem = 0; |
453423dc | 646 | u64 operand2; |
db4a29cb | 647 | int rc = 0; |
8ae04b8f | 648 | ar_t ar; |
453423dc CB |
649 | |
650 | vcpu->stat.instruction_stsi++; | |
7cbde76b | 651 | VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2); |
453423dc | 652 | |
5087dfa6 TH |
653 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
654 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
655 | ||
87d41fb4 | 656 | if (fc > 3) { |
ea828ebf | 657 | kvm_s390_set_psw_cc(vcpu, 3); |
87d41fb4 TH |
658 | return 0; |
659 | } | |
453423dc | 660 | |
87d41fb4 TH |
661 | if (vcpu->run->s.regs.gprs[0] & 0x0fffff00 |
662 | || vcpu->run->s.regs.gprs[1] & 0xffff0000) | |
453423dc CB |
663 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
664 | ||
87d41fb4 | 665 | if (fc == 0) { |
5a32c1af | 666 | vcpu->run->s.regs.gprs[0] = 3 << 28; |
ea828ebf | 667 | kvm_s390_set_psw_cc(vcpu, 0); |
453423dc | 668 | return 0; |
87d41fb4 TH |
669 | } |
670 | ||
8ae04b8f | 671 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
87d41fb4 TH |
672 | |
673 | if (operand2 & 0xfff) | |
674 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
675 | ||
676 | switch (fc) { | |
453423dc CB |
677 | case 1: /* same handling for 1 and 2 */ |
678 | case 2: | |
679 | mem = get_zeroed_page(GFP_KERNEL); | |
680 | if (!mem) | |
c51f068c | 681 | goto out_no_data; |
caf757c6 | 682 | if (stsi((void *) mem, fc, sel1, sel2)) |
c51f068c | 683 | goto out_no_data; |
453423dc CB |
684 | break; |
685 | case 3: | |
686 | if (sel1 != 2 || sel2 != 2) | |
c51f068c | 687 | goto out_no_data; |
453423dc CB |
688 | mem = get_zeroed_page(GFP_KERNEL); |
689 | if (!mem) | |
c51f068c | 690 | goto out_no_data; |
453423dc CB |
691 | handle_stsi_3_2_2(vcpu, (void *) mem); |
692 | break; | |
453423dc CB |
693 | } |
694 | ||
8ae04b8f | 695 | rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE); |
645c5bc1 HC |
696 | if (rc) { |
697 | rc = kvm_s390_inject_prog_cond(vcpu, rc); | |
698 | goto out; | |
453423dc | 699 | } |
e44fc8c9 ET |
700 | if (vcpu->kvm->arch.user_stsi) { |
701 | insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2); | |
702 | rc = -EREMOTE; | |
703 | } | |
5786fffa | 704 | trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2); |
453423dc | 705 | free_page(mem); |
ea828ebf | 706 | kvm_s390_set_psw_cc(vcpu, 0); |
5a32c1af | 707 | vcpu->run->s.regs.gprs[0] = 0; |
e44fc8c9 | 708 | return rc; |
c51f068c | 709 | out_no_data: |
ea828ebf | 710 | kvm_s390_set_psw_cc(vcpu, 3); |
645c5bc1 | 711 | out: |
c51f068c | 712 | free_page(mem); |
db4a29cb | 713 | return rc; |
453423dc CB |
714 | } |
715 | ||
f379aae5 | 716 | static const intercept_handler_t b2_handlers[256] = { |
453423dc | 717 | [0x02] = handle_stidp, |
6a3f95a6 | 718 | [0x04] = handle_set_clock, |
453423dc CB |
719 | [0x10] = handle_set_prefix, |
720 | [0x11] = handle_store_prefix, | |
721 | [0x12] = handle_store_cpu_address, | |
a3508fbe | 722 | [0x14] = kvm_s390_handle_vsie, |
8a242234 | 723 | [0x21] = handle_ipte_interlock, |
a7e19ab5 DH |
724 | [0x29] = handle_iske, |
725 | [0x2a] = handle_rrbe, | |
726 | [0x2b] = handle_sske, | |
aca84241 | 727 | [0x2c] = handle_test_block, |
f379aae5 CH |
728 | [0x30] = handle_io_inst, |
729 | [0x31] = handle_io_inst, | |
730 | [0x32] = handle_io_inst, | |
731 | [0x33] = handle_io_inst, | |
732 | [0x34] = handle_io_inst, | |
733 | [0x35] = handle_io_inst, | |
734 | [0x36] = handle_io_inst, | |
735 | [0x37] = handle_io_inst, | |
736 | [0x38] = handle_io_inst, | |
737 | [0x39] = handle_io_inst, | |
738 | [0x3a] = handle_io_inst, | |
739 | [0x3b] = handle_io_inst, | |
740 | [0x3c] = handle_io_inst, | |
8a242234 | 741 | [0x50] = handle_ipte_interlock, |
f379aae5 CH |
742 | [0x5f] = handle_io_inst, |
743 | [0x74] = handle_io_inst, | |
744 | [0x76] = handle_io_inst, | |
453423dc CB |
745 | [0x7d] = handle_stsi, |
746 | [0xb1] = handle_stfl, | |
48a3e950 | 747 | [0xb2] = handle_lpswe, |
453423dc CB |
748 | }; |
749 | ||
70455a36 | 750 | int kvm_s390_handle_b2(struct kvm_vcpu *vcpu) |
453423dc CB |
751 | { |
752 | intercept_handler_t handler; | |
753 | ||
70455a36 | 754 | /* |
5087dfa6 TH |
755 | * A lot of B2 instructions are priviledged. Here we check for |
756 | * the privileged ones, that we can handle in the kernel. | |
757 | * Anything else goes to userspace. | |
758 | */ | |
f379aae5 | 759 | handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; |
5087dfa6 TH |
760 | if (handler) |
761 | return handler(vcpu); | |
762 | ||
b8e660b8 | 763 | return -EOPNOTSUPP; |
453423dc | 764 | } |
bb25b9ba | 765 | |
48a3e950 CH |
766 | static int handle_epsw(struct kvm_vcpu *vcpu) |
767 | { | |
768 | int reg1, reg2; | |
769 | ||
aeb87c3c | 770 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); |
48a3e950 CH |
771 | |
772 | /* This basically extracts the mask half of the psw. */ | |
843200e7 | 773 | vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL; |
48a3e950 CH |
774 | vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32; |
775 | if (reg2) { | |
843200e7 | 776 | vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL; |
48a3e950 | 777 | vcpu->run->s.regs.gprs[reg2] |= |
843200e7 | 778 | vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL; |
48a3e950 CH |
779 | } |
780 | return 0; | |
781 | } | |
782 | ||
69d0d3a3 CB |
783 | #define PFMF_RESERVED 0xfffc0101UL |
784 | #define PFMF_SK 0x00020000UL | |
785 | #define PFMF_CF 0x00010000UL | |
786 | #define PFMF_UI 0x00008000UL | |
787 | #define PFMF_FSC 0x00007000UL | |
788 | #define PFMF_NQ 0x00000800UL | |
789 | #define PFMF_MR 0x00000400UL | |
790 | #define PFMF_MC 0x00000200UL | |
791 | #define PFMF_KEY 0x000000feUL | |
792 | ||
793 | static int handle_pfmf(struct kvm_vcpu *vcpu) | |
794 | { | |
1824c723 | 795 | bool mr = false, mc = false, nq; |
69d0d3a3 CB |
796 | int reg1, reg2; |
797 | unsigned long start, end; | |
1824c723 | 798 | unsigned char key; |
69d0d3a3 CB |
799 | |
800 | vcpu->stat.instruction_pfmf++; | |
801 | ||
802 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
803 | ||
03c02807 | 804 | if (!test_kvm_facility(vcpu->kvm, 8)) |
69d0d3a3 CB |
805 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); |
806 | ||
807 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
208dd756 | 808 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
69d0d3a3 CB |
809 | |
810 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED) | |
811 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
812 | ||
edc5b055 DH |
813 | /* Only provide non-quiescing support if enabled for the guest */ |
814 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && | |
815 | !test_kvm_facility(vcpu->kvm, 14)) | |
69d0d3a3 CB |
816 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
817 | ||
1824c723 DH |
818 | /* Only provide conditional-SSKE support if enabled for the guest */ |
819 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK && | |
820 | test_kvm_facility(vcpu->kvm, 10)) { | |
821 | mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR; | |
822 | mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC; | |
823 | } | |
824 | ||
825 | nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ; | |
826 | key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY; | |
69d0d3a3 | 827 | start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; |
a02689fe | 828 | start = kvm_s390_logical_to_effective(vcpu, start); |
fb34c603 | 829 | |
6164a2e9 DH |
830 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { |
831 | if (kvm_s390_check_low_addr_prot_real(vcpu, start)) | |
832 | return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); | |
833 | } | |
834 | ||
69d0d3a3 CB |
835 | switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { |
836 | case 0x00000000: | |
6164a2e9 DH |
837 | /* only 4k frames specify a real address */ |
838 | start = kvm_s390_real_to_abs(vcpu, start); | |
69d0d3a3 CB |
839 | end = (start + (1UL << 12)) & ~((1UL << 12) - 1); |
840 | break; | |
841 | case 0x00001000: | |
842 | end = (start + (1UL << 20)) & ~((1UL << 20) - 1); | |
843 | break; | |
69d0d3a3 | 844 | case 0x00002000: |
53df84f8 GH |
845 | /* only support 2G frame size if EDAT2 is available and we are |
846 | not in 24-bit addressing mode */ | |
847 | if (!test_kvm_facility(vcpu->kvm, 78) || | |
848 | psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_24BIT) | |
849 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
69d0d3a3 | 850 | end = (start + (1UL << 31)) & ~((1UL << 31) - 1); |
53df84f8 | 851 | break; |
69d0d3a3 CB |
852 | default: |
853 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
854 | } | |
a02689fe | 855 | |
695be0e7 | 856 | while (start != end) { |
6164a2e9 | 857 | unsigned long useraddr; |
fb34c603 TH |
858 | |
859 | /* Translate guest address to host address */ | |
6164a2e9 | 860 | useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start)); |
fb34c603 | 861 | if (kvm_is_error_hva(useraddr)) |
69d0d3a3 CB |
862 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
863 | ||
864 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { | |
865 | if (clear_user((void __user *)useraddr, PAGE_SIZE)) | |
866 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
867 | } | |
868 | ||
869 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) { | |
3ac8e380 DD |
870 | int rc = __skey_check_enable(vcpu); |
871 | ||
872 | if (rc) | |
873 | return rc; | |
d3ed1cee | 874 | down_read(¤t->mm->mmap_sem); |
1824c723 DH |
875 | rc = cond_set_guest_storage_key(current->mm, useraddr, |
876 | key, NULL, nq, mr, mc); | |
d3ed1cee | 877 | up_read(¤t->mm->mmap_sem); |
1824c723 | 878 | if (rc < 0) |
69d0d3a3 CB |
879 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
880 | } | |
881 | ||
882 | start += PAGE_SIZE; | |
883 | } | |
2c26d1d2 DH |
884 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { |
885 | if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_64BIT) { | |
886 | vcpu->run->s.regs.gprs[reg2] = end; | |
887 | } else { | |
888 | vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL; | |
889 | end = kvm_s390_logical_to_effective(vcpu, end); | |
890 | vcpu->run->s.regs.gprs[reg2] |= end; | |
891 | } | |
892 | } | |
69d0d3a3 CB |
893 | return 0; |
894 | } | |
895 | ||
b31288fa KW |
896 | static int handle_essa(struct kvm_vcpu *vcpu) |
897 | { | |
898 | /* entries expected to be 1FF */ | |
899 | int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3; | |
4a5e7e38 | 900 | unsigned long *cbrlo; |
b31288fa KW |
901 | struct gmap *gmap; |
902 | int i; | |
903 | ||
7cbde76b | 904 | VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries); |
b31288fa KW |
905 | gmap = vcpu->arch.gmap; |
906 | vcpu->stat.instruction_essa++; | |
e6db1d61 | 907 | if (!vcpu->kvm->arch.use_cmma) |
b31288fa KW |
908 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); |
909 | ||
910 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
911 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
912 | ||
913 | if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6) | |
914 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
915 | ||
0e8bc06a DH |
916 | /* Retry the ESSA instruction */ |
917 | kvm_s390_retry_instr(vcpu); | |
b31288fa KW |
918 | vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */ |
919 | cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo); | |
920 | down_read(&gmap->mm->mmap_sem); | |
4a5e7e38 DH |
921 | for (i = 0; i < entries; ++i) |
922 | __gmap_zap(gmap, cbrlo[i]); | |
b31288fa | 923 | up_read(&gmap->mm->mmap_sem); |
b31288fa KW |
924 | return 0; |
925 | } | |
926 | ||
48a3e950 | 927 | static const intercept_handler_t b9_handlers[256] = { |
8a242234 | 928 | [0x8a] = handle_ipte_interlock, |
48a3e950 | 929 | [0x8d] = handle_epsw, |
8a242234 HC |
930 | [0x8e] = handle_ipte_interlock, |
931 | [0x8f] = handle_ipte_interlock, | |
b31288fa | 932 | [0xab] = handle_essa, |
69d0d3a3 | 933 | [0xaf] = handle_pfmf, |
48a3e950 CH |
934 | }; |
935 | ||
936 | int kvm_s390_handle_b9(struct kvm_vcpu *vcpu) | |
937 | { | |
938 | intercept_handler_t handler; | |
939 | ||
940 | /* This is handled just as for the B2 instructions. */ | |
941 | handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; | |
5087dfa6 TH |
942 | if (handler) |
943 | return handler(vcpu); | |
944 | ||
48a3e950 CH |
945 | return -EOPNOTSUPP; |
946 | } | |
947 | ||
953ed88d TH |
948 | int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu) |
949 | { | |
950 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
951 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
952 | int reg, rc, nr_regs; |
953 | u32 ctl_array[16]; | |
f987a3ee | 954 | u64 ga; |
8ae04b8f | 955 | ar_t ar; |
953ed88d TH |
956 | |
957 | vcpu->stat.instruction_lctl++; | |
958 | ||
959 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
960 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
961 | ||
8ae04b8f | 962 | ga = kvm_s390_get_base_disp_rs(vcpu, &ar); |
953ed88d | 963 | |
f987a3ee | 964 | if (ga & 3) |
953ed88d TH |
965 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
966 | ||
7cbde76b | 967 | VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
f987a3ee | 968 | trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga); |
953ed88d | 969 | |
fc56eb66 | 970 | nr_regs = ((reg3 - reg1) & 0xf) + 1; |
8ae04b8f | 971 | rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); |
fc56eb66 HC |
972 | if (rc) |
973 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
953ed88d | 974 | reg = reg1; |
fc56eb66 | 975 | nr_regs = 0; |
953ed88d | 976 | do { |
953ed88d | 977 | vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul; |
fc56eb66 | 978 | vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++]; |
953ed88d TH |
979 | if (reg == reg3) |
980 | break; | |
981 | reg = (reg + 1) % 16; | |
982 | } while (1); | |
2dca485f | 983 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
953ed88d TH |
984 | return 0; |
985 | } | |
986 | ||
aba07508 DH |
987 | int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu) |
988 | { | |
989 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
990 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
991 | int reg, rc, nr_regs; |
992 | u32 ctl_array[16]; | |
aba07508 | 993 | u64 ga; |
8ae04b8f | 994 | ar_t ar; |
aba07508 DH |
995 | |
996 | vcpu->stat.instruction_stctl++; | |
997 | ||
998 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
999 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1000 | ||
8ae04b8f | 1001 | ga = kvm_s390_get_base_disp_rs(vcpu, &ar); |
aba07508 DH |
1002 | |
1003 | if (ga & 3) | |
1004 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
1005 | ||
7cbde76b | 1006 | VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
aba07508 DH |
1007 | trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga); |
1008 | ||
1009 | reg = reg1; | |
fc56eb66 | 1010 | nr_regs = 0; |
aba07508 | 1011 | do { |
fc56eb66 | 1012 | ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; |
aba07508 DH |
1013 | if (reg == reg3) |
1014 | break; | |
1015 | reg = (reg + 1) % 16; | |
1016 | } while (1); | |
8ae04b8f | 1017 | rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); |
fc56eb66 | 1018 | return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; |
aba07508 DH |
1019 | } |
1020 | ||
953ed88d TH |
1021 | static int handle_lctlg(struct kvm_vcpu *vcpu) |
1022 | { | |
1023 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
1024 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
1025 | int reg, rc, nr_regs; |
1026 | u64 ctl_array[16]; | |
1027 | u64 ga; | |
8ae04b8f | 1028 | ar_t ar; |
953ed88d TH |
1029 | |
1030 | vcpu->stat.instruction_lctlg++; | |
1031 | ||
1032 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
1033 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1034 | ||
8ae04b8f | 1035 | ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); |
953ed88d | 1036 | |
f987a3ee | 1037 | if (ga & 7) |
953ed88d TH |
1038 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
1039 | ||
7cbde76b | 1040 | VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
f987a3ee | 1041 | trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga); |
953ed88d | 1042 | |
fc56eb66 | 1043 | nr_regs = ((reg3 - reg1) & 0xf) + 1; |
8ae04b8f | 1044 | rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); |
fc56eb66 HC |
1045 | if (rc) |
1046 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
1047 | reg = reg1; | |
1048 | nr_regs = 0; | |
953ed88d | 1049 | do { |
fc56eb66 | 1050 | vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++]; |
953ed88d TH |
1051 | if (reg == reg3) |
1052 | break; | |
1053 | reg = (reg + 1) % 16; | |
1054 | } while (1); | |
2dca485f | 1055 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
953ed88d TH |
1056 | return 0; |
1057 | } | |
1058 | ||
aba07508 DH |
1059 | static int handle_stctg(struct kvm_vcpu *vcpu) |
1060 | { | |
1061 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
1062 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
1063 | int reg, rc, nr_regs; |
1064 | u64 ctl_array[16]; | |
1065 | u64 ga; | |
8ae04b8f | 1066 | ar_t ar; |
aba07508 DH |
1067 | |
1068 | vcpu->stat.instruction_stctg++; | |
1069 | ||
1070 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
1071 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1072 | ||
8ae04b8f | 1073 | ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); |
aba07508 DH |
1074 | |
1075 | if (ga & 7) | |
1076 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
1077 | ||
7cbde76b | 1078 | VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
aba07508 DH |
1079 | trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga); |
1080 | ||
fc56eb66 HC |
1081 | reg = reg1; |
1082 | nr_regs = 0; | |
aba07508 | 1083 | do { |
fc56eb66 | 1084 | ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; |
aba07508 DH |
1085 | if (reg == reg3) |
1086 | break; | |
1087 | reg = (reg + 1) % 16; | |
1088 | } while (1); | |
8ae04b8f | 1089 | rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); |
fc56eb66 | 1090 | return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; |
aba07508 DH |
1091 | } |
1092 | ||
f379aae5 | 1093 | static const intercept_handler_t eb_handlers[256] = { |
953ed88d | 1094 | [0x2f] = handle_lctlg, |
aba07508 | 1095 | [0x25] = handle_stctg, |
f379aae5 CH |
1096 | }; |
1097 | ||
953ed88d | 1098 | int kvm_s390_handle_eb(struct kvm_vcpu *vcpu) |
f379aae5 CH |
1099 | { |
1100 | intercept_handler_t handler; | |
1101 | ||
f379aae5 CH |
1102 | handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff]; |
1103 | if (handler) | |
1104 | return handler(vcpu); | |
1105 | return -EOPNOTSUPP; | |
1106 | } | |
1107 | ||
bb25b9ba CB |
1108 | static int handle_tprot(struct kvm_vcpu *vcpu) |
1109 | { | |
b1c571a5 | 1110 | u64 address1, address2; |
a0465f9a TH |
1111 | unsigned long hva, gpa; |
1112 | int ret = 0, cc = 0; | |
1113 | bool writable; | |
8ae04b8f | 1114 | ar_t ar; |
bb25b9ba CB |
1115 | |
1116 | vcpu->stat.instruction_tprot++; | |
1117 | ||
f9f6bbc6 TH |
1118 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
1119 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
1120 | ||
8ae04b8f | 1121 | kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL); |
b1c571a5 | 1122 | |
bb25b9ba CB |
1123 | /* we only handle the Linux memory detection case: |
1124 | * access key == 0 | |
bb25b9ba CB |
1125 | * everything else goes to userspace. */ |
1126 | if (address2 & 0xf0) | |
1127 | return -EOPNOTSUPP; | |
1128 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) | |
a0465f9a | 1129 | ipte_lock(vcpu); |
92c96321 | 1130 | ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE); |
a0465f9a TH |
1131 | if (ret == PGM_PROTECTION) { |
1132 | /* Write protected? Try again with read-only... */ | |
1133 | cc = 1; | |
92c96321 DH |
1134 | ret = guest_translate_address(vcpu, address1, ar, &gpa, |
1135 | GACC_FETCH); | |
a0465f9a TH |
1136 | } |
1137 | if (ret) { | |
1138 | if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) { | |
1139 | ret = kvm_s390_inject_program_int(vcpu, ret); | |
1140 | } else if (ret > 0) { | |
1141 | /* Translation not available */ | |
1142 | kvm_s390_set_psw_cc(vcpu, 3); | |
1143 | ret = 0; | |
1144 | } | |
1145 | goto out_unlock; | |
1146 | } | |
59a1fa2d | 1147 | |
a0465f9a TH |
1148 | hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable); |
1149 | if (kvm_is_error_hva(hva)) { | |
1150 | ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
1151 | } else { | |
1152 | if (!writable) | |
1153 | cc = 1; /* Write not permitted ==> read-only */ | |
1154 | kvm_s390_set_psw_cc(vcpu, cc); | |
1155 | /* Note: CC2 only occurs for storage keys (not supported yet) */ | |
1156 | } | |
1157 | out_unlock: | |
1158 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) | |
1159 | ipte_unlock(vcpu); | |
1160 | return ret; | |
bb25b9ba CB |
1161 | } |
1162 | ||
1163 | int kvm_s390_handle_e5(struct kvm_vcpu *vcpu) | |
1164 | { | |
1165 | /* For e5xx... instructions we only handle TPROT */ | |
1166 | if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01) | |
1167 | return handle_tprot(vcpu); | |
1168 | return -EOPNOTSUPP; | |
1169 | } | |
1170 | ||
8c3f61e2 CH |
1171 | static int handle_sckpf(struct kvm_vcpu *vcpu) |
1172 | { | |
1173 | u32 value; | |
1174 | ||
1175 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
208dd756 | 1176 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
8c3f61e2 CH |
1177 | |
1178 | if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000) | |
1179 | return kvm_s390_inject_program_int(vcpu, | |
1180 | PGM_SPECIFICATION); | |
1181 | ||
1182 | value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff; | |
1183 | vcpu->arch.sie_block->todpr = value; | |
1184 | ||
1185 | return 0; | |
1186 | } | |
1187 | ||
9acc317b DH |
1188 | static int handle_ptff(struct kvm_vcpu *vcpu) |
1189 | { | |
1190 | /* we don't emulate any control instructions yet */ | |
1191 | kvm_s390_set_psw_cc(vcpu, 3); | |
1192 | return 0; | |
1193 | } | |
1194 | ||
77975357 | 1195 | static const intercept_handler_t x01_handlers[256] = { |
9acc317b | 1196 | [0x04] = handle_ptff, |
8c3f61e2 CH |
1197 | [0x07] = handle_sckpf, |
1198 | }; | |
1199 | ||
1200 | int kvm_s390_handle_01(struct kvm_vcpu *vcpu) | |
1201 | { | |
1202 | intercept_handler_t handler; | |
1203 | ||
1204 | handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; | |
1205 | if (handler) | |
1206 | return handler(vcpu); | |
1207 | return -EOPNOTSUPP; | |
1208 | } |