Commit | Line | Data |
---|---|---|
5288fbf0 | 1 | /* |
a53c8fab | 2 | * handling interprocessor communication |
5288fbf0 | 3 | * |
b13d3580 | 4 | * Copyright IBM Corp. 2008, 2013 |
5288fbf0 CB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License (version 2 only) | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * Author(s): Carsten Otte <cotte@de.ibm.com> | |
11 | * Christian Borntraeger <borntraeger@de.ibm.com> | |
9ace903d | 12 | * Christian Ehrhardt <ehrhardt@de.ibm.com> |
5288fbf0 CB |
13 | */ |
14 | ||
15 | #include <linux/kvm.h> | |
16 | #include <linux/kvm_host.h> | |
5a0e3ad6 | 17 | #include <linux/slab.h> |
a9ae32c3 | 18 | #include <asm/sigp.h> |
5288fbf0 CB |
19 | #include "gaccess.h" |
20 | #include "kvm-s390.h" | |
5786fffa | 21 | #include "trace.h" |
5288fbf0 | 22 | |
3d95c7d2 | 23 | static int __sigp_sense(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, |
5a32c1af | 24 | u64 *reg) |
5288fbf0 | 25 | { |
1ee0bc55 | 26 | struct kvm_s390_local_interrupt *li; |
1ee0bc55 | 27 | int cpuflags; |
5288fbf0 | 28 | int rc; |
ea5f4969 | 29 | int ext_call_pending; |
5288fbf0 | 30 | |
1ee0bc55 JF |
31 | li = &dst_vcpu->arch.local_int; |
32 | ||
33 | cpuflags = atomic_read(li->cpuflags); | |
ea5f4969 DH |
34 | ext_call_pending = kvm_s390_ext_call_pending(dst_vcpu); |
35 | if (!(cpuflags & CPUSTAT_STOPPED) && !ext_call_pending) | |
21b26c08 CH |
36 | rc = SIGP_CC_ORDER_CODE_ACCEPTED; |
37 | else { | |
5288fbf0 | 38 | *reg &= 0xffffffff00000000UL; |
ea5f4969 | 39 | if (ext_call_pending) |
21b26c08 | 40 | *reg |= SIGP_STATUS_EXT_CALL_PENDING; |
1ee0bc55 | 41 | if (cpuflags & CPUSTAT_STOPPED) |
21b26c08 | 42 | *reg |= SIGP_STATUS_STOPPED; |
ea1918dd | 43 | rc = SIGP_CC_STATUS_STORED; |
5288fbf0 | 44 | } |
5288fbf0 | 45 | |
3d95c7d2 DH |
46 | VCPU_EVENT(vcpu, 4, "sensed status of cpu %x rc %x", dst_vcpu->vcpu_id, |
47 | rc); | |
5288fbf0 CB |
48 | return rc; |
49 | } | |
50 | ||
07b03035 DH |
51 | static int __inject_sigp_emergency(struct kvm_vcpu *vcpu, |
52 | struct kvm_vcpu *dst_vcpu) | |
5288fbf0 | 53 | { |
383d0b05 | 54 | struct kvm_s390_irq irq = { |
22ff4a33 | 55 | .type = KVM_S390_INT_EMERGENCY, |
383d0b05 | 56 | .u.emerg.code = vcpu->vcpu_id, |
22ff4a33 | 57 | }; |
22ff4a33 | 58 | int rc = 0; |
5288fbf0 | 59 | |
383d0b05 | 60 | rc = kvm_s390_inject_vcpu(dst_vcpu, &irq); |
22ff4a33 | 61 | if (!rc) |
3d95c7d2 DH |
62 | VCPU_EVENT(vcpu, 4, "sent sigp emerg to cpu %x", |
63 | dst_vcpu->vcpu_id); | |
5288fbf0 | 64 | |
22ff4a33 | 65 | return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED; |
7697e71f CE |
66 | } |
67 | ||
07b03035 DH |
68 | static int __sigp_emergency(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu) |
69 | { | |
70 | return __inject_sigp_emergency(vcpu, dst_vcpu); | |
71 | } | |
72 | ||
3d95c7d2 DH |
73 | static int __sigp_conditional_emergency(struct kvm_vcpu *vcpu, |
74 | struct kvm_vcpu *dst_vcpu, | |
b13d3580 TH |
75 | u16 asn, u64 *reg) |
76 | { | |
b13d3580 TH |
77 | const u64 psw_int_mask = PSW_MASK_IO | PSW_MASK_EXT; |
78 | u16 p_asn, s_asn; | |
79 | psw_t *psw; | |
94a15de8 | 80 | bool idle; |
b13d3580 | 81 | |
94a15de8 | 82 | idle = is_vcpu_idle(vcpu); |
b13d3580 TH |
83 | psw = &dst_vcpu->arch.sie_block->gpsw; |
84 | p_asn = dst_vcpu->arch.sie_block->gcr[4] & 0xffff; /* Primary ASN */ | |
85 | s_asn = dst_vcpu->arch.sie_block->gcr[3] & 0xffff; /* Secondary ASN */ | |
86 | ||
07b03035 | 87 | /* Inject the emergency signal? */ |
94a15de8 | 88 | if (!is_vcpu_stopped(vcpu) |
b13d3580 | 89 | || (psw->mask & psw_int_mask) != psw_int_mask |
94a15de8 DH |
90 | || (idle && psw->addr != 0) |
91 | || (!idle && (asn == p_asn || asn == s_asn))) { | |
07b03035 | 92 | return __inject_sigp_emergency(vcpu, dst_vcpu); |
b13d3580 TH |
93 | } else { |
94 | *reg &= 0xffffffff00000000UL; | |
95 | *reg |= SIGP_STATUS_INCORRECT_STATE; | |
96 | return SIGP_CC_STATUS_STORED; | |
97 | } | |
98 | } | |
99 | ||
3d95c7d2 | 100 | static int __sigp_external_call(struct kvm_vcpu *vcpu, |
ea5f4969 | 101 | struct kvm_vcpu *dst_vcpu, u64 *reg) |
7697e71f | 102 | { |
383d0b05 | 103 | struct kvm_s390_irq irq = { |
22ff4a33 | 104 | .type = KVM_S390_INT_EXTERNAL_CALL, |
383d0b05 | 105 | .u.extcall.code = vcpu->vcpu_id, |
22ff4a33 | 106 | }; |
22ff4a33 | 107 | int rc; |
7697e71f | 108 | |
383d0b05 | 109 | rc = kvm_s390_inject_vcpu(dst_vcpu, &irq); |
ea5f4969 DH |
110 | if (rc == -EBUSY) { |
111 | *reg &= 0xffffffff00000000UL; | |
112 | *reg |= SIGP_STATUS_EXT_CALL_PENDING; | |
113 | return SIGP_CC_STATUS_STORED; | |
114 | } else if (rc == 0) { | |
3d95c7d2 DH |
115 | VCPU_EVENT(vcpu, 4, "sent sigp ext call to cpu %x", |
116 | dst_vcpu->vcpu_id); | |
ea5f4969 | 117 | } |
7697e71f | 118 | |
22ff4a33 | 119 | return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED; |
5288fbf0 CB |
120 | } |
121 | ||
a6cc3108 | 122 | static int __sigp_stop(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu) |
9ace903d | 123 | { |
6cddd432 DH |
124 | struct kvm_s390_irq irq = { |
125 | .type = KVM_S390_SIGP_STOP, | |
126 | }; | |
9ace903d CE |
127 | int rc; |
128 | ||
6cddd432 DH |
129 | rc = kvm_s390_inject_vcpu(dst_vcpu, &irq); |
130 | if (rc == -EBUSY) | |
131 | rc = SIGP_CC_BUSY; | |
132 | else if (rc == 0) | |
133 | VCPU_EVENT(vcpu, 4, "sent sigp stop to cpu %x", | |
134 | dst_vcpu->vcpu_id); | |
e879892c | 135 | |
a6cc3108 DH |
136 | return rc; |
137 | } | |
138 | ||
139 | static int __sigp_stop_and_store_status(struct kvm_vcpu *vcpu, | |
140 | struct kvm_vcpu *dst_vcpu, u64 *reg) | |
141 | { | |
6cddd432 DH |
142 | struct kvm_s390_irq irq = { |
143 | .type = KVM_S390_SIGP_STOP, | |
144 | .u.stop.flags = KVM_S390_STOP_FLAG_STORE_STATUS, | |
145 | }; | |
a6cc3108 DH |
146 | int rc; |
147 | ||
6cddd432 DH |
148 | rc = kvm_s390_inject_vcpu(dst_vcpu, &irq); |
149 | if (rc == -EBUSY) | |
150 | rc = SIGP_CC_BUSY; | |
151 | else if (rc == 0) | |
152 | VCPU_EVENT(vcpu, 4, "sent sigp stop and store status to cpu %x", | |
153 | dst_vcpu->vcpu_id); | |
e879892c | 154 | |
5288fbf0 CB |
155 | return rc; |
156 | } | |
157 | ||
158 | static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter) | |
159 | { | |
160 | int rc; | |
3c038e6b DD |
161 | unsigned int i; |
162 | struct kvm_vcpu *v; | |
5288fbf0 CB |
163 | |
164 | switch (parameter & 0xff) { | |
165 | case 0: | |
ea1918dd | 166 | rc = SIGP_CC_NOT_OPERATIONAL; |
5288fbf0 CB |
167 | break; |
168 | case 1: | |
169 | case 2: | |
3c038e6b DD |
170 | kvm_for_each_vcpu(i, v, vcpu->kvm) { |
171 | v->arch.pfault_token = KVM_S390_PFAULT_TOKEN_INVALID; | |
172 | kvm_clear_async_pf_completion_queue(v); | |
173 | } | |
174 | ||
ea1918dd | 175 | rc = SIGP_CC_ORDER_CODE_ACCEPTED; |
5288fbf0 CB |
176 | break; |
177 | default: | |
b8e660b8 | 178 | rc = -EOPNOTSUPP; |
5288fbf0 CB |
179 | } |
180 | return rc; | |
181 | } | |
182 | ||
3d95c7d2 DH |
183 | static int __sigp_set_prefix(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu, |
184 | u32 address, u64 *reg) | |
5288fbf0 | 185 | { |
a3a9c59a DH |
186 | struct kvm_s390_irq irq = { |
187 | .type = KVM_S390_SIGP_SET_PREFIX, | |
188 | .u.prefix.address = address & 0x7fffe000u, | |
189 | }; | |
5288fbf0 | 190 | int rc; |
5288fbf0 | 191 | |
665170cb HC |
192 | /* |
193 | * Make sure the new value is valid memory. We only need to check the | |
194 | * first page, since address is 8k aligned and memory pieces are always | |
195 | * at least 1MB aligned and have at least a size of 1MB. | |
196 | */ | |
a3a9c59a | 197 | if (kvm_is_error_gpa(vcpu->kvm, irq.u.prefix.address)) { |
0744426e | 198 | *reg &= 0xffffffff00000000UL; |
a9ae32c3 | 199 | *reg |= SIGP_STATUS_INVALID_PARAMETER; |
ea1918dd | 200 | return SIGP_CC_STATUS_STORED; |
5288fbf0 CB |
201 | } |
202 | ||
a3a9c59a DH |
203 | rc = kvm_s390_inject_vcpu(dst_vcpu, &irq); |
204 | if (rc == -EBUSY) { | |
0744426e HC |
205 | *reg &= 0xffffffff00000000UL; |
206 | *reg |= SIGP_STATUS_INCORRECT_STATE; | |
a3a9c59a | 207 | return SIGP_CC_STATUS_STORED; |
5288fbf0 CB |
208 | } |
209 | ||
5288fbf0 CB |
210 | return rc; |
211 | } | |
212 | ||
3d95c7d2 DH |
213 | static int __sigp_store_status_at_addr(struct kvm_vcpu *vcpu, |
214 | struct kvm_vcpu *dst_vcpu, | |
215 | u32 addr, u64 *reg) | |
00e9e435 | 216 | { |
00e9e435 TH |
217 | int flags; |
218 | int rc; | |
219 | ||
00e9e435 | 220 | flags = atomic_read(dst_vcpu->arch.local_int.cpuflags); |
00e9e435 TH |
221 | if (!(flags & CPUSTAT_STOPPED)) { |
222 | *reg &= 0xffffffff00000000UL; | |
223 | *reg |= SIGP_STATUS_INCORRECT_STATE; | |
224 | return SIGP_CC_STATUS_STORED; | |
225 | } | |
226 | ||
227 | addr &= 0x7ffffe00; | |
228 | rc = kvm_s390_store_status_unloaded(dst_vcpu, addr); | |
229 | if (rc == -EFAULT) { | |
230 | *reg &= 0xffffffff00000000UL; | |
231 | *reg |= SIGP_STATUS_INVALID_PARAMETER; | |
232 | rc = SIGP_CC_STATUS_STORED; | |
233 | } | |
234 | return rc; | |
235 | } | |
236 | ||
3d95c7d2 DH |
237 | static int __sigp_sense_running(struct kvm_vcpu *vcpu, |
238 | struct kvm_vcpu *dst_vcpu, u64 *reg) | |
bd59d3a4 | 239 | { |
1ee0bc55 | 240 | struct kvm_s390_local_interrupt *li; |
bd59d3a4 | 241 | int rc; |
bd59d3a4 | 242 | |
bd50e8ec DH |
243 | if (!test_kvm_facility(vcpu->kvm, 9)) { |
244 | *reg &= 0xffffffff00000000UL; | |
245 | *reg |= SIGP_STATUS_INVALID_ORDER; | |
246 | return SIGP_CC_STATUS_STORED; | |
247 | } | |
248 | ||
1ee0bc55 JF |
249 | li = &dst_vcpu->arch.local_int; |
250 | if (atomic_read(li->cpuflags) & CPUSTAT_RUNNING) { | |
251 | /* running */ | |
252 | rc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
253 | } else { | |
254 | /* not running */ | |
255 | *reg &= 0xffffffff00000000UL; | |
256 | *reg |= SIGP_STATUS_NOT_RUNNING; | |
257 | rc = SIGP_CC_STATUS_STORED; | |
bd59d3a4 | 258 | } |
bd59d3a4 | 259 | |
3d95c7d2 DH |
260 | VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x", |
261 | dst_vcpu->vcpu_id, rc); | |
bd59d3a4 CH |
262 | |
263 | return rc; | |
264 | } | |
265 | ||
b8983830 DH |
266 | static int __prepare_sigp_re_start(struct kvm_vcpu *vcpu, |
267 | struct kvm_vcpu *dst_vcpu, u8 order_code) | |
151104a7 | 268 | { |
3d95c7d2 | 269 | struct kvm_s390_local_interrupt *li = &dst_vcpu->arch.local_int; |
b8983830 DH |
270 | /* handle (RE)START in user space */ |
271 | int rc = -EOPNOTSUPP; | |
151104a7 | 272 | |
6cddd432 | 273 | /* make sure we don't race with STOP irq injection */ |
4ae3c081 | 274 | spin_lock(&li->lock); |
6cddd432 | 275 | if (kvm_s390_is_stop_irq_pending(dst_vcpu)) |
ea1918dd | 276 | rc = SIGP_CC_BUSY; |
4ae3c081 | 277 | spin_unlock(&li->lock); |
1ee0bc55 | 278 | |
151104a7 JF |
279 | return rc; |
280 | } | |
281 | ||
b8983830 DH |
282 | static int __prepare_sigp_cpu_reset(struct kvm_vcpu *vcpu, |
283 | struct kvm_vcpu *dst_vcpu, u8 order_code) | |
284 | { | |
285 | /* handle (INITIAL) CPU RESET in user space */ | |
286 | return -EOPNOTSUPP; | |
287 | } | |
288 | ||
289 | static int __prepare_sigp_unknown(struct kvm_vcpu *vcpu, | |
290 | struct kvm_vcpu *dst_vcpu) | |
291 | { | |
292 | /* handle unknown orders in user space */ | |
293 | return -EOPNOTSUPP; | |
294 | } | |
295 | ||
3526a66b DH |
296 | static int handle_sigp_dst(struct kvm_vcpu *vcpu, u8 order_code, |
297 | u16 cpu_addr, u32 parameter, u64 *status_reg) | |
5288fbf0 | 298 | { |
5288fbf0 | 299 | int rc; |
152e9f65 | 300 | struct kvm_vcpu *dst_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr); |
3d95c7d2 | 301 | |
3d95c7d2 DH |
302 | if (!dst_vcpu) |
303 | return SIGP_CC_NOT_OPERATIONAL; | |
5288fbf0 | 304 | |
5288fbf0 CB |
305 | switch (order_code) { |
306 | case SIGP_SENSE: | |
307 | vcpu->stat.instruction_sigp_sense++; | |
3d95c7d2 | 308 | rc = __sigp_sense(vcpu, dst_vcpu, status_reg); |
5288fbf0 | 309 | break; |
7697e71f CE |
310 | case SIGP_EXTERNAL_CALL: |
311 | vcpu->stat.instruction_sigp_external_call++; | |
ea5f4969 | 312 | rc = __sigp_external_call(vcpu, dst_vcpu, status_reg); |
7697e71f | 313 | break; |
a9ae32c3 | 314 | case SIGP_EMERGENCY_SIGNAL: |
5288fbf0 | 315 | vcpu->stat.instruction_sigp_emergency++; |
3d95c7d2 | 316 | rc = __sigp_emergency(vcpu, dst_vcpu); |
5288fbf0 CB |
317 | break; |
318 | case SIGP_STOP: | |
319 | vcpu->stat.instruction_sigp_stop++; | |
a6cc3108 | 320 | rc = __sigp_stop(vcpu, dst_vcpu); |
5288fbf0 | 321 | break; |
a9ae32c3 | 322 | case SIGP_STOP_AND_STORE_STATUS: |
42cb0c9f | 323 | vcpu->stat.instruction_sigp_stop_store_status++; |
a6cc3108 | 324 | rc = __sigp_stop_and_store_status(vcpu, dst_vcpu, status_reg); |
5288fbf0 | 325 | break; |
00e9e435 | 326 | case SIGP_STORE_STATUS_AT_ADDRESS: |
42cb0c9f | 327 | vcpu->stat.instruction_sigp_store_status++; |
3d95c7d2 | 328 | rc = __sigp_store_status_at_addr(vcpu, dst_vcpu, parameter, |
3526a66b | 329 | status_reg); |
5288fbf0 CB |
330 | break; |
331 | case SIGP_SET_PREFIX: | |
332 | vcpu->stat.instruction_sigp_prefix++; | |
3d95c7d2 | 333 | rc = __sigp_set_prefix(vcpu, dst_vcpu, parameter, status_reg); |
5288fbf0 | 334 | break; |
b13d3580 | 335 | case SIGP_COND_EMERGENCY_SIGNAL: |
42cb0c9f | 336 | vcpu->stat.instruction_sigp_cond_emergency++; |
3d95c7d2 | 337 | rc = __sigp_conditional_emergency(vcpu, dst_vcpu, parameter, |
3526a66b | 338 | status_reg); |
b13d3580 | 339 | break; |
bd59d3a4 CH |
340 | case SIGP_SENSE_RUNNING: |
341 | vcpu->stat.instruction_sigp_sense_running++; | |
3d95c7d2 | 342 | rc = __sigp_sense_running(vcpu, dst_vcpu, status_reg); |
bd59d3a4 | 343 | break; |
58bc33b2 | 344 | case SIGP_START: |
42cb0c9f | 345 | vcpu->stat.instruction_sigp_start++; |
b8983830 | 346 | rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code); |
58bc33b2 | 347 | break; |
5288fbf0 CB |
348 | case SIGP_RESTART: |
349 | vcpu->stat.instruction_sigp_restart++; | |
b8983830 DH |
350 | rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code); |
351 | break; | |
352 | case SIGP_INITIAL_CPU_RESET: | |
42cb0c9f | 353 | vcpu->stat.instruction_sigp_init_cpu_reset++; |
b8983830 DH |
354 | rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code); |
355 | break; | |
356 | case SIGP_CPU_RESET: | |
42cb0c9f | 357 | vcpu->stat.instruction_sigp_cpu_reset++; |
b8983830 | 358 | rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code); |
cc92d6de | 359 | break; |
5288fbf0 | 360 | default: |
42cb0c9f | 361 | vcpu->stat.instruction_sigp_unknown++; |
b8983830 | 362 | rc = __prepare_sigp_unknown(vcpu, dst_vcpu); |
3526a66b DH |
363 | } |
364 | ||
b8983830 DH |
365 | if (rc == -EOPNOTSUPP) |
366 | VCPU_EVENT(vcpu, 4, | |
367 | "sigp order %u -> cpu %x: handled in user space", | |
368 | order_code, dst_vcpu->vcpu_id); | |
369 | ||
3526a66b DH |
370 | return rc; |
371 | } | |
372 | ||
7cbde76b CB |
373 | static int handle_sigp_order_in_user_space(struct kvm_vcpu *vcpu, u8 order_code, |
374 | u16 cpu_addr) | |
2444b352 DH |
375 | { |
376 | if (!vcpu->kvm->arch.user_sigp) | |
377 | return 0; | |
378 | ||
379 | switch (order_code) { | |
380 | case SIGP_SENSE: | |
381 | case SIGP_EXTERNAL_CALL: | |
382 | case SIGP_EMERGENCY_SIGNAL: | |
383 | case SIGP_COND_EMERGENCY_SIGNAL: | |
384 | case SIGP_SENSE_RUNNING: | |
385 | return 0; | |
386 | /* update counters as we're directly dropping to user space */ | |
387 | case SIGP_STOP: | |
388 | vcpu->stat.instruction_sigp_stop++; | |
389 | break; | |
390 | case SIGP_STOP_AND_STORE_STATUS: | |
391 | vcpu->stat.instruction_sigp_stop_store_status++; | |
392 | break; | |
393 | case SIGP_STORE_STATUS_AT_ADDRESS: | |
394 | vcpu->stat.instruction_sigp_store_status++; | |
395 | break; | |
cd7b4b61 EF |
396 | case SIGP_STORE_ADDITIONAL_STATUS: |
397 | vcpu->stat.instruction_sigp_store_adtl_status++; | |
398 | break; | |
2444b352 DH |
399 | case SIGP_SET_PREFIX: |
400 | vcpu->stat.instruction_sigp_prefix++; | |
401 | break; | |
402 | case SIGP_START: | |
403 | vcpu->stat.instruction_sigp_start++; | |
404 | break; | |
405 | case SIGP_RESTART: | |
406 | vcpu->stat.instruction_sigp_restart++; | |
407 | break; | |
408 | case SIGP_INITIAL_CPU_RESET: | |
409 | vcpu->stat.instruction_sigp_init_cpu_reset++; | |
410 | break; | |
411 | case SIGP_CPU_RESET: | |
412 | vcpu->stat.instruction_sigp_cpu_reset++; | |
413 | break; | |
414 | default: | |
415 | vcpu->stat.instruction_sigp_unknown++; | |
416 | } | |
7cbde76b CB |
417 | VCPU_EVENT(vcpu, 3, "SIGP: order %u for CPU %d handled in userspace", |
418 | order_code, cpu_addr); | |
2444b352 DH |
419 | |
420 | return 1; | |
421 | } | |
422 | ||
3526a66b DH |
423 | int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu) |
424 | { | |
425 | int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
426 | int r3 = vcpu->arch.sie_block->ipa & 0x000f; | |
427 | u32 parameter; | |
428 | u16 cpu_addr = vcpu->run->s.regs.gprs[r3]; | |
429 | u8 order_code; | |
430 | int rc; | |
431 | ||
432 | /* sigp in userspace can exit */ | |
433 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
434 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
435 | ||
8ae04b8f | 436 | order_code = kvm_s390_get_base_disp_rs(vcpu, NULL); |
7cbde76b | 437 | if (handle_sigp_order_in_user_space(vcpu, order_code, cpu_addr)) |
2444b352 | 438 | return -EOPNOTSUPP; |
3526a66b DH |
439 | |
440 | if (r1 % 2) | |
441 | parameter = vcpu->run->s.regs.gprs[r1]; | |
442 | else | |
443 | parameter = vcpu->run->s.regs.gprs[r1 + 1]; | |
444 | ||
445 | trace_kvm_s390_handle_sigp(vcpu, order_code, cpu_addr, parameter); | |
446 | switch (order_code) { | |
447 | case SIGP_SET_ARCHITECTURE: | |
448 | vcpu->stat.instruction_sigp_arch++; | |
449 | rc = __sigp_set_arch(vcpu, parameter); | |
450 | break; | |
451 | default: | |
452 | rc = handle_sigp_dst(vcpu, order_code, cpu_addr, | |
453 | parameter, | |
454 | &vcpu->run->s.regs.gprs[r1]); | |
5288fbf0 CB |
455 | } |
456 | ||
457 | if (rc < 0) | |
458 | return rc; | |
459 | ||
949c007a | 460 | kvm_s390_set_psw_cc(vcpu, rc); |
5288fbf0 CB |
461 | return 0; |
462 | } | |
4953919f DH |
463 | |
464 | /* | |
465 | * Handle SIGP partial execution interception. | |
466 | * | |
467 | * This interception will occur at the source cpu when a source cpu sends an | |
468 | * external call to a target cpu and the target cpu has the WAIT bit set in | |
469 | * its cpuflags. Interception will occurr after the interrupt indicator bits at | |
470 | * the target cpu have been set. All error cases will lead to instruction | |
471 | * interception, therefore nothing is to be checked or prepared. | |
472 | */ | |
473 | int kvm_s390_handle_sigp_pei(struct kvm_vcpu *vcpu) | |
474 | { | |
475 | int r3 = vcpu->arch.sie_block->ipa & 0x000f; | |
476 | u16 cpu_addr = vcpu->run->s.regs.gprs[r3]; | |
477 | struct kvm_vcpu *dest_vcpu; | |
8ae04b8f | 478 | u8 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL); |
4953919f DH |
479 | |
480 | trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr); | |
481 | ||
482 | if (order_code == SIGP_EXTERNAL_CALL) { | |
152e9f65 | 483 | dest_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr); |
4953919f DH |
484 | BUG_ON(dest_vcpu == NULL); |
485 | ||
0e9c85a5 | 486 | kvm_s390_vcpu_wakeup(dest_vcpu); |
4953919f DH |
487 | kvm_s390_set_psw_cc(vcpu, SIGP_CC_ORDER_CODE_ACCEPTED); |
488 | return 0; | |
489 | } | |
490 | ||
491 | return -EOPNOTSUPP; | |
492 | } |