Commit | Line | Data |
---|---|---|
cd248341 JG |
1 | /* |
2 | * Copyright IBM Corp. 2012 | |
3 | * | |
4 | * Author(s): | |
5 | * Jan Glauber <jang@linux.vnet.ibm.com> | |
6 | * | |
7 | * The System z PCI code is a rewrite from a prototype by | |
8 | * the following people (Kudoz!): | |
bedef755 JG |
9 | * Alexander Schmidt |
10 | * Christoph Raisch | |
11 | * Hannes Hering | |
12 | * Hoang-Nam Nguyen | |
13 | * Jan-Bernd Themann | |
14 | * Stefan Roscher | |
15 | * Thomas Klein | |
cd248341 JG |
16 | */ |
17 | ||
18 | #define COMPONENT "zPCI" | |
19 | #define pr_fmt(fmt) COMPONENT ": " fmt | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/err.h> | |
24 | #include <linux/export.h> | |
25 | #include <linux/delay.h> | |
9a4da8a5 JG |
26 | #include <linux/irq.h> |
27 | #include <linux/kernel_stat.h> | |
cd248341 JG |
28 | #include <linux/seq_file.h> |
29 | #include <linux/pci.h> | |
30 | #include <linux/msi.h> | |
31 | ||
9a4da8a5 JG |
32 | #include <asm/isc.h> |
33 | #include <asm/airq.h> | |
cd248341 JG |
34 | #include <asm/facility.h> |
35 | #include <asm/pci_insn.h> | |
a755a45d | 36 | #include <asm/pci_clp.h> |
828b35f6 | 37 | #include <asm/pci_dma.h> |
cd248341 JG |
38 | |
39 | #define DEBUG /* enable pr_debug */ | |
40 | ||
9a4da8a5 JG |
41 | #define SIC_IRQ_MODE_ALL 0 |
42 | #define SIC_IRQ_MODE_SINGLE 1 | |
43 | ||
cd248341 JG |
44 | #define ZPCI_NR_DMA_SPACES 1 |
45 | #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS | |
46 | ||
47 | /* list of all detected zpci devices */ | |
48 | LIST_HEAD(zpci_list); | |
7441b062 | 49 | EXPORT_SYMBOL_GPL(zpci_list); |
cd248341 | 50 | DEFINE_MUTEX(zpci_list_lock); |
7441b062 JG |
51 | EXPORT_SYMBOL_GPL(zpci_list_lock); |
52 | ||
cd248341 | 53 | |
1f44a225 MS |
54 | static void zpci_enable_irq(struct irq_data *data); |
55 | static void zpci_disable_irq(struct irq_data *data); | |
cd248341 | 56 | |
1f44a225 MS |
57 | static struct irq_chip zpci_irq_chip = { |
58 | .name = "zPCI", | |
59 | .irq_unmask = zpci_enable_irq, | |
60 | .irq_mask = zpci_disable_irq, | |
9a4da8a5 JG |
61 | }; |
62 | ||
1f44a225 MS |
63 | static struct pci_hp_callback_ops *hotplug_ops; |
64 | ||
65 | static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); | |
66 | static DEFINE_SPINLOCK(zpci_domain_lock); | |
9a4da8a5 | 67 | |
5d0d8f43 | 68 | static struct airq_iv *zpci_aisb_iv; |
1f44a225 | 69 | static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES]; |
9a4da8a5 | 70 | |
f4eae94f MS |
71 | /* Adapter interrupt definitions */ |
72 | static void zpci_irq_handler(struct airq_struct *airq); | |
73 | ||
74 | static struct airq_struct zpci_airq = { | |
75 | .handler = zpci_irq_handler, | |
76 | .isc = PCI_ISC, | |
77 | }; | |
9a4da8a5 | 78 | |
cd248341 JG |
79 | /* I/O Map */ |
80 | static DEFINE_SPINLOCK(zpci_iomap_lock); | |
81 | static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); | |
82 | struct zpci_iomap_entry *zpci_iomap_start; | |
83 | EXPORT_SYMBOL_GPL(zpci_iomap_start); | |
84 | ||
d0b08853 JG |
85 | static struct kmem_cache *zdev_fmb_cache; |
86 | ||
cd248341 JG |
87 | struct zpci_dev *get_zdev(struct pci_dev *pdev) |
88 | { | |
89 | return (struct zpci_dev *) pdev->sysdata; | |
90 | } | |
91 | ||
92 | struct zpci_dev *get_zdev_by_fid(u32 fid) | |
93 | { | |
94 | struct zpci_dev *tmp, *zdev = NULL; | |
95 | ||
96 | mutex_lock(&zpci_list_lock); | |
97 | list_for_each_entry(tmp, &zpci_list, entry) { | |
98 | if (tmp->fid == fid) { | |
99 | zdev = tmp; | |
100 | break; | |
101 | } | |
102 | } | |
103 | mutex_unlock(&zpci_list_lock); | |
104 | return zdev; | |
105 | } | |
106 | ||
107 | bool zpci_fid_present(u32 fid) | |
108 | { | |
109 | return (get_zdev_by_fid(fid) != NULL) ? true : false; | |
110 | } | |
111 | ||
112 | static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus) | |
113 | { | |
114 | return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL; | |
115 | } | |
116 | ||
117 | int pci_domain_nr(struct pci_bus *bus) | |
118 | { | |
119 | return ((struct zpci_dev *) bus->sysdata)->domain; | |
120 | } | |
121 | EXPORT_SYMBOL_GPL(pci_domain_nr); | |
122 | ||
123 | int pci_proc_domain(struct pci_bus *bus) | |
124 | { | |
125 | return pci_domain_nr(bus); | |
126 | } | |
127 | EXPORT_SYMBOL_GPL(pci_proc_domain); | |
128 | ||
9a4da8a5 | 129 | /* Modify PCI: Register adapter interruptions */ |
5d0d8f43 | 130 | static int zpci_set_airq(struct zpci_dev *zdev) |
9a4da8a5 JG |
131 | { |
132 | u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); | |
133 | struct zpci_fib *fib; | |
134 | int rc; | |
135 | ||
136 | fib = (void *) get_zeroed_page(GFP_KERNEL); | |
137 | if (!fib) | |
138 | return -ENOMEM; | |
139 | ||
140 | fib->isc = PCI_ISC; | |
9a4da8a5 | 141 | fib->sum = 1; /* enable summary notifications */ |
5d0d8f43 MS |
142 | fib->noi = airq_iv_end(zdev->aibv); |
143 | fib->aibv = (unsigned long) zdev->aibv->vector; | |
144 | fib->aibvo = 0; /* each zdev has its own interrupt vector */ | |
145 | fib->aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8; | |
146 | fib->aisbo = zdev->aisb & 63; | |
9a4da8a5 | 147 | |
9389339f | 148 | rc = zpci_mod_fc(req, fib); |
9a4da8a5 JG |
149 | pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi); |
150 | ||
151 | free_page((unsigned long) fib); | |
152 | return rc; | |
153 | } | |
154 | ||
155 | struct mod_pci_args { | |
156 | u64 base; | |
157 | u64 limit; | |
158 | u64 iota; | |
d0b08853 | 159 | u64 fmb_addr; |
9a4da8a5 JG |
160 | }; |
161 | ||
162 | static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args) | |
163 | { | |
164 | u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn); | |
165 | struct zpci_fib *fib; | |
166 | int rc; | |
167 | ||
168 | /* The FIB must be available even if it's not used */ | |
169 | fib = (void *) get_zeroed_page(GFP_KERNEL); | |
170 | if (!fib) | |
171 | return -ENOMEM; | |
172 | ||
173 | fib->pba = args->base; | |
174 | fib->pal = args->limit; | |
175 | fib->iota = args->iota; | |
d0b08853 | 176 | fib->fmb_addr = args->fmb_addr; |
9a4da8a5 | 177 | |
9389339f | 178 | rc = zpci_mod_fc(req, fib); |
9a4da8a5 JG |
179 | free_page((unsigned long) fib); |
180 | return rc; | |
181 | } | |
182 | ||
828b35f6 JG |
183 | /* Modify PCI: Register I/O address translation parameters */ |
184 | int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas, | |
185 | u64 base, u64 limit, u64 iota) | |
186 | { | |
d0b08853 | 187 | struct mod_pci_args args = { base, limit, iota, 0 }; |
828b35f6 JG |
188 | |
189 | WARN_ON_ONCE(iota & 0x3fff); | |
190 | args.iota |= ZPCI_IOTA_RTTO_FLAG; | |
191 | return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args); | |
192 | } | |
193 | ||
194 | /* Modify PCI: Unregister I/O address translation parameters */ | |
195 | int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas) | |
196 | { | |
d0b08853 | 197 | struct mod_pci_args args = { 0, 0, 0, 0 }; |
828b35f6 JG |
198 | |
199 | return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args); | |
200 | } | |
201 | ||
9a4da8a5 | 202 | /* Modify PCI: Unregister adapter interruptions */ |
5d0d8f43 | 203 | static int zpci_clear_airq(struct zpci_dev *zdev) |
9a4da8a5 | 204 | { |
d0b08853 | 205 | struct mod_pci_args args = { 0, 0, 0, 0 }; |
9a4da8a5 JG |
206 | |
207 | return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args); | |
208 | } | |
209 | ||
d0b08853 JG |
210 | /* Modify PCI: Set PCI function measurement parameters */ |
211 | int zpci_fmb_enable_device(struct zpci_dev *zdev) | |
212 | { | |
213 | struct mod_pci_args args = { 0, 0, 0, 0 }; | |
214 | ||
215 | if (zdev->fmb) | |
216 | return -EINVAL; | |
217 | ||
08b42124 | 218 | zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL); |
d0b08853 JG |
219 | if (!zdev->fmb) |
220 | return -ENOMEM; | |
d0b08853 JG |
221 | WARN_ON((u64) zdev->fmb & 0xf); |
222 | ||
223 | args.fmb_addr = virt_to_phys(zdev->fmb); | |
224 | return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); | |
225 | } | |
226 | ||
227 | /* Modify PCI: Disable PCI function measurement */ | |
228 | int zpci_fmb_disable_device(struct zpci_dev *zdev) | |
229 | { | |
230 | struct mod_pci_args args = { 0, 0, 0, 0 }; | |
231 | int rc; | |
232 | ||
233 | if (!zdev->fmb) | |
234 | return -EINVAL; | |
235 | ||
236 | /* Function measurement is disabled if fmb address is zero */ | |
237 | rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); | |
238 | ||
239 | kmem_cache_free(zdev_fmb_cache, zdev->fmb); | |
240 | zdev->fmb = NULL; | |
241 | return rc; | |
242 | } | |
243 | ||
cd248341 JG |
244 | #define ZPCI_PCIAS_CFGSPC 15 |
245 | ||
246 | static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len) | |
247 | { | |
248 | u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); | |
249 | u64 data; | |
250 | int rc; | |
251 | ||
9389339f | 252 | rc = zpci_load(&data, req, offset); |
b170bad4 SO |
253 | if (!rc) { |
254 | data = data << ((8 - len) * 8); | |
255 | data = le64_to_cpu(data); | |
cd248341 | 256 | *val = (u32) data; |
b170bad4 | 257 | } else |
cd248341 JG |
258 | *val = 0xffffffff; |
259 | return rc; | |
260 | } | |
261 | ||
262 | static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len) | |
263 | { | |
264 | u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); | |
265 | u64 data = val; | |
266 | int rc; | |
267 | ||
268 | data = cpu_to_le64(data); | |
269 | data = data >> ((8 - len) * 8); | |
9389339f | 270 | rc = zpci_store(data, req, offset); |
cd248341 JG |
271 | return rc; |
272 | } | |
273 | ||
1f44a225 MS |
274 | static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag) |
275 | { | |
276 | int offset, pos; | |
277 | u32 mask_bits; | |
278 | ||
279 | if (msi->msi_attrib.is_msix) { | |
280 | offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + | |
281 | PCI_MSIX_ENTRY_VECTOR_CTRL; | |
282 | msi->masked = readl(msi->mask_base + offset); | |
283 | writel(flag, msi->mask_base + offset); | |
284 | } else if (msi->msi_attrib.maskbit) { | |
285 | pos = (long) msi->mask_base; | |
286 | pci_read_config_dword(msi->dev, pos, &mask_bits); | |
287 | mask_bits &= ~(mask); | |
288 | mask_bits |= flag & mask; | |
289 | pci_write_config_dword(msi->dev, pos, mask_bits); | |
290 | } else | |
291 | return 0; | |
292 | ||
293 | msi->msi_attrib.maskbit = !!flag; | |
294 | return 1; | |
295 | } | |
296 | ||
297 | static void zpci_enable_irq(struct irq_data *data) | |
9a4da8a5 | 298 | { |
1f44a225 | 299 | struct msi_desc *msi = irq_get_msi_desc(data->irq); |
9a4da8a5 JG |
300 | |
301 | zpci_msi_set_mask_bits(msi, 1, 0); | |
302 | } | |
9a4da8a5 | 303 | |
1f44a225 | 304 | static void zpci_disable_irq(struct irq_data *data) |
9a4da8a5 | 305 | { |
1f44a225 | 306 | struct msi_desc *msi = irq_get_msi_desc(data->irq); |
9a4da8a5 JG |
307 | |
308 | zpci_msi_set_mask_bits(msi, 1, 1); | |
309 | } | |
9a4da8a5 | 310 | |
b881bc46 | 311 | void pcibios_fixup_bus(struct pci_bus *bus) |
cd248341 JG |
312 | { |
313 | } | |
314 | ||
315 | resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |
316 | resource_size_t size, | |
317 | resource_size_t align) | |
318 | { | |
319 | return 0; | |
320 | } | |
321 | ||
87bc359b JG |
322 | /* combine single writes by using store-block insn */ |
323 | void __iowrite64_copy(void __iomem *to, const void *from, size_t count) | |
324 | { | |
325 | zpci_memcpy_toio(to, from, count); | |
326 | } | |
327 | ||
cd248341 JG |
328 | /* Create a virtual mapping cookie for a PCI BAR */ |
329 | void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max) | |
330 | { | |
331 | struct zpci_dev *zdev = get_zdev(pdev); | |
332 | u64 addr; | |
333 | int idx; | |
334 | ||
335 | if ((bar & 7) != bar) | |
336 | return NULL; | |
337 | ||
338 | idx = zdev->bars[bar].map_idx; | |
339 | spin_lock(&zpci_iomap_lock); | |
340 | zpci_iomap_start[idx].fh = zdev->fh; | |
341 | zpci_iomap_start[idx].bar = bar; | |
342 | spin_unlock(&zpci_iomap_lock); | |
343 | ||
344 | addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); | |
345 | return (void __iomem *) addr; | |
346 | } | |
347 | EXPORT_SYMBOL_GPL(pci_iomap); | |
348 | ||
349 | void pci_iounmap(struct pci_dev *pdev, void __iomem *addr) | |
350 | { | |
351 | unsigned int idx; | |
352 | ||
353 | idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48; | |
354 | spin_lock(&zpci_iomap_lock); | |
355 | zpci_iomap_start[idx].fh = 0; | |
356 | zpci_iomap_start[idx].bar = 0; | |
357 | spin_unlock(&zpci_iomap_lock); | |
358 | } | |
359 | EXPORT_SYMBOL_GPL(pci_iounmap); | |
360 | ||
361 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, | |
362 | int size, u32 *val) | |
363 | { | |
364 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
2c3700bb | 365 | int ret; |
cd248341 JG |
366 | |
367 | if (!zdev || devfn != ZPCI_DEVFN) | |
2c3700bb SO |
368 | ret = -ENODEV; |
369 | else | |
370 | ret = zpci_cfg_load(zdev, where, val, size); | |
371 | ||
372 | return ret; | |
cd248341 JG |
373 | } |
374 | ||
375 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, | |
376 | int size, u32 val) | |
377 | { | |
378 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
2c3700bb | 379 | int ret; |
cd248341 JG |
380 | |
381 | if (!zdev || devfn != ZPCI_DEVFN) | |
2c3700bb SO |
382 | ret = -ENODEV; |
383 | else | |
384 | ret = zpci_cfg_store(zdev, where, val, size); | |
385 | ||
386 | return ret; | |
cd248341 JG |
387 | } |
388 | ||
389 | static struct pci_ops pci_root_ops = { | |
390 | .read = pci_read, | |
391 | .write = pci_write, | |
392 | }; | |
393 | ||
f4eae94f | 394 | static void zpci_irq_handler(struct airq_struct *airq) |
9a4da8a5 | 395 | { |
5d0d8f43 | 396 | unsigned long si, ai; |
1f44a225 | 397 | struct airq_iv *aibv; |
5d0d8f43 | 398 | int irqs_on = 0; |
9a4da8a5 | 399 | |
420f42ec | 400 | inc_irq_stat(IRQIO_PCI); |
5d0d8f43 MS |
401 | for (si = 0;;) { |
402 | /* Scan adapter summary indicator bit vector */ | |
403 | si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv)); | |
404 | if (si == -1UL) { | |
405 | if (irqs_on++) | |
406 | /* End of second scan with interrupts on. */ | |
407 | break; | |
408 | /* First scan complete, reenable interrupts. */ | |
409 | zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); | |
410 | si = 0; | |
411 | continue; | |
412 | } | |
9a4da8a5 | 413 | |
5d0d8f43 | 414 | /* Scan the adapter interrupt vector for this device. */ |
1f44a225 | 415 | aibv = zpci_aibv[si]; |
5d0d8f43 | 416 | for (ai = 0;;) { |
1f44a225 | 417 | ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv)); |
5d0d8f43 MS |
418 | if (ai == -1UL) |
419 | break; | |
420f42ec | 420 | inc_irq_stat(IRQIO_MSI); |
1f44a225 MS |
421 | airq_iv_lock(aibv, ai); |
422 | generic_handle_irq(airq_iv_get_data(aibv, ai)); | |
423 | airq_iv_unlock(aibv, ai); | |
9a4da8a5 JG |
424 | } |
425 | } | |
5d0d8f43 | 426 | } |
9a4da8a5 | 427 | |
5d0d8f43 | 428 | int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
9a4da8a5 JG |
429 | { |
430 | struct zpci_dev *zdev = get_zdev(pdev); | |
1f44a225 | 431 | unsigned int hwirq, irq, msi_vecs; |
5d0d8f43 | 432 | unsigned long aisb; |
9a4da8a5 | 433 | struct msi_desc *msi; |
1f44a225 | 434 | struct msi_msg msg; |
9a4da8a5 JG |
435 | int rc; |
436 | ||
5d0d8f43 MS |
437 | pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec); |
438 | if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI) | |
439 | return -EINVAL; | |
440 | msi_vecs = min(nvec, ZPCI_MSI_VEC_MAX); | |
1f44a225 | 441 | msi_vecs = min_t(unsigned int, msi_vecs, CONFIG_PCI_NR_MSI); |
9a4da8a5 | 442 | |
5d0d8f43 MS |
443 | /* Allocate adapter summary indicator bit */ |
444 | rc = -EIO; | |
445 | aisb = airq_iv_alloc_bit(zpci_aisb_iv); | |
446 | if (aisb == -1UL) | |
447 | goto out; | |
9a4da8a5 | 448 | zdev->aisb = aisb; |
9a4da8a5 | 449 | |
5d0d8f43 MS |
450 | /* Create adapter interrupt vector */ |
451 | rc = -ENOMEM; | |
1f44a225 | 452 | zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK); |
5d0d8f43 MS |
453 | if (!zdev->aibv) |
454 | goto out_si; | |
9a4da8a5 | 455 | |
5d0d8f43 | 456 | /* Wire up shortcut pointer */ |
1f44a225 | 457 | zpci_aibv[aisb] = zdev->aibv; |
5d0d8f43 | 458 | |
1f44a225 MS |
459 | /* Request MSI interrupts */ |
460 | hwirq = 0; | |
9a4da8a5 | 461 | list_for_each_entry(msi, &pdev->msi_list, list) { |
1f44a225 MS |
462 | rc = -EIO; |
463 | irq = irq_alloc_desc(0); /* Alloc irq on node 0 */ | |
464 | if (irq == NO_IRQ) | |
465 | goto out_msi; | |
466 | rc = irq_set_msi_desc(irq, msi); | |
9a4da8a5 | 467 | if (rc) |
5d0d8f43 | 468 | goto out_msi; |
1f44a225 MS |
469 | irq_set_chip_and_handler(irq, &zpci_irq_chip, |
470 | handle_simple_irq); | |
471 | msg.data = hwirq; | |
472 | msg.address_lo = zdev->msi_addr & 0xffffffff; | |
473 | msg.address_hi = zdev->msi_addr >> 32; | |
474 | write_msi_msg(irq, &msg); | |
475 | airq_iv_set_data(zdev->aibv, hwirq, irq); | |
476 | hwirq++; | |
9a4da8a5 JG |
477 | } |
478 | ||
5d0d8f43 MS |
479 | /* Enable adapter interrupts */ |
480 | rc = zpci_set_airq(zdev); | |
481 | if (rc) | |
482 | goto out_msi; | |
483 | ||
484 | return (msi_vecs == nvec) ? 0 : msi_vecs; | |
485 | ||
486 | out_msi: | |
5d0d8f43 | 487 | list_for_each_entry(msi, &pdev->msi_list, list) { |
1f44a225 | 488 | if (hwirq-- == 0) |
5d0d8f43 | 489 | break; |
1f44a225 MS |
490 | irq_set_msi_desc(msi->irq, NULL); |
491 | irq_free_desc(msi->irq); | |
492 | msi->msg.address_lo = 0; | |
493 | msi->msg.address_hi = 0; | |
494 | msi->msg.data = 0; | |
495 | msi->irq = 0; | |
9a4da8a5 | 496 | } |
1f44a225 | 497 | zpci_aibv[aisb] = NULL; |
5d0d8f43 MS |
498 | airq_iv_release(zdev->aibv); |
499 | out_si: | |
500 | airq_iv_free_bit(zpci_aisb_iv, aisb); | |
501 | out: | |
502 | dev_err(&pdev->dev, "register MSI failed with: %d\n", rc); | |
503 | return rc; | |
9a4da8a5 JG |
504 | } |
505 | ||
5d0d8f43 | 506 | void arch_teardown_msi_irqs(struct pci_dev *pdev) |
9a4da8a5 JG |
507 | { |
508 | struct zpci_dev *zdev = get_zdev(pdev); | |
509 | struct msi_desc *msi; | |
5d0d8f43 MS |
510 | int rc; |
511 | ||
512 | pr_info("%s: on pdev: %p\n", __func__, pdev); | |
9a4da8a5 | 513 | |
5d0d8f43 MS |
514 | /* Disable adapter interrupts */ |
515 | rc = zpci_clear_airq(zdev); | |
9a4da8a5 JG |
516 | if (rc) { |
517 | dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc); | |
518 | return; | |
519 | } | |
520 | ||
1f44a225 MS |
521 | /* Release MSI interrupts */ |
522 | list_for_each_entry(msi, &pdev->msi_list, list) { | |
523 | zpci_msi_set_mask_bits(msi, 1, 1); | |
524 | irq_set_msi_desc(msi->irq, NULL); | |
525 | irq_free_desc(msi->irq); | |
526 | msi->msg.address_lo = 0; | |
527 | msi->msg.address_hi = 0; | |
528 | msi->msg.data = 0; | |
529 | msi->irq = 0; | |
530 | } | |
9a4da8a5 | 531 | |
1f44a225 | 532 | zpci_aibv[zdev->aisb] = NULL; |
5d0d8f43 MS |
533 | airq_iv_release(zdev->aibv); |
534 | airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); | |
9a4da8a5 JG |
535 | } |
536 | ||
cd248341 JG |
537 | static void zpci_map_resources(struct zpci_dev *zdev) |
538 | { | |
539 | struct pci_dev *pdev = zdev->pdev; | |
540 | resource_size_t len; | |
541 | int i; | |
542 | ||
543 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
544 | len = pci_resource_len(pdev, i); | |
545 | if (!len) | |
546 | continue; | |
547 | pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0); | |
548 | pdev->resource[i].end = pdev->resource[i].start + len - 1; | |
549 | pr_debug("BAR%i: -> start: %Lx end: %Lx\n", | |
550 | i, pdev->resource[i].start, pdev->resource[i].end); | |
551 | } | |
944239c5 SO |
552 | } |
553 | ||
554 | static void zpci_unmap_resources(struct zpci_dev *zdev) | |
555 | { | |
556 | struct pci_dev *pdev = zdev->pdev; | |
557 | resource_size_t len; | |
558 | int i; | |
559 | ||
560 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
561 | len = pci_resource_len(pdev, i); | |
562 | if (!len) | |
563 | continue; | |
564 | pci_iounmap(pdev, (void *) pdev->resource[i].start); | |
565 | } | |
566 | } | |
cd248341 | 567 | |
cd248341 JG |
568 | struct zpci_dev *zpci_alloc_device(void) |
569 | { | |
570 | struct zpci_dev *zdev; | |
571 | ||
572 | /* Alloc memory for our private pci device data */ | |
573 | zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); | |
5d0d8f43 | 574 | return zdev ? : ERR_PTR(-ENOMEM); |
cd248341 JG |
575 | } |
576 | ||
577 | void zpci_free_device(struct zpci_dev *zdev) | |
578 | { | |
579 | kfree(zdev); | |
580 | } | |
581 | ||
cd248341 JG |
582 | /* |
583 | * Too late for any s390 specific setup, since interrupts must be set up | |
584 | * already which requires DMA setup too and the pci scan will access the | |
585 | * config space, which only works if the function handle is enabled. | |
586 | */ | |
587 | int pcibios_enable_device(struct pci_dev *pdev, int mask) | |
588 | { | |
589 | struct resource *res; | |
590 | u16 cmd; | |
591 | int i; | |
592 | ||
593 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
594 | ||
595 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
596 | res = &pdev->resource[i]; | |
597 | ||
598 | if (res->flags & IORESOURCE_IO) | |
599 | return -EINVAL; | |
600 | ||
601 | if (res->flags & IORESOURCE_MEM) | |
602 | cmd |= PCI_COMMAND_MEMORY; | |
603 | } | |
604 | pci_write_config_word(pdev, PCI_COMMAND, cmd); | |
605 | return 0; | |
606 | } | |
607 | ||
1e8da956 JG |
608 | int pcibios_add_platform_entries(struct pci_dev *pdev) |
609 | { | |
610 | return zpci_sysfs_add_device(&pdev->dev); | |
611 | } | |
612 | ||
9a4da8a5 JG |
613 | static int __init zpci_irq_init(void) |
614 | { | |
5d0d8f43 | 615 | int rc; |
9a4da8a5 | 616 | |
f4eae94f MS |
617 | rc = register_adapter_interrupt(&zpci_airq); |
618 | if (rc) | |
5d0d8f43 | 619 | goto out; |
f4eae94f MS |
620 | /* Set summary to 1 to be called every time for the ISC. */ |
621 | *zpci_airq.lsi_ptr = 1; | |
9a4da8a5 | 622 | |
5d0d8f43 MS |
623 | rc = -ENOMEM; |
624 | zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC); | |
625 | if (!zpci_aisb_iv) | |
626 | goto out_airq; | |
9a4da8a5 | 627 | |
9389339f | 628 | zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); |
9a4da8a5 JG |
629 | return 0; |
630 | ||
5d0d8f43 MS |
631 | out_airq: |
632 | unregister_adapter_interrupt(&zpci_airq); | |
633 | out: | |
9a4da8a5 JG |
634 | return rc; |
635 | } | |
636 | ||
637 | static void zpci_irq_exit(void) | |
638 | { | |
5d0d8f43 | 639 | airq_iv_release(zpci_aisb_iv); |
f4eae94f | 640 | unregister_adapter_interrupt(&zpci_airq); |
9a4da8a5 JG |
641 | } |
642 | ||
cd248341 JG |
643 | static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size, |
644 | unsigned long flags, int domain) | |
645 | { | |
646 | struct resource *r; | |
647 | char *name; | |
648 | int rc; | |
649 | ||
650 | r = kzalloc(sizeof(*r), GFP_KERNEL); | |
651 | if (!r) | |
652 | return ERR_PTR(-ENOMEM); | |
653 | r->start = start; | |
654 | r->end = r->start + size - 1; | |
655 | r->flags = flags; | |
656 | r->parent = &iomem_resource; | |
657 | name = kmalloc(18, GFP_KERNEL); | |
658 | if (!name) { | |
659 | kfree(r); | |
660 | return ERR_PTR(-ENOMEM); | |
661 | } | |
662 | sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR); | |
663 | r->name = name; | |
664 | ||
665 | rc = request_resource(&iomem_resource, r); | |
666 | if (rc) | |
667 | pr_debug("request resource %pR failed\n", r); | |
668 | return r; | |
669 | } | |
670 | ||
671 | static int zpci_alloc_iomap(struct zpci_dev *zdev) | |
672 | { | |
673 | int entry; | |
674 | ||
675 | spin_lock(&zpci_iomap_lock); | |
676 | entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); | |
677 | if (entry == ZPCI_IOMAP_MAX_ENTRIES) { | |
678 | spin_unlock(&zpci_iomap_lock); | |
679 | return -ENOSPC; | |
680 | } | |
681 | set_bit(entry, zpci_iomap); | |
682 | spin_unlock(&zpci_iomap_lock); | |
683 | return entry; | |
684 | } | |
685 | ||
686 | static void zpci_free_iomap(struct zpci_dev *zdev, int entry) | |
687 | { | |
688 | spin_lock(&zpci_iomap_lock); | |
689 | memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry)); | |
690 | clear_bit(entry, zpci_iomap); | |
691 | spin_unlock(&zpci_iomap_lock); | |
692 | } | |
693 | ||
af0a8a84 SO |
694 | int pcibios_add_device(struct pci_dev *pdev) |
695 | { | |
696 | struct zpci_dev *zdev = get_zdev(pdev); | |
697 | ||
1c21351b | 698 | zdev->pdev = pdev; |
af0a8a84 SO |
699 | zpci_debug_init_device(zdev); |
700 | zpci_fmb_enable_device(zdev); | |
701 | zpci_map_resources(zdev); | |
702 | ||
703 | return 0; | |
704 | } | |
705 | ||
944239c5 SO |
706 | void pcibios_release_device(struct pci_dev *pdev) |
707 | { | |
708 | struct zpci_dev *zdev = get_zdev(pdev); | |
709 | ||
710 | zpci_unmap_resources(zdev); | |
711 | zpci_fmb_disable_device(zdev); | |
712 | zpci_debug_exit_device(zdev); | |
713 | zdev->pdev = NULL; | |
714 | } | |
715 | ||
1c21351b | 716 | static int zpci_scan_bus(struct zpci_dev *zdev) |
cd248341 JG |
717 | { |
718 | struct resource *res; | |
719 | LIST_HEAD(resources); | |
720 | int i; | |
721 | ||
722 | /* allocate mapping entry for each used bar */ | |
723 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
724 | unsigned long addr, size, flags; | |
725 | int entry; | |
726 | ||
727 | if (!zdev->bars[i].size) | |
728 | continue; | |
729 | entry = zpci_alloc_iomap(zdev); | |
730 | if (entry < 0) | |
731 | return entry; | |
732 | zdev->bars[i].map_idx = entry; | |
733 | ||
734 | /* only MMIO is supported */ | |
735 | flags = IORESOURCE_MEM; | |
736 | if (zdev->bars[i].val & 8) | |
737 | flags |= IORESOURCE_PREFETCH; | |
738 | if (zdev->bars[i].val & 4) | |
739 | flags |= IORESOURCE_MEM_64; | |
740 | ||
741 | addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48); | |
742 | ||
743 | size = 1UL << zdev->bars[i].size; | |
744 | ||
745 | res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain); | |
746 | if (IS_ERR(res)) { | |
747 | zpci_free_iomap(zdev, entry); | |
748 | return PTR_ERR(res); | |
749 | } | |
750 | pci_add_resource(&resources, res); | |
751 | } | |
752 | ||
1c21351b SO |
753 | zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops, |
754 | zdev, &resources); | |
cd248341 JG |
755 | if (!zdev->bus) |
756 | return -EIO; | |
757 | ||
758 | zdev->bus->max_bus_speed = zdev->max_bus_speed; | |
759 | return 0; | |
760 | } | |
761 | ||
762 | static int zpci_alloc_domain(struct zpci_dev *zdev) | |
763 | { | |
764 | spin_lock(&zpci_domain_lock); | |
765 | zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES); | |
766 | if (zdev->domain == ZPCI_NR_DEVICES) { | |
767 | spin_unlock(&zpci_domain_lock); | |
768 | return -ENOSPC; | |
769 | } | |
770 | set_bit(zdev->domain, zpci_domain); | |
771 | spin_unlock(&zpci_domain_lock); | |
772 | return 0; | |
773 | } | |
774 | ||
775 | static void zpci_free_domain(struct zpci_dev *zdev) | |
776 | { | |
777 | spin_lock(&zpci_domain_lock); | |
778 | clear_bit(zdev->domain, zpci_domain); | |
779 | spin_unlock(&zpci_domain_lock); | |
780 | } | |
781 | ||
a755a45d JG |
782 | int zpci_enable_device(struct zpci_dev *zdev) |
783 | { | |
784 | int rc; | |
785 | ||
786 | rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); | |
787 | if (rc) | |
788 | goto out; | |
789 | pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid); | |
828b35f6 JG |
790 | |
791 | rc = zpci_dma_init_device(zdev); | |
792 | if (rc) | |
793 | goto out_dma; | |
a755a45d | 794 | return 0; |
828b35f6 JG |
795 | |
796 | out_dma: | |
797 | clp_disable_fh(zdev); | |
a755a45d JG |
798 | out: |
799 | return rc; | |
800 | } | |
801 | EXPORT_SYMBOL_GPL(zpci_enable_device); | |
802 | ||
cb65a669 SO |
803 | int zpci_disable_device(struct zpci_dev *zdev) |
804 | { | |
805 | zpci_dma_exit_device(zdev); | |
806 | return clp_disable_fh(zdev); | |
807 | } | |
808 | EXPORT_SYMBOL_GPL(zpci_disable_device); | |
809 | ||
cd248341 JG |
810 | int zpci_create_device(struct zpci_dev *zdev) |
811 | { | |
812 | int rc; | |
813 | ||
814 | rc = zpci_alloc_domain(zdev); | |
815 | if (rc) | |
816 | goto out; | |
817 | ||
1c21351b SO |
818 | if (zdev->state == ZPCI_FN_STATE_CONFIGURED) { |
819 | rc = zpci_enable_device(zdev); | |
820 | if (rc) | |
821 | goto out_free; | |
822 | ||
823 | zdev->state = ZPCI_FN_STATE_ONLINE; | |
824 | } | |
825 | rc = zpci_scan_bus(zdev); | |
cd248341 | 826 | if (rc) |
1c21351b | 827 | goto out_disable; |
cd248341 JG |
828 | |
829 | mutex_lock(&zpci_list_lock); | |
830 | list_add_tail(&zdev->entry, &zpci_list); | |
53923354 SO |
831 | if (hotplug_ops) |
832 | hotplug_ops->create_slot(zdev); | |
cd248341 JG |
833 | mutex_unlock(&zpci_list_lock); |
834 | ||
cd248341 JG |
835 | return 0; |
836 | ||
1c21351b SO |
837 | out_disable: |
838 | if (zdev->state == ZPCI_FN_STATE_ONLINE) | |
839 | zpci_disable_device(zdev); | |
840 | out_free: | |
cd248341 JG |
841 | zpci_free_domain(zdev); |
842 | out: | |
843 | return rc; | |
844 | } | |
845 | ||
846 | void zpci_stop_device(struct zpci_dev *zdev) | |
847 | { | |
828b35f6 | 848 | zpci_dma_exit_device(zdev); |
cd248341 JG |
849 | /* |
850 | * Note: SCLP disables fh via set-pci-fn so don't | |
851 | * do that here. | |
852 | */ | |
853 | } | |
854 | EXPORT_SYMBOL_GPL(zpci_stop_device); | |
855 | ||
cd248341 JG |
856 | static inline int barsize(u8 size) |
857 | { | |
858 | return (size) ? (1 << size) >> 10 : 0; | |
859 | } | |
860 | ||
861 | static int zpci_mem_init(void) | |
862 | { | |
d0b08853 JG |
863 | zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb), |
864 | 16, 0, NULL); | |
865 | if (!zdev_fmb_cache) | |
1f44a225 | 866 | goto error_zdev; |
d0b08853 | 867 | |
cd248341 JG |
868 | /* TODO: use realloc */ |
869 | zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start), | |
870 | GFP_KERNEL); | |
871 | if (!zpci_iomap_start) | |
9a4da8a5 | 872 | goto error_iomap; |
cd248341 JG |
873 | return 0; |
874 | ||
9a4da8a5 | 875 | error_iomap: |
d0b08853 | 876 | kmem_cache_destroy(zdev_fmb_cache); |
cd248341 JG |
877 | error_zdev: |
878 | return -ENOMEM; | |
879 | } | |
880 | ||
881 | static void zpci_mem_exit(void) | |
882 | { | |
883 | kfree(zpci_iomap_start); | |
d0b08853 | 884 | kmem_cache_destroy(zdev_fmb_cache); |
cd248341 JG |
885 | } |
886 | ||
53923354 SO |
887 | void zpci_register_hp_ops(struct pci_hp_callback_ops *ops) |
888 | { | |
889 | mutex_lock(&zpci_list_lock); | |
890 | hotplug_ops = ops; | |
891 | mutex_unlock(&zpci_list_lock); | |
892 | } | |
893 | EXPORT_SYMBOL_GPL(zpci_register_hp_ops); | |
894 | ||
895 | void zpci_deregister_hp_ops(void) | |
896 | { | |
897 | mutex_lock(&zpci_list_lock); | |
898 | hotplug_ops = NULL; | |
899 | mutex_unlock(&zpci_list_lock); | |
900 | } | |
901 | EXPORT_SYMBOL_GPL(zpci_deregister_hp_ops); | |
902 | ||
89b0dc95 | 903 | unsigned int s390_pci_probe; |
1e5635d1 | 904 | EXPORT_SYMBOL_GPL(s390_pci_probe); |
cd248341 JG |
905 | |
906 | char * __init pcibios_setup(char *str) | |
907 | { | |
89b0dc95 SO |
908 | if (!strcmp(str, "on")) { |
909 | s390_pci_probe = 1; | |
cd248341 JG |
910 | return NULL; |
911 | } | |
912 | return str; | |
913 | } | |
914 | ||
915 | static int __init pci_base_init(void) | |
916 | { | |
917 | int rc; | |
918 | ||
1e5635d1 | 919 | if (!s390_pci_probe) |
cd248341 JG |
920 | return 0; |
921 | ||
922 | if (!test_facility(2) || !test_facility(69) | |
923 | || !test_facility(71) || !test_facility(72)) | |
924 | return 0; | |
925 | ||
926 | pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n", | |
927 | test_facility(69), test_facility(70), | |
928 | test_facility(71)); | |
929 | ||
d0b08853 JG |
930 | rc = zpci_debug_init(); |
931 | if (rc) | |
1f44a225 | 932 | goto out; |
d0b08853 | 933 | |
cd248341 JG |
934 | rc = zpci_mem_init(); |
935 | if (rc) | |
936 | goto out_mem; | |
937 | ||
9a4da8a5 JG |
938 | rc = zpci_irq_init(); |
939 | if (rc) | |
940 | goto out_irq; | |
941 | ||
828b35f6 JG |
942 | rc = zpci_dma_init(); |
943 | if (rc) | |
944 | goto out_dma; | |
945 | ||
a755a45d JG |
946 | rc = clp_find_pci_devices(); |
947 | if (rc) | |
948 | goto out_find; | |
949 | ||
cd248341 JG |
950 | return 0; |
951 | ||
a755a45d | 952 | out_find: |
828b35f6 JG |
953 | zpci_dma_exit(); |
954 | out_dma: | |
9a4da8a5 JG |
955 | zpci_irq_exit(); |
956 | out_irq: | |
cd248341 JG |
957 | zpci_mem_exit(); |
958 | out_mem: | |
d0b08853 | 959 | zpci_debug_exit(); |
1f44a225 | 960 | out: |
cd248341 JG |
961 | return rc; |
962 | } | |
963 | subsys_initcall(pci_base_init); |