Commit | Line | Data |
---|---|---|
cd248341 JG |
1 | /* |
2 | * Copyright IBM Corp. 2012 | |
3 | * | |
4 | * Author(s): | |
5 | * Jan Glauber <jang@linux.vnet.ibm.com> | |
6 | * | |
7 | * The System z PCI code is a rewrite from a prototype by | |
8 | * the following people (Kudoz!): | |
bedef755 JG |
9 | * Alexander Schmidt |
10 | * Christoph Raisch | |
11 | * Hannes Hering | |
12 | * Hoang-Nam Nguyen | |
13 | * Jan-Bernd Themann | |
14 | * Stefan Roscher | |
15 | * Thomas Klein | |
cd248341 JG |
16 | */ |
17 | ||
896cb7e6 GS |
18 | #define KMSG_COMPONENT "zpci" |
19 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
cd248341 JG |
20 | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/err.h> | |
24 | #include <linux/export.h> | |
25 | #include <linux/delay.h> | |
9a4da8a5 JG |
26 | #include <linux/irq.h> |
27 | #include <linux/kernel_stat.h> | |
cd248341 JG |
28 | #include <linux/seq_file.h> |
29 | #include <linux/pci.h> | |
30 | #include <linux/msi.h> | |
31 | ||
9a4da8a5 JG |
32 | #include <asm/isc.h> |
33 | #include <asm/airq.h> | |
cd248341 JG |
34 | #include <asm/facility.h> |
35 | #include <asm/pci_insn.h> | |
a755a45d | 36 | #include <asm/pci_clp.h> |
828b35f6 | 37 | #include <asm/pci_dma.h> |
cd248341 JG |
38 | |
39 | #define DEBUG /* enable pr_debug */ | |
40 | ||
9a4da8a5 JG |
41 | #define SIC_IRQ_MODE_ALL 0 |
42 | #define SIC_IRQ_MODE_SINGLE 1 | |
43 | ||
cd248341 JG |
44 | #define ZPCI_NR_DMA_SPACES 1 |
45 | #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS | |
46 | ||
47 | /* list of all detected zpci devices */ | |
67f43f38 | 48 | static LIST_HEAD(zpci_list); |
57b5918c | 49 | static DEFINE_SPINLOCK(zpci_list_lock); |
cd248341 | 50 | |
1f44a225 MS |
51 | static struct irq_chip zpci_irq_chip = { |
52 | .name = "zPCI", | |
280510f1 TG |
53 | .irq_unmask = pci_msi_unmask_irq, |
54 | .irq_mask = pci_msi_mask_irq, | |
9a4da8a5 JG |
55 | }; |
56 | ||
1f44a225 MS |
57 | static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); |
58 | static DEFINE_SPINLOCK(zpci_domain_lock); | |
9a4da8a5 | 59 | |
5d0d8f43 | 60 | static struct airq_iv *zpci_aisb_iv; |
1f44a225 | 61 | static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES]; |
9a4da8a5 | 62 | |
f4eae94f MS |
63 | /* Adapter interrupt definitions */ |
64 | static void zpci_irq_handler(struct airq_struct *airq); | |
65 | ||
66 | static struct airq_struct zpci_airq = { | |
67 | .handler = zpci_irq_handler, | |
68 | .isc = PCI_ISC, | |
69 | }; | |
9a4da8a5 | 70 | |
cd248341 JG |
71 | /* I/O Map */ |
72 | static DEFINE_SPINLOCK(zpci_iomap_lock); | |
73 | static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); | |
74 | struct zpci_iomap_entry *zpci_iomap_start; | |
75 | EXPORT_SYMBOL_GPL(zpci_iomap_start); | |
76 | ||
d0b08853 JG |
77 | static struct kmem_cache *zdev_fmb_cache; |
78 | ||
cd248341 JG |
79 | struct zpci_dev *get_zdev(struct pci_dev *pdev) |
80 | { | |
81 | return (struct zpci_dev *) pdev->sysdata; | |
82 | } | |
83 | ||
84 | struct zpci_dev *get_zdev_by_fid(u32 fid) | |
85 | { | |
86 | struct zpci_dev *tmp, *zdev = NULL; | |
87 | ||
57b5918c | 88 | spin_lock(&zpci_list_lock); |
cd248341 JG |
89 | list_for_each_entry(tmp, &zpci_list, entry) { |
90 | if (tmp->fid == fid) { | |
91 | zdev = tmp; | |
92 | break; | |
93 | } | |
94 | } | |
57b5918c | 95 | spin_unlock(&zpci_list_lock); |
cd248341 JG |
96 | return zdev; |
97 | } | |
98 | ||
cd248341 JG |
99 | static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus) |
100 | { | |
101 | return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL; | |
102 | } | |
103 | ||
104 | int pci_domain_nr(struct pci_bus *bus) | |
105 | { | |
106 | return ((struct zpci_dev *) bus->sysdata)->domain; | |
107 | } | |
108 | EXPORT_SYMBOL_GPL(pci_domain_nr); | |
109 | ||
110 | int pci_proc_domain(struct pci_bus *bus) | |
111 | { | |
112 | return pci_domain_nr(bus); | |
113 | } | |
114 | EXPORT_SYMBOL_GPL(pci_proc_domain); | |
115 | ||
9a4da8a5 | 116 | /* Modify PCI: Register adapter interruptions */ |
5d0d8f43 | 117 | static int zpci_set_airq(struct zpci_dev *zdev) |
9a4da8a5 JG |
118 | { |
119 | u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); | |
cb4deb69 | 120 | struct zpci_fib fib = {0}; |
9a4da8a5 | 121 | |
cb4deb69 SO |
122 | fib.isc = PCI_ISC; |
123 | fib.sum = 1; /* enable summary notifications */ | |
124 | fib.noi = airq_iv_end(zdev->aibv); | |
125 | fib.aibv = (unsigned long) zdev->aibv->vector; | |
126 | fib.aibvo = 0; /* each zdev has its own interrupt vector */ | |
127 | fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8; | |
128 | fib.aisbo = zdev->aisb & 63; | |
9a4da8a5 | 129 | |
cb4deb69 | 130 | return zpci_mod_fc(req, &fib); |
9a4da8a5 JG |
131 | } |
132 | ||
133 | struct mod_pci_args { | |
134 | u64 base; | |
135 | u64 limit; | |
136 | u64 iota; | |
d0b08853 | 137 | u64 fmb_addr; |
9a4da8a5 JG |
138 | }; |
139 | ||
140 | static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args) | |
141 | { | |
142 | u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn); | |
cb4deb69 SO |
143 | struct zpci_fib fib = {0}; |
144 | ||
145 | fib.pba = args->base; | |
146 | fib.pal = args->limit; | |
147 | fib.iota = args->iota; | |
148 | fib.fmb_addr = args->fmb_addr; | |
149 | ||
150 | return zpci_mod_fc(req, &fib); | |
9a4da8a5 JG |
151 | } |
152 | ||
828b35f6 JG |
153 | /* Modify PCI: Register I/O address translation parameters */ |
154 | int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas, | |
155 | u64 base, u64 limit, u64 iota) | |
156 | { | |
d0b08853 | 157 | struct mod_pci_args args = { base, limit, iota, 0 }; |
828b35f6 JG |
158 | |
159 | WARN_ON_ONCE(iota & 0x3fff); | |
160 | args.iota |= ZPCI_IOTA_RTTO_FLAG; | |
161 | return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args); | |
162 | } | |
163 | ||
164 | /* Modify PCI: Unregister I/O address translation parameters */ | |
165 | int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas) | |
166 | { | |
d0b08853 | 167 | struct mod_pci_args args = { 0, 0, 0, 0 }; |
828b35f6 JG |
168 | |
169 | return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args); | |
170 | } | |
171 | ||
9a4da8a5 | 172 | /* Modify PCI: Unregister adapter interruptions */ |
5d0d8f43 | 173 | static int zpci_clear_airq(struct zpci_dev *zdev) |
9a4da8a5 | 174 | { |
d0b08853 | 175 | struct mod_pci_args args = { 0, 0, 0, 0 }; |
9a4da8a5 JG |
176 | |
177 | return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args); | |
178 | } | |
179 | ||
d0b08853 JG |
180 | /* Modify PCI: Set PCI function measurement parameters */ |
181 | int zpci_fmb_enable_device(struct zpci_dev *zdev) | |
182 | { | |
183 | struct mod_pci_args args = { 0, 0, 0, 0 }; | |
184 | ||
185 | if (zdev->fmb) | |
186 | return -EINVAL; | |
187 | ||
08b42124 | 188 | zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL); |
d0b08853 JG |
189 | if (!zdev->fmb) |
190 | return -ENOMEM; | |
d0b08853 JG |
191 | WARN_ON((u64) zdev->fmb & 0xf); |
192 | ||
193 | args.fmb_addr = virt_to_phys(zdev->fmb); | |
194 | return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); | |
195 | } | |
196 | ||
197 | /* Modify PCI: Disable PCI function measurement */ | |
198 | int zpci_fmb_disable_device(struct zpci_dev *zdev) | |
199 | { | |
200 | struct mod_pci_args args = { 0, 0, 0, 0 }; | |
201 | int rc; | |
202 | ||
203 | if (!zdev->fmb) | |
204 | return -EINVAL; | |
205 | ||
206 | /* Function measurement is disabled if fmb address is zero */ | |
207 | rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); | |
208 | ||
209 | kmem_cache_free(zdev_fmb_cache, zdev->fmb); | |
210 | zdev->fmb = NULL; | |
211 | return rc; | |
212 | } | |
213 | ||
cd248341 JG |
214 | #define ZPCI_PCIAS_CFGSPC 15 |
215 | ||
216 | static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len) | |
217 | { | |
218 | u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); | |
219 | u64 data; | |
220 | int rc; | |
221 | ||
9389339f | 222 | rc = zpci_load(&data, req, offset); |
b170bad4 SO |
223 | if (!rc) { |
224 | data = data << ((8 - len) * 8); | |
225 | data = le64_to_cpu(data); | |
cd248341 | 226 | *val = (u32) data; |
b170bad4 | 227 | } else |
cd248341 JG |
228 | *val = 0xffffffff; |
229 | return rc; | |
230 | } | |
231 | ||
232 | static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len) | |
233 | { | |
234 | u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); | |
235 | u64 data = val; | |
236 | int rc; | |
237 | ||
238 | data = cpu_to_le64(data); | |
239 | data = data >> ((8 - len) * 8); | |
9389339f | 240 | rc = zpci_store(data, req, offset); |
cd248341 JG |
241 | return rc; |
242 | } | |
243 | ||
b881bc46 | 244 | void pcibios_fixup_bus(struct pci_bus *bus) |
cd248341 JG |
245 | { |
246 | } | |
247 | ||
248 | resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |
249 | resource_size_t size, | |
250 | resource_size_t align) | |
251 | { | |
252 | return 0; | |
253 | } | |
254 | ||
87bc359b JG |
255 | /* combine single writes by using store-block insn */ |
256 | void __iowrite64_copy(void __iomem *to, const void *from, size_t count) | |
257 | { | |
258 | zpci_memcpy_toio(to, from, count); | |
259 | } | |
260 | ||
cd248341 | 261 | /* Create a virtual mapping cookie for a PCI BAR */ |
8cfc99b5 MT |
262 | void __iomem *pci_iomap_range(struct pci_dev *pdev, |
263 | int bar, | |
264 | unsigned long offset, | |
265 | unsigned long max) | |
cd248341 JG |
266 | { |
267 | struct zpci_dev *zdev = get_zdev(pdev); | |
268 | u64 addr; | |
269 | int idx; | |
270 | ||
271 | if ((bar & 7) != bar) | |
272 | return NULL; | |
273 | ||
274 | idx = zdev->bars[bar].map_idx; | |
275 | spin_lock(&zpci_iomap_lock); | |
8cfc99b5 MT |
276 | if (zpci_iomap_start[idx].count++) { |
277 | BUG_ON(zpci_iomap_start[idx].fh != zdev->fh || | |
278 | zpci_iomap_start[idx].bar != bar); | |
279 | } else { | |
280 | zpci_iomap_start[idx].fh = zdev->fh; | |
281 | zpci_iomap_start[idx].bar = bar; | |
282 | } | |
283 | /* Detect overrun */ | |
284 | BUG_ON(!zpci_iomap_start[idx].count); | |
cd248341 JG |
285 | spin_unlock(&zpci_iomap_lock); |
286 | ||
287 | addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); | |
8cfc99b5 | 288 | return (void __iomem *) addr + offset; |
cd248341 | 289 | } |
d9426083 | 290 | EXPORT_SYMBOL(pci_iomap_range); |
8cfc99b5 MT |
291 | |
292 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | |
293 | { | |
294 | return pci_iomap_range(dev, bar, 0, maxlen); | |
295 | } | |
296 | EXPORT_SYMBOL(pci_iomap); | |
cd248341 JG |
297 | |
298 | void pci_iounmap(struct pci_dev *pdev, void __iomem *addr) | |
299 | { | |
300 | unsigned int idx; | |
301 | ||
302 | idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48; | |
303 | spin_lock(&zpci_iomap_lock); | |
8cfc99b5 MT |
304 | /* Detect underrun */ |
305 | BUG_ON(!zpci_iomap_start[idx].count); | |
306 | if (!--zpci_iomap_start[idx].count) { | |
307 | zpci_iomap_start[idx].fh = 0; | |
308 | zpci_iomap_start[idx].bar = 0; | |
309 | } | |
cd248341 JG |
310 | spin_unlock(&zpci_iomap_lock); |
311 | } | |
d9426083 | 312 | EXPORT_SYMBOL(pci_iounmap); |
cd248341 JG |
313 | |
314 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, | |
315 | int size, u32 *val) | |
316 | { | |
317 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
2c3700bb | 318 | int ret; |
cd248341 JG |
319 | |
320 | if (!zdev || devfn != ZPCI_DEVFN) | |
2c3700bb SO |
321 | ret = -ENODEV; |
322 | else | |
323 | ret = zpci_cfg_load(zdev, where, val, size); | |
324 | ||
325 | return ret; | |
cd248341 JG |
326 | } |
327 | ||
328 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, | |
329 | int size, u32 val) | |
330 | { | |
331 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
2c3700bb | 332 | int ret; |
cd248341 JG |
333 | |
334 | if (!zdev || devfn != ZPCI_DEVFN) | |
2c3700bb SO |
335 | ret = -ENODEV; |
336 | else | |
337 | ret = zpci_cfg_store(zdev, where, val, size); | |
338 | ||
339 | return ret; | |
cd248341 JG |
340 | } |
341 | ||
342 | static struct pci_ops pci_root_ops = { | |
343 | .read = pci_read, | |
344 | .write = pci_write, | |
345 | }; | |
346 | ||
f4eae94f | 347 | static void zpci_irq_handler(struct airq_struct *airq) |
9a4da8a5 | 348 | { |
5d0d8f43 | 349 | unsigned long si, ai; |
1f44a225 | 350 | struct airq_iv *aibv; |
5d0d8f43 | 351 | int irqs_on = 0; |
9a4da8a5 | 352 | |
420f42ec | 353 | inc_irq_stat(IRQIO_PCI); |
5d0d8f43 MS |
354 | for (si = 0;;) { |
355 | /* Scan adapter summary indicator bit vector */ | |
356 | si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv)); | |
357 | if (si == -1UL) { | |
358 | if (irqs_on++) | |
359 | /* End of second scan with interrupts on. */ | |
360 | break; | |
361 | /* First scan complete, reenable interrupts. */ | |
362 | zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); | |
363 | si = 0; | |
364 | continue; | |
365 | } | |
9a4da8a5 | 366 | |
5d0d8f43 | 367 | /* Scan the adapter interrupt vector for this device. */ |
1f44a225 | 368 | aibv = zpci_aibv[si]; |
5d0d8f43 | 369 | for (ai = 0;;) { |
1f44a225 | 370 | ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv)); |
5d0d8f43 MS |
371 | if (ai == -1UL) |
372 | break; | |
420f42ec | 373 | inc_irq_stat(IRQIO_MSI); |
1f44a225 MS |
374 | airq_iv_lock(aibv, ai); |
375 | generic_handle_irq(airq_iv_get_data(aibv, ai)); | |
376 | airq_iv_unlock(aibv, ai); | |
9a4da8a5 JG |
377 | } |
378 | } | |
5d0d8f43 | 379 | } |
9a4da8a5 | 380 | |
5d0d8f43 | 381 | int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
9a4da8a5 JG |
382 | { |
383 | struct zpci_dev *zdev = get_zdev(pdev); | |
0a0a9421 | 384 | unsigned int hwirq, msi_vecs; |
5d0d8f43 | 385 | unsigned long aisb; |
9a4da8a5 | 386 | struct msi_desc *msi; |
1f44a225 | 387 | struct msi_msg msg; |
0a0a9421 | 388 | int rc, irq; |
9a4da8a5 | 389 | |
a384c892 AG |
390 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
391 | return 1; | |
b19148f6 | 392 | msi_vecs = min_t(unsigned int, nvec, zdev->max_msi); |
9a4da8a5 | 393 | |
5d0d8f43 MS |
394 | /* Allocate adapter summary indicator bit */ |
395 | rc = -EIO; | |
396 | aisb = airq_iv_alloc_bit(zpci_aisb_iv); | |
397 | if (aisb == -1UL) | |
398 | goto out; | |
9a4da8a5 | 399 | zdev->aisb = aisb; |
9a4da8a5 | 400 | |
5d0d8f43 MS |
401 | /* Create adapter interrupt vector */ |
402 | rc = -ENOMEM; | |
1f44a225 | 403 | zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK); |
5d0d8f43 MS |
404 | if (!zdev->aibv) |
405 | goto out_si; | |
9a4da8a5 | 406 | |
5d0d8f43 | 407 | /* Wire up shortcut pointer */ |
1f44a225 | 408 | zpci_aibv[aisb] = zdev->aibv; |
5d0d8f43 | 409 | |
1f44a225 MS |
410 | /* Request MSI interrupts */ |
411 | hwirq = 0; | |
9a4da8a5 | 412 | list_for_each_entry(msi, &pdev->msi_list, list) { |
1f44a225 MS |
413 | rc = -EIO; |
414 | irq = irq_alloc_desc(0); /* Alloc irq on node 0 */ | |
0a0a9421 | 415 | if (irq < 0) |
1f44a225 MS |
416 | goto out_msi; |
417 | rc = irq_set_msi_desc(irq, msi); | |
9a4da8a5 | 418 | if (rc) |
5d0d8f43 | 419 | goto out_msi; |
1f44a225 MS |
420 | irq_set_chip_and_handler(irq, &zpci_irq_chip, |
421 | handle_simple_irq); | |
422 | msg.data = hwirq; | |
423 | msg.address_lo = zdev->msi_addr & 0xffffffff; | |
424 | msg.address_hi = zdev->msi_addr >> 32; | |
83a18912 | 425 | pci_write_msi_msg(irq, &msg); |
1f44a225 MS |
426 | airq_iv_set_data(zdev->aibv, hwirq, irq); |
427 | hwirq++; | |
9a4da8a5 JG |
428 | } |
429 | ||
5d0d8f43 MS |
430 | /* Enable adapter interrupts */ |
431 | rc = zpci_set_airq(zdev); | |
432 | if (rc) | |
433 | goto out_msi; | |
434 | ||
435 | return (msi_vecs == nvec) ? 0 : msi_vecs; | |
436 | ||
437 | out_msi: | |
5d0d8f43 | 438 | list_for_each_entry(msi, &pdev->msi_list, list) { |
1f44a225 | 439 | if (hwirq-- == 0) |
5d0d8f43 | 440 | break; |
1f44a225 MS |
441 | irq_set_msi_desc(msi->irq, NULL); |
442 | irq_free_desc(msi->irq); | |
443 | msi->msg.address_lo = 0; | |
444 | msi->msg.address_hi = 0; | |
445 | msi->msg.data = 0; | |
446 | msi->irq = 0; | |
9a4da8a5 | 447 | } |
1f44a225 | 448 | zpci_aibv[aisb] = NULL; |
5d0d8f43 MS |
449 | airq_iv_release(zdev->aibv); |
450 | out_si: | |
451 | airq_iv_free_bit(zpci_aisb_iv, aisb); | |
452 | out: | |
5d0d8f43 | 453 | return rc; |
9a4da8a5 JG |
454 | } |
455 | ||
5d0d8f43 | 456 | void arch_teardown_msi_irqs(struct pci_dev *pdev) |
9a4da8a5 JG |
457 | { |
458 | struct zpci_dev *zdev = get_zdev(pdev); | |
459 | struct msi_desc *msi; | |
5d0d8f43 MS |
460 | int rc; |
461 | ||
5d0d8f43 MS |
462 | /* Disable adapter interrupts */ |
463 | rc = zpci_clear_airq(zdev); | |
1f1dcbd4 | 464 | if (rc) |
9a4da8a5 | 465 | return; |
9a4da8a5 | 466 | |
1f44a225 MS |
467 | /* Release MSI interrupts */ |
468 | list_for_each_entry(msi, &pdev->msi_list, list) { | |
8fb878c5 | 469 | if (msi->msi_attrib.is_msix) |
23ed8d57 | 470 | __pci_msix_desc_mask_irq(msi, 1); |
8fb878c5 | 471 | else |
23ed8d57 | 472 | __pci_msi_desc_mask_irq(msi, 1, 1); |
1f44a225 MS |
473 | irq_set_msi_desc(msi->irq, NULL); |
474 | irq_free_desc(msi->irq); | |
475 | msi->msg.address_lo = 0; | |
476 | msi->msg.address_hi = 0; | |
477 | msi->msg.data = 0; | |
478 | msi->irq = 0; | |
479 | } | |
9a4da8a5 | 480 | |
1f44a225 | 481 | zpci_aibv[zdev->aisb] = NULL; |
5d0d8f43 MS |
482 | airq_iv_release(zdev->aibv); |
483 | airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); | |
9a4da8a5 JG |
484 | } |
485 | ||
1803ba2d | 486 | static void zpci_map_resources(struct pci_dev *pdev) |
cd248341 | 487 | { |
cd248341 JG |
488 | resource_size_t len; |
489 | int i; | |
490 | ||
491 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
492 | len = pci_resource_len(pdev, i); | |
493 | if (!len) | |
494 | continue; | |
5b9f2081 MS |
495 | pdev->resource[i].start = |
496 | (resource_size_t __force) pci_iomap(pdev, i, 0); | |
cd248341 | 497 | pdev->resource[i].end = pdev->resource[i].start + len - 1; |
cd248341 | 498 | } |
944239c5 SO |
499 | } |
500 | ||
1803ba2d | 501 | static void zpci_unmap_resources(struct pci_dev *pdev) |
944239c5 | 502 | { |
944239c5 SO |
503 | resource_size_t len; |
504 | int i; | |
505 | ||
506 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
507 | len = pci_resource_len(pdev, i); | |
508 | if (!len) | |
509 | continue; | |
5b9f2081 MS |
510 | pci_iounmap(pdev, (void __iomem __force *) |
511 | pdev->resource[i].start); | |
944239c5 SO |
512 | } |
513 | } | |
cd248341 | 514 | |
9a4da8a5 JG |
515 | static int __init zpci_irq_init(void) |
516 | { | |
5d0d8f43 | 517 | int rc; |
9a4da8a5 | 518 | |
f4eae94f MS |
519 | rc = register_adapter_interrupt(&zpci_airq); |
520 | if (rc) | |
5d0d8f43 | 521 | goto out; |
f4eae94f MS |
522 | /* Set summary to 1 to be called every time for the ISC. */ |
523 | *zpci_airq.lsi_ptr = 1; | |
9a4da8a5 | 524 | |
5d0d8f43 MS |
525 | rc = -ENOMEM; |
526 | zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC); | |
527 | if (!zpci_aisb_iv) | |
528 | goto out_airq; | |
9a4da8a5 | 529 | |
9389339f | 530 | zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); |
9a4da8a5 JG |
531 | return 0; |
532 | ||
5d0d8f43 MS |
533 | out_airq: |
534 | unregister_adapter_interrupt(&zpci_airq); | |
535 | out: | |
9a4da8a5 JG |
536 | return rc; |
537 | } | |
538 | ||
539 | static void zpci_irq_exit(void) | |
540 | { | |
5d0d8f43 | 541 | airq_iv_release(zpci_aisb_iv); |
f4eae94f | 542 | unregister_adapter_interrupt(&zpci_airq); |
9a4da8a5 JG |
543 | } |
544 | ||
cd248341 JG |
545 | static int zpci_alloc_iomap(struct zpci_dev *zdev) |
546 | { | |
547 | int entry; | |
548 | ||
549 | spin_lock(&zpci_iomap_lock); | |
550 | entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); | |
551 | if (entry == ZPCI_IOMAP_MAX_ENTRIES) { | |
552 | spin_unlock(&zpci_iomap_lock); | |
553 | return -ENOSPC; | |
554 | } | |
555 | set_bit(entry, zpci_iomap); | |
556 | spin_unlock(&zpci_iomap_lock); | |
557 | return entry; | |
558 | } | |
559 | ||
560 | static void zpci_free_iomap(struct zpci_dev *zdev, int entry) | |
561 | { | |
562 | spin_lock(&zpci_iomap_lock); | |
563 | memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry)); | |
564 | clear_bit(entry, zpci_iomap); | |
565 | spin_unlock(&zpci_iomap_lock); | |
566 | } | |
567 | ||
7a572a3a SO |
568 | static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start, |
569 | unsigned long size, unsigned long flags) | |
570 | { | |
571 | struct resource *r; | |
572 | ||
573 | r = kzalloc(sizeof(*r), GFP_KERNEL); | |
574 | if (!r) | |
575 | return NULL; | |
576 | ||
577 | r->start = start; | |
578 | r->end = r->start + size - 1; | |
579 | r->flags = flags; | |
580 | r->name = zdev->res_name; | |
581 | ||
582 | if (request_resource(&iomem_resource, r)) { | |
583 | kfree(r); | |
584 | return NULL; | |
585 | } | |
586 | return r; | |
587 | } | |
588 | ||
589 | static int zpci_setup_bus_resources(struct zpci_dev *zdev, | |
590 | struct list_head *resources) | |
591 | { | |
592 | unsigned long addr, size, flags; | |
593 | struct resource *res; | |
594 | int i, entry; | |
595 | ||
596 | snprintf(zdev->res_name, sizeof(zdev->res_name), | |
597 | "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR); | |
598 | ||
599 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
600 | if (!zdev->bars[i].size) | |
601 | continue; | |
602 | entry = zpci_alloc_iomap(zdev); | |
603 | if (entry < 0) | |
604 | return entry; | |
605 | zdev->bars[i].map_idx = entry; | |
606 | ||
607 | /* only MMIO is supported */ | |
608 | flags = IORESOURCE_MEM; | |
609 | if (zdev->bars[i].val & 8) | |
610 | flags |= IORESOURCE_PREFETCH; | |
611 | if (zdev->bars[i].val & 4) | |
612 | flags |= IORESOURCE_MEM_64; | |
613 | ||
614 | addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48); | |
615 | ||
616 | size = 1UL << zdev->bars[i].size; | |
617 | ||
618 | res = __alloc_res(zdev, addr, size, flags); | |
619 | if (!res) { | |
620 | zpci_free_iomap(zdev, entry); | |
621 | return -ENOMEM; | |
622 | } | |
623 | zdev->bars[i].res = res; | |
624 | pci_add_resource(resources, res); | |
625 | } | |
626 | ||
627 | return 0; | |
628 | } | |
629 | ||
630 | static void zpci_cleanup_bus_resources(struct zpci_dev *zdev) | |
631 | { | |
632 | int i; | |
633 | ||
634 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
635 | if (!zdev->bars[i].size) | |
636 | continue; | |
637 | ||
638 | zpci_free_iomap(zdev, zdev->bars[i].map_idx); | |
639 | release_resource(zdev->bars[i].res); | |
640 | kfree(zdev->bars[i].res); | |
641 | } | |
642 | } | |
643 | ||
af0a8a84 SO |
644 | int pcibios_add_device(struct pci_dev *pdev) |
645 | { | |
646 | struct zpci_dev *zdev = get_zdev(pdev); | |
cb809182 SO |
647 | struct resource *res; |
648 | int i; | |
649 | ||
650 | zdev->pdev = pdev; | |
ef4858c6 | 651 | pdev->dev.groups = zpci_attr_groups; |
1803ba2d | 652 | zpci_map_resources(pdev); |
cb809182 SO |
653 | |
654 | for (i = 0; i < PCI_BAR_COUNT; i++) { | |
655 | res = &pdev->resource[i]; | |
656 | if (res->parent || !res->flags) | |
657 | continue; | |
658 | pci_claim_resource(pdev, i); | |
659 | } | |
660 | ||
661 | return 0; | |
662 | } | |
663 | ||
1803ba2d SO |
664 | void pcibios_release_device(struct pci_dev *pdev) |
665 | { | |
666 | zpci_unmap_resources(pdev); | |
667 | } | |
668 | ||
cb809182 SO |
669 | int pcibios_enable_device(struct pci_dev *pdev, int mask) |
670 | { | |
671 | struct zpci_dev *zdev = get_zdev(pdev); | |
af0a8a84 | 672 | |
1c21351b | 673 | zdev->pdev = pdev; |
af0a8a84 SO |
674 | zpci_debug_init_device(zdev); |
675 | zpci_fmb_enable_device(zdev); | |
af0a8a84 | 676 | |
d7533232 | 677 | return pci_enable_resources(pdev, mask); |
af0a8a84 SO |
678 | } |
679 | ||
cb809182 | 680 | void pcibios_disable_device(struct pci_dev *pdev) |
944239c5 SO |
681 | { |
682 | struct zpci_dev *zdev = get_zdev(pdev); | |
683 | ||
944239c5 SO |
684 | zpci_fmb_disable_device(zdev); |
685 | zpci_debug_exit_device(zdev); | |
686 | zdev->pdev = NULL; | |
687 | } | |
688 | ||
69db3b5e SO |
689 | #ifdef CONFIG_HIBERNATE_CALLBACKS |
690 | static int zpci_restore(struct device *dev) | |
691 | { | |
1803ba2d SO |
692 | struct pci_dev *pdev = to_pci_dev(dev); |
693 | struct zpci_dev *zdev = get_zdev(pdev); | |
69db3b5e SO |
694 | int ret = 0; |
695 | ||
696 | if (zdev->state != ZPCI_FN_STATE_ONLINE) | |
697 | goto out; | |
698 | ||
699 | ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); | |
700 | if (ret) | |
701 | goto out; | |
702 | ||
1803ba2d | 703 | zpci_map_resources(pdev); |
69db3b5e SO |
704 | zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET, |
705 | zdev->start_dma + zdev->iommu_size - 1, | |
706 | (u64) zdev->dma_table); | |
707 | ||
708 | out: | |
709 | return ret; | |
710 | } | |
711 | ||
712 | static int zpci_freeze(struct device *dev) | |
713 | { | |
1803ba2d SO |
714 | struct pci_dev *pdev = to_pci_dev(dev); |
715 | struct zpci_dev *zdev = get_zdev(pdev); | |
69db3b5e SO |
716 | |
717 | if (zdev->state != ZPCI_FN_STATE_ONLINE) | |
718 | return 0; | |
719 | ||
720 | zpci_unregister_ioat(zdev, 0); | |
1803ba2d | 721 | zpci_unmap_resources(pdev); |
69db3b5e SO |
722 | return clp_disable_fh(zdev); |
723 | } | |
724 | ||
725 | struct dev_pm_ops pcibios_pm_ops = { | |
726 | .thaw_noirq = zpci_restore, | |
727 | .freeze_noirq = zpci_freeze, | |
728 | .restore_noirq = zpci_restore, | |
729 | .poweroff_noirq = zpci_freeze, | |
730 | }; | |
731 | #endif /* CONFIG_HIBERNATE_CALLBACKS */ | |
732 | ||
cd248341 JG |
733 | static int zpci_alloc_domain(struct zpci_dev *zdev) |
734 | { | |
735 | spin_lock(&zpci_domain_lock); | |
736 | zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES); | |
737 | if (zdev->domain == ZPCI_NR_DEVICES) { | |
738 | spin_unlock(&zpci_domain_lock); | |
739 | return -ENOSPC; | |
740 | } | |
741 | set_bit(zdev->domain, zpci_domain); | |
742 | spin_unlock(&zpci_domain_lock); | |
743 | return 0; | |
744 | } | |
745 | ||
746 | static void zpci_free_domain(struct zpci_dev *zdev) | |
747 | { | |
748 | spin_lock(&zpci_domain_lock); | |
749 | clear_bit(zdev->domain, zpci_domain); | |
750 | spin_unlock(&zpci_domain_lock); | |
751 | } | |
752 | ||
7d594322 SO |
753 | void pcibios_remove_bus(struct pci_bus *bus) |
754 | { | |
755 | struct zpci_dev *zdev = get_zdev_by_bus(bus); | |
756 | ||
757 | zpci_exit_slot(zdev); | |
758 | zpci_cleanup_bus_resources(zdev); | |
759 | zpci_free_domain(zdev); | |
760 | ||
761 | spin_lock(&zpci_list_lock); | |
762 | list_del(&zdev->entry); | |
763 | spin_unlock(&zpci_list_lock); | |
764 | ||
765 | kfree(zdev); | |
766 | } | |
767 | ||
768 | static int zpci_scan_bus(struct zpci_dev *zdev) | |
769 | { | |
770 | LIST_HEAD(resources); | |
771 | int ret; | |
772 | ||
773 | ret = zpci_setup_bus_resources(zdev, &resources); | |
774 | if (ret) | |
775 | return ret; | |
776 | ||
777 | zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops, | |
778 | zdev, &resources); | |
779 | if (!zdev->bus) { | |
780 | zpci_cleanup_bus_resources(zdev); | |
781 | return -EIO; | |
782 | } | |
7d594322 | 783 | zdev->bus->max_bus_speed = zdev->max_bus_speed; |
b97ea289 | 784 | pci_bus_add_devices(zdev->bus); |
7d594322 SO |
785 | return 0; |
786 | } | |
787 | ||
a755a45d JG |
788 | int zpci_enable_device(struct zpci_dev *zdev) |
789 | { | |
790 | int rc; | |
791 | ||
792 | rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); | |
793 | if (rc) | |
794 | goto out; | |
828b35f6 JG |
795 | |
796 | rc = zpci_dma_init_device(zdev); | |
797 | if (rc) | |
798 | goto out_dma; | |
0ff70ec8 SO |
799 | |
800 | zdev->state = ZPCI_FN_STATE_ONLINE; | |
a755a45d | 801 | return 0; |
828b35f6 JG |
802 | |
803 | out_dma: | |
804 | clp_disable_fh(zdev); | |
a755a45d JG |
805 | out: |
806 | return rc; | |
807 | } | |
808 | EXPORT_SYMBOL_GPL(zpci_enable_device); | |
809 | ||
cb65a669 SO |
810 | int zpci_disable_device(struct zpci_dev *zdev) |
811 | { | |
812 | zpci_dma_exit_device(zdev); | |
813 | return clp_disable_fh(zdev); | |
814 | } | |
815 | EXPORT_SYMBOL_GPL(zpci_disable_device); | |
816 | ||
cd248341 JG |
817 | int zpci_create_device(struct zpci_dev *zdev) |
818 | { | |
819 | int rc; | |
820 | ||
821 | rc = zpci_alloc_domain(zdev); | |
822 | if (rc) | |
823 | goto out; | |
824 | ||
1c21351b SO |
825 | if (zdev->state == ZPCI_FN_STATE_CONFIGURED) { |
826 | rc = zpci_enable_device(zdev); | |
827 | if (rc) | |
828 | goto out_free; | |
1c21351b SO |
829 | } |
830 | rc = zpci_scan_bus(zdev); | |
cd248341 | 831 | if (rc) |
1c21351b | 832 | goto out_disable; |
cd248341 | 833 | |
57b5918c | 834 | spin_lock(&zpci_list_lock); |
cd248341 | 835 | list_add_tail(&zdev->entry, &zpci_list); |
57b5918c | 836 | spin_unlock(&zpci_list_lock); |
cd248341 | 837 | |
67f43f38 SO |
838 | zpci_init_slot(zdev); |
839 | ||
cd248341 JG |
840 | return 0; |
841 | ||
1c21351b SO |
842 | out_disable: |
843 | if (zdev->state == ZPCI_FN_STATE_ONLINE) | |
844 | zpci_disable_device(zdev); | |
845 | out_free: | |
cd248341 JG |
846 | zpci_free_domain(zdev); |
847 | out: | |
848 | return rc; | |
849 | } | |
850 | ||
851 | void zpci_stop_device(struct zpci_dev *zdev) | |
852 | { | |
828b35f6 | 853 | zpci_dma_exit_device(zdev); |
cd248341 JG |
854 | /* |
855 | * Note: SCLP disables fh via set-pci-fn so don't | |
856 | * do that here. | |
857 | */ | |
858 | } | |
859 | EXPORT_SYMBOL_GPL(zpci_stop_device); | |
860 | ||
cd248341 JG |
861 | static inline int barsize(u8 size) |
862 | { | |
863 | return (size) ? (1 << size) >> 10 : 0; | |
864 | } | |
865 | ||
866 | static int zpci_mem_init(void) | |
867 | { | |
d0b08853 JG |
868 | zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb), |
869 | 16, 0, NULL); | |
870 | if (!zdev_fmb_cache) | |
1f44a225 | 871 | goto error_zdev; |
d0b08853 | 872 | |
cd248341 JG |
873 | /* TODO: use realloc */ |
874 | zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start), | |
875 | GFP_KERNEL); | |
876 | if (!zpci_iomap_start) | |
9a4da8a5 | 877 | goto error_iomap; |
cd248341 JG |
878 | return 0; |
879 | ||
9a4da8a5 | 880 | error_iomap: |
d0b08853 | 881 | kmem_cache_destroy(zdev_fmb_cache); |
cd248341 JG |
882 | error_zdev: |
883 | return -ENOMEM; | |
884 | } | |
885 | ||
886 | static void zpci_mem_exit(void) | |
887 | { | |
888 | kfree(zpci_iomap_start); | |
d0b08853 | 889 | kmem_cache_destroy(zdev_fmb_cache); |
cd248341 JG |
890 | } |
891 | ||
257608fb | 892 | static unsigned int s390_pci_probe = 1; |
aa3b7c29 | 893 | static unsigned int s390_pci_initialized; |
cd248341 JG |
894 | |
895 | char * __init pcibios_setup(char *str) | |
896 | { | |
257608fb SO |
897 | if (!strcmp(str, "off")) { |
898 | s390_pci_probe = 0; | |
cd248341 JG |
899 | return NULL; |
900 | } | |
901 | return str; | |
902 | } | |
903 | ||
aa3b7c29 SO |
904 | bool zpci_is_enabled(void) |
905 | { | |
906 | return s390_pci_initialized; | |
907 | } | |
908 | ||
cd248341 JG |
909 | static int __init pci_base_init(void) |
910 | { | |
911 | int rc; | |
912 | ||
1e5635d1 | 913 | if (!s390_pci_probe) |
cd248341 JG |
914 | return 0; |
915 | ||
86cd741b | 916 | if (!test_facility(69) || !test_facility(71) || !test_facility(72)) |
cd248341 JG |
917 | return 0; |
918 | ||
d0b08853 JG |
919 | rc = zpci_debug_init(); |
920 | if (rc) | |
1f44a225 | 921 | goto out; |
d0b08853 | 922 | |
cd248341 JG |
923 | rc = zpci_mem_init(); |
924 | if (rc) | |
925 | goto out_mem; | |
926 | ||
9a4da8a5 JG |
927 | rc = zpci_irq_init(); |
928 | if (rc) | |
929 | goto out_irq; | |
930 | ||
828b35f6 JG |
931 | rc = zpci_dma_init(); |
932 | if (rc) | |
933 | goto out_dma; | |
934 | ||
1d578966 | 935 | rc = clp_scan_pci_devices(); |
a755a45d JG |
936 | if (rc) |
937 | goto out_find; | |
938 | ||
aa3b7c29 | 939 | s390_pci_initialized = 1; |
cd248341 JG |
940 | return 0; |
941 | ||
a755a45d | 942 | out_find: |
828b35f6 JG |
943 | zpci_dma_exit(); |
944 | out_dma: | |
9a4da8a5 JG |
945 | zpci_irq_exit(); |
946 | out_irq: | |
cd248341 JG |
947 | zpci_mem_exit(); |
948 | out_mem: | |
d0b08853 | 949 | zpci_debug_exit(); |
1f44a225 | 950 | out: |
cd248341 JG |
951 | return rc; |
952 | } | |
67f43f38 | 953 | subsys_initcall_sync(pci_base_init); |
57b5918c SO |
954 | |
955 | void zpci_rescan(void) | |
956 | { | |
aa3b7c29 SO |
957 | if (zpci_is_enabled()) |
958 | clp_rescan_pci_devices_simple(); | |
57b5918c | 959 | } |