sh: hp6xx: Enable pata_platform in defconfig.
[deliverable/linux.git] / arch / sh / Kconfig
CommitLineData
1da177e4
LT
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/SuperH Kernel Configuration"
7
8config SUPERH
9 bool
10 default y
7a440c95 11 select EMBEDDED
1da177e4
LT
12 help
13 The SuperH is a RISC processor targeted for use in embedded systems
14 and consumer electronics; it was also used in the Sega Dreamcast
15 gaming console. The SuperH port has a home page at
16 <http://www.linux-sh.org/>.
17
1da177e4
LT
18config RWSEM_GENERIC_SPINLOCK
19 bool
20 default y
21
22config RWSEM_XCHGADD_ALGORITHM
23 bool
24
fa691511
PM
25config GENERIC_BUG
26 def_bool y
27 depends on BUG
28
e2268c71
AM
29config GENERIC_FIND_NEXT_BIT
30 bool
31 default y
32
33config GENERIC_HWEIGHT
34 bool
35 default y
36
1da177e4
LT
37config GENERIC_HARDIRQS
38 bool
39 default y
40
41config GENERIC_IRQ_PROBE
42 bool
43 default y
44
45config GENERIC_CALIBRATE_DELAY
46 bool
47 default y
48
cad82448
PM
49config GENERIC_IOMAP
50 bool
51
45882145
PM
52config GENERIC_TIME
53 def_bool n
54
57be2b48
PM
55config GENERIC_CLOCKEVENTS
56 def_bool n
57
357d5946
PM
58config SYS_SUPPORTS_PM
59 bool
60
0a9b0db1
PM
61config SYS_SUPPORTS_APM_EMULATION
62 bool
357d5946
PM
63 select SYS_SUPPORTS_PM
64
65config SYS_SUPPORTS_SMP
66 bool
67
68config SYS_SUPPORTS_NUMA
69 bool
70
71config SYS_SUPPORTS_PCI
72 bool
0a9b0db1 73
a08b6b79
Z
74config ARCH_MAY_HAVE_PC_FDC
75 bool
a08b6b79 76
afbfb52e
PM
77config STACKTRACE_SUPPORT
78 bool
79 default y
80
81config LOCKDEP_SUPPORT
82 bool
83 default y
84
f0d1b0b3
DH
85config ARCH_HAS_ILOG2_U32
86 bool
87 default n
88
89config ARCH_HAS_ILOG2_U64
90 bool
91 default n
92
e257ad06
PM
93config ARCH_NO_VIRT_TO_BUS
94 def_bool y
95
1da177e4
LT
96source "init/Kconfig"
97
98menu "System type"
99
f3d22298
PM
100source "arch/sh/mm/Kconfig"
101
102menu "Processor features"
bc8fb5d0 103
1da177e4 104choice
f3d22298
PM
105 prompt "Endianess selection"
106 default CPU_LITTLE_ENDIAN
107 help
108 Some SuperH machines can be configured for either little or big
109 endian byte order. These modes require different kernels.
110
111config CPU_LITTLE_ENDIAN
112 bool "Little Endian"
113
114config CPU_BIG_ENDIAN
115 bool "Big Endian"
116
117endchoice
118
119config SH_FPU
120 bool "FPU support"
1db4e9bb 121 depends on CPU_HAS_FPU
f3d22298
PM
122 default y
123 help
124 Selecting this option will enable support for SH processors that
125 have FPU units (ie, SH77xx).
126
127 This option must be set in order to enable the FPU.
128
129config SH_FPU_EMU
130 bool "FPU emulation support"
131 depends on !SH_FPU && EXPERIMENTAL
132 default n
133 help
134 Selecting this option will enable support for software FPU emulation.
135 Most SH-3 users will want to say Y here, whereas most SH-4 users will
136 want to say N.
137
138config SH_DSP
139 bool "DSP support"
ac79fd58
PM
140 depends on CPU_HAS_DSP
141 default y
f3d22298
PM
142 help
143 Selecting this option will enable support for SH processors that
144 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
145
146 This option must be set in order to enable the DSP.
147
148config SH_ADC
149 bool "ADC support"
150 depends on CPU_SH3
151 default y
152 help
153 Selecting this option will allow the Linux kernel to use SH3 on-chip
154 ADC module.
155
156 If unsure, say N.
157
158config SH_STORE_QUEUES
159 bool "Support for Store Queues"
160 depends on CPU_SH4
161 help
162 Selecting this option will enable an in-kernel API for manipulating
163 the store queues integrated in the SH-4 processors.
164
165config SPECULATIVE_EXECUTION
166 bool "Speculative subroutine return"
167 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
168 help
169 This enables support for a speculative instruction fetch for
170 subroutine return. There are various pitfalls associated with
171 this, as outlined in the SH7780 hardware manual.
172
173 If unsure, say N.
174
175config CPU_HAS_INTEVT
176 bool
177
f3d22298
PM
178config CPU_HAS_MASKREG_IRQ
179 bool
180
f3d22298
PM
181config CPU_HAS_IPR_IRQ
182 bool
183
184config CPU_HAS_SR_RB
185 bool "CPU has SR.RB"
186 depends on CPU_SH3 || CPU_SH4
187 default y
188 help
189 This will enable the use of SR.RB register bank usage. Processors
190 that are lacking this bit must have another method in place for
191 accomplishing what is taken care of by the banked registers.
192
193 See <file:Documentation/sh/register-banks.txt> for further
194 information on SR.RB and register banking in the kernel in general.
195
196config CPU_HAS_PTEA
197 bool
198
ac79fd58
PM
199config CPU_HAS_DSP
200 bool
201
1db4e9bb
PM
202config CPU_HAS_FPU
203 bool
204
f3d22298
PM
205endmenu
206
207menu "Board support"
208
209config SOLUTION_ENGINE
210 bool
1da177e4
LT
211
212config SH_SOLUTION_ENGINE
213 bool "SolutionEngine"
bc8fb5d0 214 select SOLUTION_ENGINE
56386f64 215 select CPU_HAS_IPR_IRQ
f3d22298 216 depends on CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750
1da177e4
LT
217 help
218 Select SolutionEngine if configuring for a Hitachi SH7709
219 or SH7750 evaluation board.
220
f3d22298
PM
221config SH_7206_SOLUTION_ENGINE
222 bool "SolutionEngine7206"
223 select SOLUTION_ENGINE
224 depends on CPU_SUBTYPE_SH7206
225 help
226 Select 7206 SolutionEngine if configuring for a Hitachi SH7206
227 evaluation board.
228
229config SH_7619_SOLUTION_ENGINE
230 bool "SolutionEngine7619"
231 select SOLUTION_ENGINE
232 depends on CPU_SUBTYPE_SH7619
233 help
234 Select 7619 SolutionEngine if configuring for a Hitachi SH7619
235 evaluation board.
236
6865f0ea
RS
237config SH_7722_SOLUTION_ENGINE
238 bool "SolutionEngine7722"
239 select SOLUTION_ENGINE
f3d22298 240 depends on CPU_SUBTYPE_SH7722
6865f0ea
RS
241 help
242 Select 7722 SolutionEngine if configuring for a Hitachi SH772
243 evaluation board.
244
1da177e4
LT
245config SH_7751_SOLUTION_ENGINE
246 bool "SolutionEngine7751"
bc8fb5d0 247 select SOLUTION_ENGINE
56386f64 248 select CPU_HAS_IPR_IRQ
f3d22298 249 depends on CPU_SUBTYPE_SH7751
1da177e4
LT
250 help
251 Select 7751 SolutionEngine if configuring for a Hitachi SH7751
252 evaluation board.
b7576230
NI
253
254config SH_7780_SOLUTION_ENGINE
255 bool "SolutionEngine7780"
256 select SOLUTION_ENGINE
357d5946 257 select SYS_SUPPORTS_PCI
f3d22298 258 depends on CPU_SUBTYPE_SH7780
b7576230
NI
259 help
260 Select 7780 SolutionEngine if configuring for a Renesas SH7780
261 evaluation board.
1da177e4 262
bc8fb5d0
PM
263config SH_7343_SOLUTION_ENGINE
264 bool "SolutionEngine7343"
265 select SOLUTION_ENGINE
f3d22298 266 depends on CPU_SUBTYPE_SH7343
bc8fb5d0
PM
267 help
268 Select 7343 SolutionEngine if configuring for a Hitachi
269 SH7343 (SH-Mobile 3AS) evaluation board.
1da177e4 270
1da177e4
LT
271config SH_7751_SYSTEMH
272 bool "SystemH7751R"
f3d22298 273 depends on CPU_SUBTYPE_SH7751R
1da177e4
LT
274 help
275 Select SystemH if you are configuring for a Renesas SystemH
276 7751R evaluation board.
277
cad82448
PM
278config SH_HP6XX
279 bool "HP6XX"
0a9b0db1 280 select SYS_SUPPORTS_APM_EMULATION
357d5946 281 select HD6446X_SERIES
f3d22298 282 depends on CPU_SUBTYPE_SH7709
1da177e4 283 help
cad82448 284 Select HP6XX if configuring for a HP jornada HP6xx.
1da177e4
LT
285 More information (hardware only) at
286 <http://www.hp.com/jornada/>.
287
1da177e4
LT
288config SH_DREAMCAST
289 bool "Dreamcast"
357d5946 290 select SYS_SUPPORTS_PCI
f3d22298 291 depends on CPU_SUBTYPE_SH7091
1da177e4
LT
292 help
293 Select Dreamcast if configuring for a SEGA Dreamcast.
294 More information at
295 <http://www.m17n.org/linux-sh/dreamcast/>. There is a
296 Dreamcast project is at <http://linuxdc.sourceforge.net/>.
297
1da177e4 298config SH_MPC1211
cad82448 299 bool "Interface MPC1211"
f3d22298 300 depends on CPU_SUBTYPE_SH7751 && BROKEN
cad82448
PM
301 help
302 CTP/PCI-SH02 is a CPU module computer that is produced
303 by Interface Corporation.
304 More information at <http://www.interface.co.jp>
1da177e4
LT
305
306config SH_SH03
cad82448 307 bool "Interface CTP/PCI-SH03"
d59645d6 308 depends on CPU_SUBTYPE_SH7751
56386f64 309 select CPU_HAS_IPR_IRQ
357d5946 310 select SYS_SUPPORTS_PCI
1da177e4 311 help
cad82448 312 CTP/PCI-SH03 is a CPU module computer that is produced
1da177e4 313 by Interface Corporation.
1da177e4
LT
314 More information at <http://www.interface.co.jp>
315
316config SH_SECUREEDGE5410
317 bool "SecureEdge5410"
f3d22298 318 depends on CPU_SUBTYPE_SH7751R
56386f64 319 select CPU_HAS_IPR_IRQ
357d5946 320 select SYS_SUPPORTS_PCI
1da177e4
LT
321 help
322 Select SecureEdge5410 if configuring for a SnapGear SH board.
323 This includes both the OEM SecureEdge products as well as the
324 SME product line.
325
326config SH_HS7751RVOIP
327 bool "HS7751RVOIP"
f3d22298 328 depends on CPU_SUBTYPE_SH7751R
1da177e4
LT
329 help
330 Select HS7751RVOIP if configuring for a Renesas Technology
331 Sales VoIP board.
332
91b91d01
PM
333config SH_7710VOIPGW
334 bool "SH7710-VOIP-GW"
f3d22298 335 depends on CPU_SUBTYPE_SH7710
91b91d01
PM
336 help
337 Select this option to build a kernel for the SH7710 based
338 VOIP GW.
339
1da177e4
LT
340config SH_RTS7751R2D
341 bool "RTS7751R2D"
f3d22298 342 depends on CPU_SUBTYPE_SH7751R
357d5946 343 select SYS_SUPPORTS_PCI
1da177e4
LT
344 help
345 Select RTS7751R2D if configuring for a Renesas Technology
346 Sales SH-Graphics board.
347
32351a28
PM
348config SH_HIGHLANDER
349 bool "Highlander"
f3d22298 350 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
357d5946 351 select SYS_SUPPORTS_PCI
cad82448 352
1da177e4
LT
353config SH_EDOSK7705
354 bool "EDOSK7705"
f3d22298 355 depends on CPU_SUBTYPE_SH7705
1da177e4
LT
356
357config SH_SH4202_MICRODEV
358 bool "SH4-202 MicroDev"
f3d22298 359 depends on CPU_SUBTYPE_SH4_202
1da177e4
LT
360 help
361 Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
362 with an SH4-202 CPU.
363
cad82448
PM
364config SH_LANDISK
365 bool "LANDISK"
f3d22298 366 depends on CPU_SUBTYPE_SH7751R
357d5946 367 select SYS_SUPPORTS_PCI
cad82448
PM
368 help
369 I-O DATA DEVICE, INC. "LANDISK Series" support.
370
371config SH_TITAN
372 bool "TITAN"
f3d22298 373 depends on CPU_SUBTYPE_SH7751R
56386f64 374 select CPU_HAS_IPR_IRQ
357d5946 375 select SYS_SUPPORTS_PCI
cad82448
PM
376 help
377 Select Titan if you are configuring for a Nimble Microsystems
378 NetEngine NP51R.
379
51e22e7a
TY
380config SH_SHMIN
381 bool "SHMIN"
f3d22298 382 depends on CPU_SUBTYPE_SH7706
56386f64 383 select CPU_HAS_IPR_IRQ
51e22e7a 384 help
3cb2fccc 385 Select SHMIN if configuring for the SHMIN board.
51e22e7a 386
c86c5a91
NI
387config SH_LBOX_RE2
388 bool "L-BOX RE2"
f3d22298 389 depends on CPU_SUBTYPE_SH7751R
357d5946 390 select SYS_SUPPORTS_PCI
c86c5a91
NI
391 help
392 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
9d4436a6 393
94807a33
PM
394config SH_X3PROTO
395 bool "SH-X3 Prototype board"
396 depends on CPU_SUBTYPE_SHX3
397
f3d22298 398endmenu
1da177e4 399
32351a28
PM
400source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
401source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
402source "arch/sh/boards/renesas/r7780rp/Kconfig"
403
32351a28
PM
404menu "Timer and clock configuration"
405
cad82448
PM
406config SH_TMU
407 bool "TMU timer support"
9d4436a6 408 depends on CPU_SH3 || CPU_SH4
57be2b48
PM
409 select GENERIC_TIME
410 select GENERIC_CLOCKEVENTS
1da177e4 411 default y
1da177e4 412 help
cad82448 413 This enables the use of the TMU as the system timer.
1da177e4 414
9d4436a6
YS
415config SH_CMT
416 bool "CMT timer support"
417 depends on CPU_SH2
418 default y
419 help
420 This enables the use of the CMT as the system timer.
421
422config SH_MTU2
423 bool "MTU2 timer support"
424 depends on CPU_SH2A
425 default n
426 help
427 This enables the use of the MTU2 as the system timer.
428
417528a2
PM
429config SH_TIMER_IRQ
430 int
32351a28 431 default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
417528a2
PM
432 default "86" if CPU_SUBTYPE_SH7619
433 default "140" if CPU_SUBTYPE_SH7206
434 default "16"
435
cad82448
PM
436config SH_PCLK_FREQ
437 int "Peripheral clock frequency (in Hz)"
870e8a24 438 default "27000000" if CPU_SUBTYPE_SH7343
9d4436a6 439 default "31250000" if CPU_SUBTYPE_SH7619
05627486 440 default "32000000" if CPU_SUBTYPE_SH7722
d89ddd1c 441 default "33333333" if CPU_SUBTYPE_SH7770 || \
9d4436a6
YS
442 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
443 CPU_SUBTYPE_SH7206
05627486 444 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
cad82448 445 default "66000000" if CPU_SUBTYPE_SH4_202
05627486 446 default "50000000"
1da177e4 447 help
cad82448
PM
448 This option is used to specify the peripheral clock frequency.
449 This is necessary for determining the reference clock value on
450 platforms lacking an RTC.
1da177e4 451
9d4436a6
YS
452config SH_CLK_MD
453 int "CPU Mode Pin Setting"
454 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
357d5946
PM
455 default 6 if CPU_SUBTYPE_SH7206
456 default 5 if CPU_SUBTYPE_SH7619
457 default 0
9d4436a6 458 help
11cbb70e 459 MD2 - MD0 pin setting.
9d4436a6 460
57be2b48
PM
461source "kernel/time/Kconfig"
462
32351a28
PM
463endmenu
464
cad82448
PM
465menu "CPU Frequency scaling"
466
467source "drivers/cpufreq/Kconfig"
1da177e4 468
cad82448
PM
469config SH_CPU_FREQ
470 tristate "SuperH CPU Frequency driver"
cb5ec75b 471 depends on CPU_FREQ
cad82448 472 select CPU_FREQ_TABLE
1da177e4 473 help
cad82448
PM
474 This adds the cpufreq driver for SuperH. At present, only
475 the SH-4 is supported.
1da177e4 476
cad82448 477 For details, take a look at <file:Documentation/cpu-freq>.
1da177e4
LT
478
479 If unsure, say N.
480
cad82448
PM
481endmenu
482
9f5e8eee
PM
483source "arch/sh/drivers/Kconfig"
484
cad82448 485endmenu
1da177e4 486
cad82448
PM
487config ISA_DMA_API
488 bool
05efc67d 489 depends on SH_MPC1211
cad82448 490 default y
1da177e4 491
cad82448
PM
492menu "Kernel features"
493
91b91d01
PM
494source kernel/Kconfig.hz
495
cad82448
PM
496config KEXEC
497 bool "kexec system call (EXPERIMENTAL)"
498 depends on EXPERIMENTAL
1da177e4 499 help
cad82448
PM
500 kexec is a system call that implements the ability to shutdown your
501 current kernel, and to start another kernel. It is like a reboot
1f1332f7 502 but it is independent of the system firmware. And like a reboot
cad82448
PM
503 you can start any kernel with it, not just Linux.
504
1f1332f7 505 The name comes from the similarity to the exec system call.
cad82448
PM
506
507 It is an ongoing process to be certain the hardware in a machine
508 is properly shutdown, so do not be surprised if this code does not
509 initially work for you. It may help to enable device hotplugging
510 support. As of this writing the exact hardware interface is
511 strongly in flux, so no good recommendation can be made.
512
4d5ade5b
PM
513config CRASH_DUMP
514 bool "kernel crash dumps (EXPERIMENTAL)"
515 depends on EXPERIMENTAL
516 help
517 Generate crash dump after being started by kexec.
518 This should be normally only set in special crash dump kernels
519 which are loaded in the main kernel with kexec-tools into
520 a specially reserved region and then later executed after
521 a crash by kdump/kexec. The crash dump kernel must be compiled
522 to a memory address not used by the main kernel using
523 MEMORY_START.
524
525 For more details see Documentation/kdump/kdump.txt
526
1da177e4
LT
527config SMP
528 bool "Symmetric multi-processing support"
357d5946 529 depends on SYS_SUPPORTS_SMP
1da177e4
LT
530 ---help---
531 This enables support for systems with more than one CPU. If you have
532 a system with only one CPU, like most personal computers, say N. If
533 you have a system with more than one CPU, say Y.
534
535 If you say N here, the kernel will run on single and multiprocessor
536 machines, but will use only one CPU of a multiprocessor machine. If
537 you say Y here, the kernel will run on many, but not all,
538 singleprocessor machines. On a singleprocessor machine, the kernel
539 will run faster if you say N here.
540
541 People using multiprocessor machines who say Y here should also say
542 Y to "Enhanced Real Time Clock Support", below.
543
544 See also the <file:Documentation/smp.txt>,
545 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
546 at <http://www.tldp.org/docs.html#howto>.
547
548 If you don't know what to do here, say N.
549
550config NR_CPUS
551 int "Maximum number of CPUs (2-32)"
552 range 2 32
553 depends on SMP
2b1bd1ac 554 default "4" if CPU_SHX3
1da177e4
LT
555 default "2"
556 help
557 This allows you to specify the maximum number of CPUs which this
558 kernel will support. The maximum supported value is 32 and the
559 minimum value which makes sense is 2.
560
561 This is purely to save memory - each supported CPU adds
562 approximately eight kilobytes to the kernel image.
563
91b91d01
PM
564source "kernel/Kconfig.preempt"
565
c80d79d7
YG
566config NODES_SHIFT
567 int
568 default "1"
569 depends on NEED_MULTIPLE_NODES
570
cad82448 571endmenu
1da177e4 572
cad82448 573menu "Boot options"
1da177e4 574
cad82448
PM
575config ZERO_PAGE_OFFSET
576 hex "Zero page offset"
577 default "0x00004000" if SH_MPC1211 || SH_SH03
7a847f81
PM
578 default "0x00010000" if PAGE_SIZE_64KB
579 default "0x00002000" if PAGE_SIZE_8KB
cad82448 580 default "0x00001000"
1da177e4 581 help
cad82448 582 This sets the default offset of zero page.
1da177e4 583
cad82448
PM
584config BOOT_LINK_OFFSET
585 hex "Link address offset for booting"
586 default "0x00800000"
587 help
588 This option allows you to set the link address offset of the zImage.
589 This can be useful if you are on a board which has a small amount of
590 memory.
1da177e4 591
cad82448
PM
592config UBC_WAKEUP
593 bool "Wakeup UBC on startup"
357d5946 594 depends on CPU_SH4
cad82448
PM
595 help
596 Selecting this option will wakeup the User Break Controller (UBC) on
597 startup. Although the UBC is left in an awake state when the processor
598 comes up, some boot loaders misbehave by putting the UBC to sleep in a
599 power saving state, which causes issues with things like ptrace().
1da177e4 600
cad82448 601 If unsure, say N.
1da177e4 602
cad82448
PM
603config CMDLINE_BOOL
604 bool "Default bootloader kernel arguments"
1da177e4 605
cad82448
PM
606config CMDLINE
607 string "Initial kernel command string"
608 depends on CMDLINE_BOOL
609 default "console=ttySC1,115200"
1da177e4
LT
610
611endmenu
612
cad82448 613menu "Bus options"
1da177e4
LT
614
615# Even on SuperH devices which don't have an ISA bus,
616# this variable helps the PCMCIA modules handle
617# IRQ requesting properly -- Greg Banks.
618#
619# Though we're generally not interested in it when
620# we're not using PCMCIA, so we make it dependent on
621# PCMCIA outright. -- PFM.
622config ISA
357d5946
PM
623 def_bool y
624 depends on PCMCIA && HD6446X_SERIES
1da177e4
LT
625 help
626 Find out whether you have ISA slots on your motherboard. ISA is the
627 name of a bus system, i.e. the way the CPU talks to the other stuff
628 inside your box. Other bus systems are PCI, EISA, MicroChannel
629 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
630 newer boards don't support it. If you have ISA, say Y, otherwise N.
631
632config EISA
633 bool
634 ---help---
635 The Extended Industry Standard Architecture (EISA) bus was
636 developed as an open alternative to the IBM MicroChannel bus.
637
638 The EISA bus provided some of the features of the IBM MicroChannel
639 bus while maintaining backward compatibility with cards made for
640 the older ISA bus. The EISA bus saw limited use between 1988 and
641 1995 when it was made obsolete by the PCI bus.
642
643 Say Y here if you are building a kernel for an EISA-based machine.
644
645 Otherwise, say N.
646
647config MCA
648 bool
649 help
650 MicroChannel Architecture is found in some IBM PS/2 machines and
651 laptops. It is a bus system similar to PCI or ISA. See
652 <file:Documentation/mca.txt> (and especially the web page given
653 there) before attempting to build an MCA bus kernel.
654
655config SBUS
656 bool
657
cad82448
PM
658config SUPERHYWAY
659 tristate "SuperHyway Bus support"
660 depends on CPU_SUBTYPE_SH4_202
1da177e4 661
824e55f9
PM
662config CF_ENABLER
663 bool "Compact Flash Enabler support"
664 depends on SOLUTION_ENGINE || SH_SH03
665 ---help---
666 Compact Flash is a small, removable mass storage device introduced
667 in 1994 originally as a PCMCIA device. If you say `Y' here, you
668 compile in support for Compact Flash devices directly connected to
669 a SuperH processor. A Compact Flash FAQ is available at
670 <http://www.compactflash.org/faqs/faq.htm>.
671
672 If your board has "Directly Connected" CompactFlash at area 5 or 6,
673 you may want to enable this option. Then, you can use CF as
674 primary IDE drive (only tested for SanDisk).
675
676 If in doubt, select 'N'.
677
678choice
679 prompt "Compact Flash Connection Area"
680 depends on CF_ENABLER
681 default CF_AREA6
682
683config CF_AREA5
684 bool "Area5"
685 help
686 If your board has "Directly Connected" CompactFlash, You should
687 select the area where your CF is connected to.
688
689 - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
690 - "Area6" if it is connected to Area 6 (0x18000000)
691
692 "Area6" will work for most boards.
693
694config CF_AREA6
695 bool "Area6"
696
697endchoice
698
699config CF_BASE_ADDR
700 hex
701 depends on CF_ENABLER
702 default "0xb8000000" if CF_AREA6
703 default "0xb4000000" if CF_AREA5
704
1da177e4
LT
705source "arch/sh/drivers/pci/Kconfig"
706
707source "drivers/pci/Kconfig"
708
709source "drivers/pcmcia/Kconfig"
710
711source "drivers/pci/hotplug/Kconfig"
712
713endmenu
714
715menu "Executable file formats"
716
717source "fs/Kconfig.binfmt"
718
719endmenu
720
3aa770e7 721menu "Power management options (EXPERIMENTAL)"
357d5946 722depends on EXPERIMENTAL && SYS_SUPPORTS_PM
3aa770e7
AS
723
724source kernel/power/Kconfig
725
3aa770e7
AS
726endmenu
727
d5950b43
SR
728source "net/Kconfig"
729
1da177e4
LT
730source "drivers/Kconfig"
731
732source "fs/Kconfig"
733
734source "arch/sh/oprofile/Kconfig"
735
736source "arch/sh/Kconfig.debug"
737
738source "security/Kconfig"
739
740source "crypto/Kconfig"
741
742source "lib/Kconfig"
This page took 0.43843 seconds and 5 git commands to generate.