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sh: mac address through private data for sh_eth on ecovec24
[deliverable/linux.git] / arch / sh / boards / mach-ecovec24 / setup.c
CommitLineData
4138b740
KM		 1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
35a35408
KM		 17#include <linux/io.h>
18#include <linux/delay.h>
907050a3 19#include <linux/usb/r8a66597.h>
4907d57f 20#include <linux/i2c.h>
8810e055 21#include <linux/i2c/tsc2007.h>
e9103e74 22#include <linux/input.h>
fa3ba51b 23#include <video/sh_mobile_lcdc.h>
2153ad32 24#include <media/sh_mobile_ceu.h>
4138b740 25#include <asm/heartbeat.h>
35a35408 26#include <asm/sh_eth.h>
e9103e74 27#include <asm/sh_keysc.h>
a991801a 28#include <asm/clock.h>
4138b740
KM		 29#include <cpu/sh7724.h>
30
31/*
b7056bc1
KM		 32 * Address Interface BusWidth
33 *-----------------------------------------
34 * 0x0000_0000 uboot 16bit
35 * 0x0004_0000 Linux romImage 16bit
36 * 0x0014_0000 MTD for Linux 16bit
37 * 0x0400_0000 Internal I/O 16/32bit
38 * 0x0800_0000 DRAM 32bit
39 * 0x1800_0000 MFI 16bit
4138b740
KM		 40 */
41
9c472c4d
KM		 42/* SWITCH
43 *------------------------------
44 * DS2[1] = FlashROM write protect ON : write protect
45 * OFF : No write protect
46 * DS2[2] = RMII / TS, SCIF ON : RMII
47 * OFF : TS, SCIF3
48 * DS2[3] = Camera / Video ON : Camera
49 * OFF : NTSC/PAL (IN)
50 * DS2[5] = NTSC_OUT Clock ON : On board OSC
51 * OFF : SH7724 DV_CLK
52 * DS2[6-7] = MMC / SD ON-OFF : SD
53 * OFF-ON : MMC
54 */
55
4138b740
KM		 56/* Heartbeat */
57static unsigned char led_pos[] = { 0, 1, 2, 3 };
58static struct heartbeat_data heartbeat_data = {
59 .regsize = 8,
60 .nr_bits = 4,
61 .bit_pos = led_pos,
62};
63
64static struct resource heartbeat_resources[] = {
65 [0] = {
66 .start = 0xA405012C, /* PTG */
67 .end = 0xA405012E - 1,
68 .flags = IORESOURCE_MEM,
69 },
70};
71
72static struct platform_device heartbeat_device = {
73 .name = "heartbeat",
74 .id = -1,
75 .dev = {
76 .platform_data = &heartbeat_data,
77 },
78 .num_resources = ARRAY_SIZE(heartbeat_resources),
79 .resource = heartbeat_resources,
80};
81
82/* MTD */
83static struct mtd_partition nor_flash_partitions[] = {
84 {
b7056bc1 85 .name = "boot loader",
4138b740 86 .offset = 0,
b7056bc1 87 .size = (5 * 1024 * 1024),
d5ce010c 88 .mask_flags = MTD_WRITEABLE, /* force read-only */
4138b740
KM		 89 }, {
90 .name = "free-area",
91 .offset = MTDPART_OFS_APPEND,
92 .size = MTDPART_SIZ_FULL,
93 },
94};
95
96static struct physmap_flash_data nor_flash_data = {
97 .width = 2,
98 .parts = nor_flash_partitions,
99 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
100};
101
102static struct resource nor_flash_resources[] = {
103 [0] = {
104 .name = "NOR Flash",
105 .start = 0x00000000,
106 .end = 0x03ffffff,
107 .flags = IORESOURCE_MEM,
108 }
109};
110
111static struct platform_device nor_flash_device = {
112 .name = "physmap-flash",
113 .resource = nor_flash_resources,
114 .num_resources = ARRAY_SIZE(nor_flash_resources),
115 .dev = {
116 .platform_data = &nor_flash_data,
117 },
118};
119
35a35408
KM		 120/* SH Eth */
121#define SH_ETH_ADDR (0xA4600000)
122#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
123#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
124static struct resource sh_eth_resources[] = {
125 [0] = {
126 .start = SH_ETH_ADDR,
127 .end = SH_ETH_ADDR + 0x1FC,
128 .flags = IORESOURCE_MEM,
129 },
130 [1] = {
131 .start = 91,
132 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
133 },
134};
135
136struct sh_eth_plat_data sh_eth_plat = {
137 .phy = 0x1f, /* SMSC LAN8700 */
138 .edmac_endian = EDMAC_LITTLE_ENDIAN,
acf3cc28 139 .ether_link_active_low = 1
35a35408
KM		 140};
141
142static struct platform_device sh_eth_device = {
143 .name = "sh-eth",
144 .id = 0,
145 .dev = {
146 .platform_data = &sh_eth_plat,
147 },
148 .num_resources = ARRAY_SIZE(sh_eth_resources),
149 .resource = sh_eth_resources,
40e42318
MD		 150 .archdata = {
151 .hwblk_id = HWBLK_ETHER,
152 },
35a35408
KM		 153};
154
907050a3
KM		 155/* USB0 host */
156void usb0_port_power(int port, int power)
157{
158 gpio_set_value(GPIO_PTB4, power);
159}
160
161static struct r8a66597_platdata usb0_host_data = {
162 .on_chip = 1,
163 .port_power = usb0_port_power,
164};
165
166static struct resource usb0_host_resources[] = {
167 [0] = {
168 .start = 0xa4d80000,
169 .end = 0xa4d80124 - 1,
170 .flags = IORESOURCE_MEM,
171 },
172 [1] = {
173 .start = 65,
174 .end = 65,
175 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
176 },
177};
178
179static struct platform_device usb0_host_device = {
180 .name = "r8a66597_hcd",
181 .id = 0,
182 .dev = {
183 .dma_mask = NULL, /* not use dma */
184 .coherent_dma_mask = 0xffffffff,
185 .platform_data = &usb0_host_data,
186 },
187 .num_resources = ARRAY_SIZE(usb0_host_resources),
188 .resource = usb0_host_resources,
189};
190
191/*
192 * USB1
193 *
194 * CN5 can use both host/function,
195 * and we can determine it by checking PTB[3]
196 *
197 * This time only USB1 host is supported.
198 */
199void usb1_port_power(int port, int power)
200{
201 if (!gpio_get_value(GPIO_PTB3)) {
202 printk(KERN_ERR "USB1 function is not supported\n");
203 return;
204 }
205
206 gpio_set_value(GPIO_PTB5, power);
207}
208
209static struct r8a66597_platdata usb1_host_data = {
210 .on_chip = 1,
211 .port_power = usb1_port_power,
212};
213
214static struct resource usb1_host_resources[] = {
215 [0] = {
216 .start = 0xa4d90000,
217 .end = 0xa4d90124 - 1,
218 .flags = IORESOURCE_MEM,
219 },
220 [1] = {
221 .start = 66,
222 .end = 66,
223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
224 },
225};
226
227static struct platform_device usb1_host_device = {
228 .name = "r8a66597_hcd",
229 .id = 1,
230 .dev = {
231 .dma_mask = NULL, /* not use dma */
232 .coherent_dma_mask = 0xffffffff,
233 .platform_data = &usb1_host_data,
234 },
235 .num_resources = ARRAY_SIZE(usb1_host_resources),
236 .resource = usb1_host_resources,
237};
238
fa3ba51b
KM		 239/* LCDC */
240static struct sh_mobile_lcdc_info lcdc_info = {
241 .ch[0] = {
242 .interface_type = RGB18,
243 .chan = LCDC_CHAN_MAINLCD,
244 .bpp = 16,
fa3ba51b
KM		 245 .lcd_cfg = {
246 .sync = 0, /* hsync and vsync are active low */
247 },
248 .lcd_size_cfg = { /* 7.0 inch */
249 .width = 152,
250 .height = 91,
251 },
252 .board_cfg = {
253 },
254 }
255};
256
257static struct resource lcdc_resources[] = {
258 [0] = {
259 .name = "LCDC",
260 .start = 0xfe940000,
a6f15ade 261 .end = 0xfe942fff,
fa3ba51b
KM		 262 .flags = IORESOURCE_MEM,
263 },
264 [1] = {
265 .start = 106,
266 .flags = IORESOURCE_IRQ,
267 },
268};
269
270static struct platform_device lcdc_device = {
271 .name = "sh_mobile_lcdc_fb",
272 .num_resources = ARRAY_SIZE(lcdc_resources),
273 .resource = lcdc_resources,
274 .dev = {
275 .platform_data = &lcdc_info,
276 },
277 .archdata = {
278 .hwblk_id = HWBLK_LCDC,
279 },
280};
281
2153ad32
KM		 282/* CEU0 */
283static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
284 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
285};
286
287static struct resource ceu0_resources[] = {
288 [0] = {
289 .name = "CEU0",
290 .start = 0xfe910000,
291 .end = 0xfe91009f,
292 .flags = IORESOURCE_MEM,
293 },
294 [1] = {
295 .start = 52,
296 .flags = IORESOURCE_IRQ,
297 },
298 [2] = {
299 /* place holder for contiguous memory */
300 },
301};
302
303static struct platform_device ceu0_device = {
304 .name = "sh_mobile_ceu",
305 .id = 0, /* "ceu0" clock */
306 .num_resources = ARRAY_SIZE(ceu0_resources),
307 .resource = ceu0_resources,
308 .dev = {
309 .platform_data = &sh_mobile_ceu0_info,
310 },
311 .archdata = {
312 .hwblk_id = HWBLK_CEU0,
313 },
314};
315
316/* CEU1 */
317static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
318 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
319};
320
321static struct resource ceu1_resources[] = {
322 [0] = {
323 .name = "CEU1",
324 .start = 0xfe914000,
325 .end = 0xfe91409f,
326 .flags = IORESOURCE_MEM,
327 },
328 [1] = {
329 .start = 63,
330 .flags = IORESOURCE_IRQ,
331 },
332 [2] = {
333 /* place holder for contiguous memory */
334 },
335};
336
337static struct platform_device ceu1_device = {
338 .name = "sh_mobile_ceu",
339 .id = 1, /* "ceu1" clock */
340 .num_resources = ARRAY_SIZE(ceu1_resources),
341 .resource = ceu1_resources,
342 .dev = {
343 .platform_data = &sh_mobile_ceu1_info,
344 },
345 .archdata = {
346 .hwblk_id = HWBLK_CEU1,
347 },
348};
349
125ecce6
KM		 350/* I2C device */
351static struct i2c_board_info i2c1_devices[] = {
352 {
353 I2C_BOARD_INFO("r2025sd", 0x32),
354 },
355};
356
e9103e74
KM		 357/* KEYSC */
358static struct sh_keysc_info keysc_info = {
359 .mode = SH_KEYSC_MODE_1,
360 .scan_timing = 3,
361 .delay = 50,
362 .kycr2_delay = 100,
363 .keycodes = { KEY_1, 0, 0, 0, 0,
364 KEY_2, 0, 0, 0, 0,
365 KEY_3, 0, 0, 0, 0,
366 KEY_4, 0, 0, 0, 0,
367 KEY_5, 0, 0, 0, 0,
368 KEY_6, 0, 0, 0, 0, },
369};
370
371static struct resource keysc_resources[] = {
372 [0] = {
373 .name = "KEYSC",
374 .start = 0x044b0000,
375 .end = 0x044b000f,
376 .flags = IORESOURCE_MEM,
377 },
378 [1] = {
379 .start = 79,
380 .flags = IORESOURCE_IRQ,
381 },
382};
383
384static struct platform_device keysc_device = {
385 .name = "sh_keysc",
386 .id = 0, /* keysc0 clock */
387 .num_resources = ARRAY_SIZE(keysc_resources),
388 .resource = keysc_resources,
389 .dev = {
390 .platform_data = &keysc_info,
391 },
392 .archdata = {
393 .hwblk_id = HWBLK_KEYSC,
394 },
395};
396
8810e055
KM		 397/* TouchScreen */
398#define IRQ0 32
399static int ts_get_pendown_state(void)
400{
401 int val = 0;
402 gpio_free(GPIO_FN_INTC_IRQ0);
403 gpio_request(GPIO_PTZ0, NULL);
404 gpio_direction_input(GPIO_PTZ0);
405
406 val = gpio_get_value(GPIO_PTZ0);
407
408 gpio_free(GPIO_PTZ0);
409 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
410
411 return val ? 0 : 1;
412}
413
414static int ts_init(void)
415{
416 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
417 return 0;
418}
419
420struct tsc2007_platform_data tsc2007_info = {
421 .model = 2007,
422 .x_plate_ohms = 180,
423 .get_pendown_state = ts_get_pendown_state,
424 .init_platform_hw = ts_init,
425};
426
427static struct i2c_board_info ts_i2c_clients = {
428 I2C_BOARD_INFO("tsc2007", 0x48),
429 .type = "tsc2007",
430 .platform_data = &tsc2007_info,
431 .irq = IRQ0,
432};
433
96987d96
KM		 434/* SHDI0 */
435static struct resource sdhi0_resources[] = {
436 [0] = {
437 .name = "SDHI0",
438 .start = 0x04ce0000,
439 .end = 0x04ce01ff,
440 .flags = IORESOURCE_MEM,
441 },
442 [1] = {
443 .start = 101,
444 .flags = IORESOURCE_IRQ,
445 },
446};
447
448static struct platform_device sdhi0_device = {
449 .name = "sh_mobile_sdhi",
450 .num_resources = ARRAY_SIZE(sdhi0_resources),
451 .resource = sdhi0_resources,
452 .id = 0,
453 .archdata = {
454 .hwblk_id = HWBLK_SDHI0,
455 },
456};
457
458/* SHDI1 */
459static struct resource sdhi1_resources[] = {
460 [0] = {
461 .name = "SDHI1",
462 .start = 0x04cf0000,
463 .end = 0x04cf01ff,
464 .flags = IORESOURCE_MEM,
465 },
466 [1] = {
467 .start = 24,
468 .flags = IORESOURCE_IRQ,
469 },
470};
471
472static struct platform_device sdhi1_device = {
473 .name = "sh_mobile_sdhi",
474 .num_resources = ARRAY_SIZE(sdhi1_resources),
475 .resource = sdhi1_resources,
476 .id = 1,
477 .archdata = {
478 .hwblk_id = HWBLK_SDHI1,
479 },
480};
481
4138b740
KM		 482static struct platform_device *ecovec_devices[] __initdata = {
483 &heartbeat_device,
484 &nor_flash_device,
35a35408 485 &sh_eth_device,
907050a3
KM		 486 &usb0_host_device,
487 &usb1_host_device, /* USB1 host support */
fa3ba51b 488 &lcdc_device,
2153ad32
KM		 489 &ceu0_device,
490 &ceu1_device,
e9103e74 491 &keysc_device,
96987d96
KM		 492 &sdhi0_device,
493 &sdhi1_device,
4138b740
KM		 494};
495
4907d57f
KM		 496#define EEPROM_ADDR 0x50
497static u8 mac_read(struct i2c_adapter *a, u8 command)
498{
499 struct i2c_msg msg[2];
500 u8 buf;
501 int ret;
502
503 msg[0].addr = EEPROM_ADDR;
504 msg[0].flags = 0;
505 msg[0].len = 1;
506 msg[0].buf = &command;
507
508 msg[1].addr = EEPROM_ADDR;
509 msg[1].flags = I2C_M_RD;
510 msg[1].len = 1;
511 msg[1].buf = &buf;
512
513 ret = i2c_transfer(a, msg, 2);
514 if (ret < 0) {
515 printk(KERN_ERR "error %d\n", ret);
516 buf = 0xff;
517 }
518
519 return buf;
520}
521
376abbb4 522static void __init sh_eth_init(struct sh_eth_plat_data *pd)
4907d57f
KM		 523{
524 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM		 525 int i;
526
527 if (!a) {
528 pr_err("can not get I2C 1\n");
529 return;
530 }
531
4907d57f 532 /* read MAC address frome EEPROM */
376abbb4
MD		 533 for (i = 0; i < sizeof(pd->mac_addr); i++) {
534 pd->mac_addr[i] = mac_read(a, 0x10 + i);
4907d57f
KM		 535 msleep(10);
536 }
4907d57f
KM		 537}
538
fa3ba51b 539#define PORT_HIZA 0xA4050158
ea15edb2 540#define IODRIVEA 0xA405018A
4907d57f 541static int __init arch_setup(void)
4138b740 542{
f78bab30
MD		 543 /* enable STATUS0, STATUS2 and PDSTATUS */
544 gpio_request(GPIO_FN_STATUS0, NULL);
545 gpio_request(GPIO_FN_STATUS2, NULL);
546 gpio_request(GPIO_FN_PDSTATUS, NULL);
547
4138b740
KM		 548 /* enable SCIFA0 */
549 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
550 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM		 551
552 /* enable debug LED */
553 gpio_request(GPIO_PTG0, NULL);
554 gpio_request(GPIO_PTG1, NULL);
555 gpio_request(GPIO_PTG2, NULL);
556 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM		 557 gpio_direction_output(GPIO_PTG0, 0);
558 gpio_direction_output(GPIO_PTG1, 0);
559 gpio_direction_output(GPIO_PTG2, 0);
560 gpio_direction_output(GPIO_PTG3, 0);
643e9d10 561 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 562
35a35408
KM		 563 /* enable SH-Eth */
564 gpio_request(GPIO_PTA1, NULL);
565 gpio_direction_output(GPIO_PTA1, 1);
566 mdelay(20);
567
568 gpio_request(GPIO_FN_RMII_RXD0, NULL);
569 gpio_request(GPIO_FN_RMII_RXD1, NULL);
570 gpio_request(GPIO_FN_RMII_TXD0, NULL);
571 gpio_request(GPIO_FN_RMII_TXD1, NULL);
572 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
573 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
574 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
575 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
576 gpio_request(GPIO_FN_MDIO, NULL);
577 gpio_request(GPIO_FN_MDC, NULL);
578 gpio_request(GPIO_FN_LNKSTA, NULL);
579
907050a3 580 /* enable USB */
be4ebf99 581 ctrl_outw(0x0000, 0xA4D80000);
147df2d6 582 ctrl_outw(0x0000, 0xA4D90000);
907050a3
KM		 583 gpio_request(GPIO_PTB3, NULL);
584 gpio_request(GPIO_PTB4, NULL);
585 gpio_request(GPIO_PTB5, NULL);
586 gpio_direction_input(GPIO_PTB3);
587 gpio_direction_output(GPIO_PTB4, 0);
588 gpio_direction_output(GPIO_PTB5, 0);
589 ctrl_outw(0x0600, 0xa40501d4);
590 ctrl_outw(0x0600, 0xa4050192);
591
fa3ba51b
KM		 592 /* enable LCDC */
593 gpio_request(GPIO_FN_LCDD23, NULL);
594 gpio_request(GPIO_FN_LCDD22, NULL);
595 gpio_request(GPIO_FN_LCDD21, NULL);
596 gpio_request(GPIO_FN_LCDD20, NULL);
597 gpio_request(GPIO_FN_LCDD19, NULL);
598 gpio_request(GPIO_FN_LCDD18, NULL);
599 gpio_request(GPIO_FN_LCDD17, NULL);
600 gpio_request(GPIO_FN_LCDD16, NULL);
601 gpio_request(GPIO_FN_LCDD15, NULL);
602 gpio_request(GPIO_FN_LCDD14, NULL);
603 gpio_request(GPIO_FN_LCDD13, NULL);
604 gpio_request(GPIO_FN_LCDD12, NULL);
605 gpio_request(GPIO_FN_LCDD11, NULL);
606 gpio_request(GPIO_FN_LCDD10, NULL);
607 gpio_request(GPIO_FN_LCDD9, NULL);
608 gpio_request(GPIO_FN_LCDD8, NULL);
609 gpio_request(GPIO_FN_LCDD7, NULL);
610 gpio_request(GPIO_FN_LCDD6, NULL);
611 gpio_request(GPIO_FN_LCDD5, NULL);
612 gpio_request(GPIO_FN_LCDD4, NULL);
613 gpio_request(GPIO_FN_LCDD3, NULL);
614 gpio_request(GPIO_FN_LCDD2, NULL);
615 gpio_request(GPIO_FN_LCDD1, NULL);
616 gpio_request(GPIO_FN_LCDD0, NULL);
617 gpio_request(GPIO_FN_LCDDISP, NULL);
618 gpio_request(GPIO_FN_LCDHSYN, NULL);
619 gpio_request(GPIO_FN_LCDDCK, NULL);
620 gpio_request(GPIO_FN_LCDVSYN, NULL);
621 gpio_request(GPIO_FN_LCDDON, NULL);
622 gpio_request(GPIO_FN_LCDLCLK, NULL);
623 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
624
625 gpio_request(GPIO_PTE6, NULL);
626 gpio_request(GPIO_PTU1, NULL);
627 gpio_request(GPIO_PTR1, NULL);
628 gpio_request(GPIO_PTA2, NULL);
629 gpio_direction_input(GPIO_PTE6);
630 gpio_direction_output(GPIO_PTU1, 0);
631 gpio_direction_output(GPIO_PTR1, 0);
632 gpio_direction_output(GPIO_PTA2, 0);
633
ea15edb2
KM		 634 /* I/O buffer drive ability is low */
635 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
636
fa3ba51b
KM		 637 if (gpio_get_value(GPIO_PTE6)) {
638 /* DVI */
639 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
ea15edb2 640 lcdc_info.ch[0].clock_divider = 1,
fa3ba51b
KM		 641 lcdc_info.ch[0].lcd_cfg.name = "DVI";
642 lcdc_info.ch[0].lcd_cfg.xres = 1280;
643 lcdc_info.ch[0].lcd_cfg.yres = 720;
644 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
645 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
646 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
647 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
648 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
649 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
650
651 gpio_set_value(GPIO_PTA2, 1);
652 gpio_set_value(GPIO_PTU1, 1);
653 } else {
654 /* Panel */
ea15edb2
KM		 655
656 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
657 lcdc_info.ch[0].clock_divider = 2,
658 lcdc_info.ch[0].lcd_cfg.name = "Panel";
659 lcdc_info.ch[0].lcd_cfg.xres = 800;
660 lcdc_info.ch[0].lcd_cfg.yres = 480;
661 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
662 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
663 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
664 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
665 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
666 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
667
668 gpio_set_value(GPIO_PTR1, 1);
669
670 /* FIXME
671 *
672 * LCDDON control is needed for Panel,
673 * but current sh_mobile_lcdc driver doesn't control it.
674 * It is temporary correspondence
675 */
676 gpio_request(GPIO_PTF4, NULL);
677 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM		 678
679 /* enable TouchScreen */
680 i2c_register_board_info(0, &ts_i2c_clients, 1);
681 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM		 682 }
683
2153ad32
KM		 684 /* enable CEU0 */
685 gpio_request(GPIO_FN_VIO0_D15, NULL);
686 gpio_request(GPIO_FN_VIO0_D14, NULL);
687 gpio_request(GPIO_FN_VIO0_D13, NULL);
688 gpio_request(GPIO_FN_VIO0_D12, NULL);
689 gpio_request(GPIO_FN_VIO0_D11, NULL);
690 gpio_request(GPIO_FN_VIO0_D10, NULL);
691 gpio_request(GPIO_FN_VIO0_D9, NULL);
692 gpio_request(GPIO_FN_VIO0_D8, NULL);
693 gpio_request(GPIO_FN_VIO0_D7, NULL);
694 gpio_request(GPIO_FN_VIO0_D6, NULL);
695 gpio_request(GPIO_FN_VIO0_D5, NULL);
696 gpio_request(GPIO_FN_VIO0_D4, NULL);
697 gpio_request(GPIO_FN_VIO0_D3, NULL);
698 gpio_request(GPIO_FN_VIO0_D2, NULL);
699 gpio_request(GPIO_FN_VIO0_D1, NULL);
700 gpio_request(GPIO_FN_VIO0_D0, NULL);
701 gpio_request(GPIO_FN_VIO0_VD, NULL);
702 gpio_request(GPIO_FN_VIO0_CLK, NULL);
703 gpio_request(GPIO_FN_VIO0_FLD, NULL);
704 gpio_request(GPIO_FN_VIO0_HD, NULL);
705 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
706
707 /* enable CEU1 */
708 gpio_request(GPIO_FN_VIO1_D7, NULL);
709 gpio_request(GPIO_FN_VIO1_D6, NULL);
710 gpio_request(GPIO_FN_VIO1_D5, NULL);
711 gpio_request(GPIO_FN_VIO1_D4, NULL);
712 gpio_request(GPIO_FN_VIO1_D3, NULL);
713 gpio_request(GPIO_FN_VIO1_D2, NULL);
714 gpio_request(GPIO_FN_VIO1_D1, NULL);
715 gpio_request(GPIO_FN_VIO1_D0, NULL);
716 gpio_request(GPIO_FN_VIO1_FLD, NULL);
717 gpio_request(GPIO_FN_VIO1_HD, NULL);
718 gpio_request(GPIO_FN_VIO1_VD, NULL);
719 gpio_request(GPIO_FN_VIO1_CLK, NULL);
720 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
721
e9103e74
KM		 722 /* enable KEYSC */
723 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
724 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
725 gpio_request(GPIO_FN_KEYOUT3, NULL);
726 gpio_request(GPIO_FN_KEYOUT2, NULL);
727 gpio_request(GPIO_FN_KEYOUT1, NULL);
728 gpio_request(GPIO_FN_KEYOUT0, NULL);
729 gpio_request(GPIO_FN_KEYIN0, NULL);
730
064a16dc
KM		 731 /* enable user debug switch */
732 gpio_request(GPIO_PTR0, NULL);
733 gpio_request(GPIO_PTR4, NULL);
734 gpio_request(GPIO_PTR5, NULL);
735 gpio_request(GPIO_PTR6, NULL);
736 gpio_direction_input(GPIO_PTR0);
737 gpio_direction_input(GPIO_PTR4);
738 gpio_direction_input(GPIO_PTR5);
739 gpio_direction_input(GPIO_PTR6);
740
96987d96
KM		 741 /* enable SDHI0 */
742 gpio_request(GPIO_FN_SDHI0CD, NULL);
743 gpio_request(GPIO_FN_SDHI0WP, NULL);
744 gpio_request(GPIO_FN_SDHI0CMD, NULL);
745 gpio_request(GPIO_FN_SDHI0CLK, NULL);
746 gpio_request(GPIO_FN_SDHI0D3, NULL);
747 gpio_request(GPIO_FN_SDHI0D2, NULL);
748 gpio_request(GPIO_FN_SDHI0D1, NULL);
749 gpio_request(GPIO_FN_SDHI0D0, NULL);
750
751 /* enable SDHI1 */
752 gpio_request(GPIO_FN_SDHI1CD, NULL);
753 gpio_request(GPIO_FN_SDHI1WP, NULL);
754 gpio_request(GPIO_FN_SDHI1CMD, NULL);
755 gpio_request(GPIO_FN_SDHI1CLK, NULL);
756 gpio_request(GPIO_FN_SDHI1D3, NULL);
757 gpio_request(GPIO_FN_SDHI1D2, NULL);
758 gpio_request(GPIO_FN_SDHI1D1, NULL);
759 gpio_request(GPIO_FN_SDHI1D0, NULL);
760
761 gpio_request(GPIO_PTB6, NULL);
762 gpio_request(GPIO_PTB7, NULL);
763 gpio_direction_output(GPIO_PTB6, 1);
764 gpio_direction_output(GPIO_PTB7, 1);
765
766 /* I/O buffer drive ability is high for SDHI1 */
767 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
768
125ecce6
KM		 769 /* enable I2C device */
770 i2c_register_board_info(1, i2c1_devices,
771 ARRAY_SIZE(i2c1_devices));
772
4138b740
KM		 773 return platform_add_devices(ecovec_devices,
774 ARRAY_SIZE(ecovec_devices));
775}
4907d57f
KM		 776arch_initcall(arch_setup);
777
778static int __init devices_setup(void)
779{
376abbb4 780 sh_eth_init(&sh_eth_plat);
4907d57f
KM		 781 return 0;
782}
783device_initcall(devices_setup);
784
4138b740
KM		 785static struct sh_machine_vector mv_ecovec __initmv = {
786 .mv_name = "R0P7724 (EcoVec)",
787};
Linux kernel - Deliverables
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