[deliverable/linux.git] / arch / sh / boards / renesas / migor / setup.c

/*
 * Renesas System Solutions Asia Pte. Ltd - Migo-R
 *
 * Copyright (C) 2008 Magnus Damm
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/input.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <asm/migor.h>

/* Address     IRQ  Size  Bus  Description
 * 0x00000000       64MB  16   NOR Flash (SP29PL256N)
 * 0x0c000000       64MB  64   SDRAM (2xK4M563233G)
 * 0x10000000  IRQ0       16   Ethernet (SMC91C111)
 * 0x14000000  IRQ4       16   USB 2.0 Host Controller (M66596)
 * 0x18000000       8GB    8   NAND Flash (K9K8G08U0A)
 */

static struct resource smc91x_eth_resources[] = {
	[0] = {
		.name   = "SMC91C111" ,
		.start  = 0x10000300,
		.end    = 0x1000030f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 32, /* IRQ0 */
		.flags  = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
	},
};

static struct platform_device smc91x_eth_device = {
	.name           = "smc91x",
	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
	.resource       = smc91x_eth_resources,
};

static struct sh_keysc_info sh_keysc_info = {
	.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
	.scan_timing = 3,
	.delay = 5,
	.keycodes = {
		0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
		0, KEY_F, KEY_C, KEY_D,	KEY_H, KEY_1,
		0, KEY_2, KEY_3, KEY_4,	KEY_5, KEY_6,
		0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
		0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
	},
};

static struct resource sh_keysc_resources[] = {
	[0] = {
		.start  = 0x044b0000,
		.end    = 0x044b000f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 79,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_keysc_device = {
	.name           = "sh_keysc",
	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
	.resource       = sh_keysc_resources,
	.dev	= {
		.platform_data	= &sh_keysc_info,
	},
};

static struct mtd_partition migor_nor_flash_partitions[] =
{
	{
		.name = "uboot",
		.offset = 0,
		.size = (1 * 1024 * 1024),
		.mask_flags = MTD_WRITEABLE,	/* Read-only */
	},
	{
		.name = "rootfs",
		.offset = MTDPART_OFS_APPEND,
		.size = (15 * 1024 * 1024),
	},
	{
		.name = "other",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data migor_nor_flash_data = {
	.width		= 2,
	.parts		= migor_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(migor_nor_flash_partitions),
};

static struct resource migor_nor_flash_resources[] = {
	[0] = {
		.name		= "NOR Flash",
		.start		= 0x00000000,
		.end		= 0x03ffffff,
		.flags		= IORESOURCE_MEM,
	}
};

static struct platform_device migor_nor_flash_device = {
	.name		= "physmap-flash",
	.resource	= migor_nor_flash_resources,
	.num_resources	= ARRAY_SIZE(migor_nor_flash_resources),
	.dev		= {
		.platform_data = &migor_nor_flash_data,
	},
};

static struct mtd_partition migor_nand_flash_partitions[] = {
	{
		.name		= "nanddata1",
		.offset		= 0x0,
		.size		= 512 * 1024 * 1024,
	},
	{
		.name		= "nanddata2",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 512 * 1024 * 1024,
	},
};

static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
				     unsigned int ctrl)
{
	struct nand_chip *chip = mtd->priv;

	if (cmd == NAND_CMD_NONE)
		return;

	if (ctrl & NAND_CLE)
		writeb(cmd, chip->IO_ADDR_W + 0x00400000);
	else if (ctrl & NAND_ALE)
		writeb(cmd, chip->IO_ADDR_W + 0x00800000);
	else
		writeb(cmd, chip->IO_ADDR_W);
}

static int migor_nand_flash_ready(struct mtd_info *mtd)
{
	return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
}

struct platform_nand_data migor_nand_flash_data = {
	.chip = {
		.nr_chips = 1,
		.partitions = migor_nand_flash_partitions,
		.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
		.chip_delay = 20,
		.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
	},
	.ctrl = {
		.dev_ready = migor_nand_flash_ready,
		.cmd_ctrl = migor_nand_flash_cmd_ctl,
	},
};

static struct resource migor_nand_flash_resources[] = {
	[0] = {
		.name		= "NAND Flash",
		.start		= 0x18000000,
		.end		= 0x18ffffff,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device migor_nand_flash_device = {
	.name		= "gen_nand",
	.resource	= migor_nand_flash_resources,
	.num_resources	= ARRAY_SIZE(migor_nand_flash_resources),
	.dev		= {
		.platform_data = &migor_nand_flash_data,
	}
};

static struct platform_device *migor_devices[] __initdata = {
	&smc91x_eth_device,
	&sh_keysc_device,
	&migor_nor_flash_device,
	&migor_nand_flash_device,
};

static struct i2c_board_info __initdata migor_i2c_devices[] = {
	{
		I2C_BOARD_INFO("rtc-rs5c372", 0x32),
		.type   = "rs5c372b",
	},
};

static int __init migor_devices_setup(void)
{
	i2c_register_board_info(0, migor_i2c_devices,
				ARRAY_SIZE(migor_i2c_devices));
 
	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
}
__initcall(migor_devices_setup);

static void __init migor_setup(char **cmdline_p)
{
	/* SMC91C111 - Enable IRQ0 */
	ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);

	/* KEYSC */
	ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
	ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
	ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
	ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
	ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);

	/* NAND Flash */
	ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
	ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
		  BSC_CS6ABCR);

	/* I2C */
	ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);
}

static struct sh_machine_vector mv_migor __initmv = {
	.mv_name		= "Migo-R",
	.mv_setup		= migor_setup,
};
Commit	Line	Data
70f784ec MD	1	/*
	2	* Renesas System Solutions Asia Pte. Ltd - Migo-R
	3	*
	4	* Copyright (C) 2008 Magnus Damm
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10	#include <linux/init.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/interrupt.h>
92cfeb61	13	#include <linux/input.h>
b8808786	14	#include <linux/mtd/physmap.h>
3c803a9a	15	#include <linux/mtd/nand.h>
0c6111ec	16	#include <linux/i2c.h>
70f784ec MD	17	#include <asm/machvec.h>
70f784ec MD	18	#include <asm/io.h>
92cfeb61	19	#include <asm/sh_keysc.h>
9db913c3	20	#include <asm/migor.h>
70f784ec MD	21
	22	/* Address IRQ Size Bus Description
	23	* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
	24	* 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
	25	* 0x10000000 IRQ0 16 Ethernet (SMC91C111)
	26	* 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
	27	* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
	28	*/
	29
	30	static struct resource smc91x_eth_resources[] = {
	31	[0] = {
b026a23c MD	32	.name = "SMC91C111" ,
	33	.start = 0x10000300,
	34	.end = 0x1000030f,
70f784ec MD	35	.flags = IORESOURCE_MEM,
	36	},
	37	[1] = {
	38	.start = 32, /* IRQ0 */
	39	.flags = IORESOURCE_IRQ \| IRQF_TRIGGER_HIGH,
	40	},
	41	};
	42
	43	static struct platform_device smc91x_eth_device = {
	44	.name = "smc91x",
	45	.num_resources = ARRAY_SIZE(smc91x_eth_resources),
	46	.resource = smc91x_eth_resources,
	47	};
	48
92cfeb61 MD	49	static struct sh_keysc_info sh_keysc_info = {
	50	.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
	51	.scan_timing = 3,
	52	.delay = 5,
	53	.keycodes = {
	54	0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
	55	0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
	56	0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
	57	0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
	58	0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
	59	},
	60	};
	61
	62	static struct resource sh_keysc_resources[] = {
	63	[0] = {
	64	.start = 0x044b0000,
	65	.end = 0x044b000f,
	66	.flags = IORESOURCE_MEM,
	67	},
	68	[1] = {
	69	.start = 79,
	70	.flags = IORESOURCE_IRQ,
	71	},
	72	};
	73
	74	static struct platform_device sh_keysc_device = {
	75	.name = "sh_keysc",
	76	.num_resources = ARRAY_SIZE(sh_keysc_resources),
	77	.resource = sh_keysc_resources,
	78	.dev = {
	79	.platform_data = &sh_keysc_info,
	80	},
	81	};
	82
b8808786 MD	83	static struct mtd_partition migor_nor_flash_partitions[] =
	84	{
	85	{
	86	.name = "uboot",
	87	.offset = 0,
	88	.size = (1 * 1024 * 1024),
	89	.mask_flags = MTD_WRITEABLE, /* Read-only */
	90	},
	91	{
	92	.name = "rootfs",
	93	.offset = MTDPART_OFS_APPEND,
	94	.size = (15 * 1024 * 1024),
	95	},
	96	{
	97	.name = "other",
	98	.offset = MTDPART_OFS_APPEND,
	99	.size = MTDPART_SIZ_FULL,
	100	},
	101	};
	102
	103	static struct physmap_flash_data migor_nor_flash_data = {
	104	.width = 2,
	105	.parts = migor_nor_flash_partitions,
	106	.nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
	107	};
	108
	109	static struct resource migor_nor_flash_resources[] = {
	110	[0] = {
	111	.name = "NOR Flash",
	112	.start = 0x00000000,
	113	.end = 0x03ffffff,
	114	.flags = IORESOURCE_MEM,
	115	}
	116	};
	117
	118	static struct platform_device migor_nor_flash_device = {
	119	.name = "physmap-flash",
	120	.resource = migor_nor_flash_resources,
	121	.num_resources = ARRAY_SIZE(migor_nor_flash_resources),
	122	.dev = {
	123	.platform_data = &migor_nor_flash_data,
	124	},
	125	};
	126
3c803a9a MD	127	static struct mtd_partition migor_nand_flash_partitions[] = {
	128	{
	129	.name = "nanddata1",
	130	.offset = 0x0,
	131	.size = 512 * 1024 * 1024,
	132	},
	133	{
	134	.name = "nanddata2",
	135	.offset = MTDPART_OFS_APPEND,
	136	.size = 512 * 1024 * 1024,
	137	},
	138	};
	139
	140	static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
	141	unsigned int ctrl)
	142	{
	143	struct nand_chip *chip = mtd->priv;
	144
	145	if (cmd == NAND_CMD_NONE)
	146	return;
	147
	148	if (ctrl & NAND_CLE)
	149	writeb(cmd, chip->IO_ADDR_W + 0x00400000);
	150	else if (ctrl & NAND_ALE)
	151	writeb(cmd, chip->IO_ADDR_W + 0x00800000);
	152	else
	153	writeb(cmd, chip->IO_ADDR_W);
	154	}
	155
	156	static int migor_nand_flash_ready(struct mtd_info *mtd)
	157	{
	158	return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
	159	}
	160
	161	struct platform_nand_data migor_nand_flash_data = {
	162	.chip = {
	163	.nr_chips = 1,
	164	.partitions = migor_nand_flash_partitions,
	165	.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
	166	.chip_delay = 20,
	167	.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
	168	},
	169	.ctrl = {
	170	.dev_ready = migor_nand_flash_ready,
	171	.cmd_ctrl = migor_nand_flash_cmd_ctl,
	172	},
	173	};
	174
	175	static struct resource migor_nand_flash_resources[] = {
	176	[0] = {
	177	.name = "NAND Flash",
	178	.start = 0x18000000,
	179	.end = 0x18ffffff,
	180	.flags = IORESOURCE_MEM,
	181	},
	182	};
	183
	184	static struct platform_device migor_nand_flash_device = {
	185	.name = "gen_nand",
	186	.resource = migor_nand_flash_resources,
	187	.num_resources = ARRAY_SIZE(migor_nand_flash_resources),
	188	.dev = {
	189	.platform_data = &migor_nand_flash_data,
	190	}
191	};
192
70f784ec MD	193	static struct platform_device *migor_devices[] __initdata = {
70f784ec MD	194	&smc91x_eth_device,
92cfeb61	195	&sh_keysc_device,
b8808786	196	&migor_nor_flash_device,
3c803a9a	197	&migor_nand_flash_device,
70f784ec MD	198	};
70f784ec MD	199
0c6111ec	200	static struct i2c_board_info __initdata migor_i2c_devices[] = {
57795867 MD	201	{
	202	I2C_BOARD_INFO("rtc-rs5c372", 0x32),
	203	.type = "rs5c372b",
	204	},
0c6111ec MD	205	};
0c6111ec MD	206
70f784ec MD	207	static int __init migor_devices_setup(void)
70f784ec MD	208	{
0c6111ec MD	209	i2c_register_board_info(0, migor_i2c_devices,
	210	ARRAY_SIZE(migor_i2c_devices));
	211
70f784ec MD	212	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
	213	}
	214	__initcall(migor_devices_setup);
	215
	216	static void __init migor_setup(char **cmdline_p)
	217	{
92cfeb61 MD	218	/* SMC91C111 - Enable IRQ0 */
	219	ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);
	220
	221	/* KEYSC */
	222	ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
	223	ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
	224	ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
	225	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
	226	ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
	227	ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);
3c803a9a MD	228
	229	/* NAND Flash */
	230	ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
	231	ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) \| 0x00000200,
	232	BSC_CS6ABCR);
0c6111ec MD	233
	234	/* I2C */
	235	ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1);
70f784ec MD	236	}
	237
	238	static struct sh_machine_vector mv_migor __initmv = {
	239	.mv_name = "Migo-R",
	240	.mv_setup = migor_setup,
	241	};