[deliverable/linux.git] / arch / sh / boards / renesas / migor / setup.c

/*
 * Renesas System Solutions Asia Pte. Ltd - Migo-R
 *
 * Copyright (C) 2008 Magnus Damm
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/input.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
#include <linux/smc91x.h>
#include <asm/clock.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/migor.h>

/* Address     IRQ  Size  Bus  Description
 * 0x00000000       64MB  16   NOR Flash (SP29PL256N)
 * 0x0c000000       64MB  64   SDRAM (2xK4M563233G)
 * 0x10000000  IRQ0       16   Ethernet (SMC91C111)
 * 0x14000000  IRQ4       16   USB 2.0 Host Controller (M66596)
 * 0x18000000       8GB    8   NAND Flash (K9K8G08U0A)
 */

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT,
};

static struct resource smc91x_eth_resources[] = {
	[0] = {
		.name   = "SMC91C111" ,
		.start  = 0x10000300,
		.end    = 0x1000030f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 32, /* IRQ0 */
		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_eth_device = {
	.name           = "smc91x",
	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
	.resource       = smc91x_eth_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};

static struct sh_keysc_info sh_keysc_info = {
	.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
	.scan_timing = 3,
	.delay = 5,
	.keycodes = {
		0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
		0, KEY_F, KEY_C, KEY_D,	KEY_H, KEY_1,
		0, KEY_2, KEY_3, KEY_4,	KEY_5, KEY_6,
		0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
		0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
	},
};

static struct resource sh_keysc_resources[] = {
	[0] = {
		.start  = 0x044b0000,
		.end    = 0x044b000f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 79,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_keysc_device = {
	.name           = "sh_keysc",
	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
	.resource       = sh_keysc_resources,
	.dev	= {
		.platform_data	= &sh_keysc_info,
	},
};

static struct mtd_partition migor_nor_flash_partitions[] =
{
	{
		.name = "uboot",
		.offset = 0,
		.size = (1 * 1024 * 1024),
		.mask_flags = MTD_WRITEABLE,	/* Read-only */
	},
	{
		.name = "rootfs",
		.offset = MTDPART_OFS_APPEND,
		.size = (15 * 1024 * 1024),
	},
	{
		.name = "other",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data migor_nor_flash_data = {
	.width		= 2,
	.parts		= migor_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(migor_nor_flash_partitions),
};

static struct resource migor_nor_flash_resources[] = {
	[0] = {
		.name		= "NOR Flash",
		.start		= 0x00000000,
		.end		= 0x03ffffff,
		.flags		= IORESOURCE_MEM,
	}
};

static struct platform_device migor_nor_flash_device = {
	.name		= "physmap-flash",
	.resource	= migor_nor_flash_resources,
	.num_resources	= ARRAY_SIZE(migor_nor_flash_resources),
	.dev		= {
		.platform_data = &migor_nor_flash_data,
	},
};

static struct mtd_partition migor_nand_flash_partitions[] = {
	{
		.name		= "nanddata1",
		.offset		= 0x0,
		.size		= 512 * 1024 * 1024,
	},
	{
		.name		= "nanddata2",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 512 * 1024 * 1024,
	},
};

static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
				     unsigned int ctrl)
{
	struct nand_chip *chip = mtd->priv;

	if (cmd == NAND_CMD_NONE)
		return;

	if (ctrl & NAND_CLE)
		writeb(cmd, chip->IO_ADDR_W + 0x00400000);
	else if (ctrl & NAND_ALE)
		writeb(cmd, chip->IO_ADDR_W + 0x00800000);
	else
		writeb(cmd, chip->IO_ADDR_W);
}

static int migor_nand_flash_ready(struct mtd_info *mtd)
{
	return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
}

struct platform_nand_data migor_nand_flash_data = {
	.chip = {
		.nr_chips = 1,
		.partitions = migor_nand_flash_partitions,
		.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
		.chip_delay = 20,
		.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
	},
	.ctrl = {
		.dev_ready = migor_nand_flash_ready,
		.cmd_ctrl = migor_nand_flash_cmd_ctl,
	},
};

static struct resource migor_nand_flash_resources[] = {
	[0] = {
		.name		= "NAND Flash",
		.start		= 0x18000000,
		.end		= 0x18ffffff,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device migor_nand_flash_device = {
	.name		= "gen_nand",
	.resource	= migor_nand_flash_resources,
	.num_resources	= ARRAY_SIZE(migor_nand_flash_resources),
	.dev		= {
		.platform_data = &migor_nand_flash_data,
	}
};

static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	.clock_source = LCDC_CLK_BUS,
	.ch[0] = {
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.interface_type = RGB16,
		.clock_divider = 2,
		.lcd_cfg = {
			.name = "LB070WV1",
			.xres = 800,
			.yres = 480,
			.left_margin = 64,
			.right_margin = 16,
			.hsync_len = 120,
			.upper_margin = 1,
			.lower_margin = 17,
			.vsync_len = 2,
			.sync = 0,
		},
	}
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
	.clock_source = LCDC_CLK_PERIPHERAL,
	.ch[0] = {
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.interface_type = SYS16A,
		.clock_divider = 10,
		.lcd_cfg = {
			.name = "PH240320T",
			.xres = 320,
			.yres = 240,
			.left_margin = 0,
			.right_margin = 16,
			.hsync_len = 8,
			.upper_margin = 1,
			.lower_margin = 17,
			.vsync_len = 2,
			.sync = FB_SYNC_HOR_HIGH_ACT,
		},
		.board_cfg = {
			.setup_sys = migor_lcd_qvga_setup,
		},
		.sys_bus_cfg = {
			.ldmt2r = 0x06000a09,
			.ldmt3r = 0x180e3418,
		},
	}
#endif
};

static struct resource migor_lcdc_resources[] = {
	[0] = {
		.name	= "LCDC",
		.start	= 0xfe940000, /* P4-only space */
		.end	= 0xfe941fff,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device migor_lcdc_device = {
	.name		= "sh_mobile_lcdc_fb",
	.num_resources	= ARRAY_SIZE(migor_lcdc_resources),
	.resource	= migor_lcdc_resources,
	.dev	= {
		.platform_data	= &sh_mobile_lcdc_info,
	},
};

static struct platform_device *migor_devices[] __initdata = {
	&smc91x_eth_device,
	&sh_keysc_device,
	&migor_lcdc_device,
	&migor_nor_flash_device,
	&migor_nand_flash_device,
};

static struct i2c_board_info __initdata migor_i2c_devices[] = {
	{
		I2C_BOARD_INFO("rs5c372b", 0x32),
	},
	{
		I2C_BOARD_INFO("migor_ts", 0x51),
		.irq = 38, /* IRQ6 */
	},
};

static int __init migor_devices_setup(void)
{
	clk_always_enable("mstp214"); /* KEYSC */
	clk_always_enable("mstp200"); /* LCDC */

	i2c_register_board_info(0, migor_i2c_devices,
				ARRAY_SIZE(migor_i2c_devices));
 
	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
}
__initcall(migor_devices_setup);

static void __init migor_setup(char **cmdline_p)
{
	/* SMC91C111 - Enable IRQ0 */
	ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);

	/* KEYSC */
	ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
	ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
	ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
	ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);

	/* NAND Flash */
	ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
	ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
		  BSC_CS6ABCR);

	/* Touch Panel - Enable IRQ6 */
	ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
	ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
	ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);

#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	/* LCDC - WVGA - Enable RGB Interface signals */
	ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
	ctrl_outw(0x0000, PORT_PHCR);
	ctrl_outw(0x0000, PORT_PLCR);
	ctrl_outw(0x0000, PORT_PMCR);
	ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
	ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD);
	ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
	/* LCDC - QVGA - Enable SYS Interface signals */
	ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
	ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR);
	ctrl_outw(0x0000, PORT_PLCR);
	ctrl_outw(0x0000, PORT_PMCR);
	ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
	ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD);
	ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
#endif
}

static struct sh_machine_vector mv_migor __initmv = {
	.mv_name		= "Migo-R",
	.mv_setup		= migor_setup,
};
Commit	Line	Data
70f784ec MD	1	/*
	2	* Renesas System Solutions Asia Pte. Ltd - Migo-R
	3	*
	4	* Copyright (C) 2008 Magnus Damm
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10	#include <linux/init.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/interrupt.h>
92cfeb61	13	#include <linux/input.h>
b8808786	14	#include <linux/mtd/physmap.h>
3c803a9a	15	#include <linux/mtd/nand.h>
0c6111ec	16	#include <linux/i2c.h>
8a3ee0fc	17	#include <linux/smc91x.h>
6c7d826c	18	#include <asm/clock.h>
70f784ec MD	19	#include <asm/machvec.h>
70f784ec MD	20	#include <asm/io.h>
92cfeb61	21	#include <asm/sh_keysc.h>
8b1285f1	22	#include <asm/sh_mobile_lcdc.h>
9db913c3	23	#include <asm/migor.h>
70f784ec MD	24
	25	/* Address IRQ Size Bus Description
	26	* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
	27	* 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
	28	* 0x10000000 IRQ0 16 Ethernet (SMC91C111)
	29	* 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
	30	* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
	31	*/
	32
8a3ee0fc MD	33	static struct smc91x_platdata smc91x_info = {
8a3ee0fc MD	34	.flags = SMC91X_USE_16BIT,
8a3ee0fc MD	35	};
8a3ee0fc MD	36
70f784ec MD	37	static struct resource smc91x_eth_resources[] = {
70f784ec MD	38	[0] = {
b026a23c MD	39	.name = "SMC91C111" ,
	40	.start = 0x10000300,
	41	.end = 0x1000030f,
70f784ec MD	42	.flags = IORESOURCE_MEM,
	43	},
	44	[1] = {
	45	.start = 32, /* IRQ0 */
d280eadc	46	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
70f784ec MD	47	},
	48	};
	49
	50	static struct platform_device smc91x_eth_device = {
	51	.name = "smc91x",
	52	.num_resources = ARRAY_SIZE(smc91x_eth_resources),
	53	.resource = smc91x_eth_resources,
8a3ee0fc MD	54	.dev = {
	55	.platform_data = &smc91x_info,
	56	},
70f784ec MD	57	};
70f784ec MD	58
92cfeb61 MD	59	static struct sh_keysc_info sh_keysc_info = {
	60	.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
	61	.scan_timing = 3,
	62	.delay = 5,
	63	.keycodes = {
	64	0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
	65	0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
	66	0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
	67	0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
	68	0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
	69	},
	70	};
	71
	72	static struct resource sh_keysc_resources[] = {
	73	[0] = {
	74	.start = 0x044b0000,
	75	.end = 0x044b000f,
	76	.flags = IORESOURCE_MEM,
	77	},
	78	[1] = {
	79	.start = 79,
	80	.flags = IORESOURCE_IRQ,
	81	},
	82	};
	83
	84	static struct platform_device sh_keysc_device = {
	85	.name = "sh_keysc",
	86	.num_resources = ARRAY_SIZE(sh_keysc_resources),
	87	.resource = sh_keysc_resources,
	88	.dev = {
	89	.platform_data = &sh_keysc_info,
	90	},
	91	};
	92
b8808786 MD	93	static struct mtd_partition migor_nor_flash_partitions[] =
	94	{
	95	{
	96	.name = "uboot",
	97	.offset = 0,
	98	.size = (1 * 1024 * 1024),
	99	.mask_flags = MTD_WRITEABLE, /* Read-only */
	100	},
	101	{
	102	.name = "rootfs",
	103	.offset = MTDPART_OFS_APPEND,
	104	.size = (15 * 1024 * 1024),
	105	},
	106	{
	107	.name = "other",
	108	.offset = MTDPART_OFS_APPEND,
	109	.size = MTDPART_SIZ_FULL,
	110	},
	111	};
	112
	113	static struct physmap_flash_data migor_nor_flash_data = {
	114	.width = 2,
	115	.parts = migor_nor_flash_partitions,
	116	.nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
	117	};
	118
	119	static struct resource migor_nor_flash_resources[] = {
	120	[0] = {
	121	.name = "NOR Flash",
	122	.start = 0x00000000,
	123	.end = 0x03ffffff,
	124	.flags = IORESOURCE_MEM,
	125	}
	126	};
	127
	128	static struct platform_device migor_nor_flash_device = {
	129	.name = "physmap-flash",
	130	.resource = migor_nor_flash_resources,
	131	.num_resources = ARRAY_SIZE(migor_nor_flash_resources),
	132	.dev = {
	133	.platform_data = &migor_nor_flash_data,
	134	},
	135	};
	136
3c803a9a MD	137	static struct mtd_partition migor_nand_flash_partitions[] = {
	138	{
	139	.name = "nanddata1",
	140	.offset = 0x0,
	141	.size = 512 * 1024 * 1024,
	142	},
	143	{
	144	.name = "nanddata2",
	145	.offset = MTDPART_OFS_APPEND,
	146	.size = 512 * 1024 * 1024,
	147	},
	148	};
	149
	150	static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
	151	unsigned int ctrl)
	152	{
	153	struct nand_chip *chip = mtd->priv;
	154
	155	if (cmd == NAND_CMD_NONE)
	156	return;
	157
	158	if (ctrl & NAND_CLE)
	159	writeb(cmd, chip->IO_ADDR_W + 0x00400000);
	160	else if (ctrl & NAND_ALE)
	161	writeb(cmd, chip->IO_ADDR_W + 0x00800000);
	162	else
	163	writeb(cmd, chip->IO_ADDR_W);
	164	}
	165
	166	static int migor_nand_flash_ready(struct mtd_info *mtd)
	167	{
	168	return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
	169	}
	170
	171	struct platform_nand_data migor_nand_flash_data = {
	172	.chip = {
	173	.nr_chips = 1,
	174	.partitions = migor_nand_flash_partitions,
	175	.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
	176	.chip_delay = 20,
	177	.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
	178	},
	179	.ctrl = {
	180	.dev_ready = migor_nand_flash_ready,
	181	.cmd_ctrl = migor_nand_flash_cmd_ctl,
	182	},
	183	};
	184
	185	static struct resource migor_nand_flash_resources[] = {
	186	[0] = {
	187	.name = "NAND Flash",
	188	.start = 0x18000000,
	189	.end = 0x18ffffff,
	190	.flags = IORESOURCE_MEM,
	191	},
	192	};
	193
	194	static struct platform_device migor_nand_flash_device = {
	195	.name = "gen_nand",
	196	.resource = migor_nand_flash_resources,
	197	.num_resources = ARRAY_SIZE(migor_nand_flash_resources),
	198	.dev = {
	199	.platform_data = &migor_nand_flash_data,
	200	}
201	};
202
8b1285f1 MD	203	static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
	204	#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	205	.clock_source = LCDC_CLK_BUS,
	206	.ch[0] = {
	207	.chan = LCDC_CHAN_MAINLCD,
	208	.bpp = 16,
	209	.interface_type = RGB16,
	210	.clock_divider = 2,
	211	.lcd_cfg = {
	212	.name = "LB070WV1",
	213	.xres = 800,
	214	.yres = 480,
	215	.left_margin = 64,
	216	.right_margin = 16,
	217	.hsync_len = 120,
	218	.upper_margin = 1,
	219	.lower_margin = 17,
	220	.vsync_len = 2,
	221	.sync = 0,
	222	},
	223	}
	224	#endif
	225	#ifdef CONFIG_SH_MIGOR_QVGA
	226	.clock_source = LCDC_CLK_PERIPHERAL,
	227	.ch[0] = {
	228	.chan = LCDC_CHAN_MAINLCD,
	229	.bpp = 16,
	230	.interface_type = SYS16A,
	231	.clock_divider = 10,
	232	.lcd_cfg = {
	233	.name = "PH240320T",
	234	.xres = 320,
	235	.yres = 240,
	236	.left_margin = 0,
	237	.right_margin = 16,
	238	.hsync_len = 8,
	239	.upper_margin = 1,
	240	.lower_margin = 17,
	241	.vsync_len = 2,
	242	.sync = FB_SYNC_HOR_HIGH_ACT,
	243	},
	244	.board_cfg = {
	245	.setup_sys = migor_lcd_qvga_setup,
	246	},
	247	.sys_bus_cfg = {
	248	.ldmt2r = 0x06000a09,
	249	.ldmt3r = 0x180e3418,
	250	},
	251	}
	252	#endif
	253	};
	254
	255	static struct resource migor_lcdc_resources[] = {
	256	[0] = {
	257	.name = "LCDC",
	258	.start = 0xfe940000, /* P4-only space */
	259	.end = 0xfe941fff,
	260	.flags = IORESOURCE_MEM,
	261	},
	262	};
	263
	264	static struct platform_device migor_lcdc_device = {
	265	.name = "sh_mobile_lcdc_fb",
	266	.num_resources = ARRAY_SIZE(migor_lcdc_resources),
267	.resource = migor_lcdc_resources,
268	.dev = {
269	.platform_data = &sh_mobile_lcdc_info,
270	},
271	};
272
70f784ec MD	273	static struct platform_device *migor_devices[] __initdata = {
70f784ec MD	274	&smc91x_eth_device,
92cfeb61	275	&sh_keysc_device,
8b1285f1	276	&migor_lcdc_device,
b8808786	277	&migor_nor_flash_device,
3c803a9a	278	&migor_nand_flash_device,
70f784ec MD	279	};
70f784ec MD	280
0c6111ec	281	static struct i2c_board_info __initdata migor_i2c_devices[] = {
57795867	282	{
3760f736	283	I2C_BOARD_INFO("rs5c372b", 0x32),
57795867	284	},
67908abf MD	285	{
	286	I2C_BOARD_INFO("migor_ts", 0x51),
	287	.irq = 38, /* IRQ6 */
	288	},
0c6111ec MD	289	};
0c6111ec MD	290
70f784ec MD	291	static int __init migor_devices_setup(void)
70f784ec MD	292	{
6c7d826c	293	clk_always_enable("mstp214"); /* KEYSC */
8b1285f1	294	clk_always_enable("mstp200"); /* LCDC */
6c7d826c	295
0c6111ec MD	296	i2c_register_board_info(0, migor_i2c_devices,
	297	ARRAY_SIZE(migor_i2c_devices));
	298
70f784ec MD	299	return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
	300	}
	301	__initcall(migor_devices_setup);
	302
	303	static void __init migor_setup(char **cmdline_p)
	304	{
92cfeb61 MD	305	/* SMC91C111 - Enable IRQ0 */
	306	ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);
	307
	308	/* KEYSC */
	309	ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
	310	ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
	311	ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
	312	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
	313	ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
3c803a9a MD	314
	315	/* NAND Flash */
	316	ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
	317	ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) \| 0x00000200,
	318	BSC_CS6ABCR);
0c6111ec	319
67908abf MD	320	/* Touch Panel - Enable IRQ6 */
	321	ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
	322	ctrl_outw((ctrl_inw(PORT_PSELA) \| 0x8000), PORT_PSELA);
	323	ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
8b1285f1 MD	324
	325	#ifdef CONFIG_SH_MIGOR_RTA_WVGA
	326	/* LCDC - WVGA - Enable RGB Interface signals */
	327	ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
	328	ctrl_outw(0x0000, PORT_PHCR);
	329	ctrl_outw(0x0000, PORT_PLCR);
	330	ctrl_outw(0x0000, PORT_PMCR);
	331	ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
	332	ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) \| 0x0400, PORT_PSELD);
	333	ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
	334	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
	335	#endif
	336	#ifdef CONFIG_SH_MIGOR_QVGA
	337	/* LCDC - QVGA - Enable SYS Interface signals */
	338	ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
	339	ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) \| 0x0010, PORT_PHCR);
	340	ctrl_outw(0x0000, PORT_PLCR);
	341	ctrl_outw(0x0000, PORT_PMCR);
	342	ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
	343	ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) \| 0x0420, PORT_PSELD);
	344	ctrl_outw(ctrl_inw(PORT_MSELCRB) \| 0x0100, PORT_MSELCRB);
	345	ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
	346	#endif
70f784ec MD	347	}
	348
	349	static struct sh_machine_vector mv_migor __initmv = {
	350	.mv_name = "Migo-R",
	351	.mv_setup = migor_setup,
	352	};