Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
26ff6c11 PM |
2 | * This file contains the functions and defines necessary to modify and |
3 | * use the SuperH page table tree. | |
4 | * | |
1da177e4 | 5 | * Copyright (C) 1999 Niibe Yutaka |
249cfea9 | 6 | * Copyright (C) 2002 - 2007 Paul Mundt |
26ff6c11 PM |
7 | * |
8 | * This file is subject to the terms and conditions of the GNU General | |
9 | * Public License. See the file "COPYING" in the main directory of this | |
10 | * archive for more details. | |
1da177e4 | 11 | */ |
26ff6c11 PM |
12 | #ifndef __ASM_SH_PGTABLE_H |
13 | #define __ASM_SH_PGTABLE_H | |
1da177e4 | 14 | |
782bb5a5 | 15 | #ifdef CONFIG_X2TLB |
e44d6c40 | 16 | #include <asm/pgtable-3level.h> |
5d9b4b19 | 17 | #else |
e44d6c40 | 18 | #include <asm/pgtable-2level.h> |
5d9b4b19 | 19 | #endif |
26ff6c11 | 20 | #include <asm/page.h> |
65d517eb | 21 | #include <asm/mmu.h> |
26ff6c11 | 22 | |
1da177e4 | 23 | #ifndef __ASSEMBLY__ |
1da177e4 LT |
24 | #include <asm/addrspace.h> |
25 | #include <asm/fixmap.h> | |
1da177e4 | 26 | |
1da177e4 LT |
27 | /* |
28 | * ZERO_PAGE is a global shared page that is always zero: used | |
29 | * for zero-mapped memory areas etc.. | |
30 | */ | |
26ff6c11 | 31 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; |
1da177e4 LT |
32 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
33 | ||
34 | #endif /* !__ASSEMBLY__ */ | |
35 | ||
36bcd39d PM |
36 | /* |
37 | * Effective and physical address definitions, to aid with sign | |
38 | * extension. | |
39 | */ | |
40 | #define NEFF 32 | |
41 | #define NEFF_SIGN (1LL << (NEFF - 1)) | |
42 | #define NEFF_MASK (-1LL << NEFF) | |
43 | ||
c7914834 PM |
44 | static inline unsigned long long neff_sign_extend(unsigned long val) |
45 | { | |
46 | unsigned long long extended = val; | |
47 | return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended; | |
48 | } | |
49 | ||
36bcd39d PM |
50 | #ifdef CONFIG_29BIT |
51 | #define NPHYS 29 | |
52 | #else | |
53 | #define NPHYS 32 | |
54 | #endif | |
55 | ||
56 | #define NPHYS_SIGN (1LL << (NPHYS - 1)) | |
57 | #define NPHYS_MASK (-1LL << NPHYS) | |
58 | ||
db2e1fa3 | 59 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) |
1da177e4 LT |
60 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) |
61 | ||
21440cf0 | 62 | /* Entries per level */ |
7a847f81 | 63 | #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) |
21440cf0 | 64 | |
d016bf7e | 65 | #define FIRST_USER_ADDRESS 0UL |
1da177e4 | 66 | |
1f69b6af MF |
67 | #define PHYS_ADDR_MASK29 0x1fffffff |
68 | #define PHYS_ADDR_MASK32 0xffffffff | |
69 | ||
1f69b6af MF |
70 | static inline unsigned long phys_addr_mask(void) |
71 | { | |
72 | /* Is the MMU in 29bit mode? */ | |
73 | if (__in_29bit_mode()) | |
74 | return PHYS_ADDR_MASK29; | |
75 | ||
76 | return PHYS_ADDR_MASK32; | |
77 | } | |
d02b08f6 | 78 | |
1f69b6af | 79 | #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) |
cb700aa4 | 80 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) |
1da177e4 | 81 | |
0468b4bb | 82 | #ifdef CONFIG_SUPERH32 |
f0b859e3 | 83 | #define VMALLOC_START (P3SEG) |
0468b4bb PM |
84 | #else |
85 | #define VMALLOC_START (0xf0000000) | |
86 | #endif | |
1da177e4 LT |
87 | #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) |
88 | ||
249cfea9 PM |
89 | #if defined(CONFIG_SUPERH32) |
90 | #include <asm/pgtable_32.h> | |
21440cf0 | 91 | #else |
249cfea9 | 92 | #include <asm/pgtable_64.h> |
1da177e4 LT |
93 | #endif |
94 | ||
95 | /* | |
21440cf0 PM |
96 | * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page |
97 | * protection for execute, and considers it the same as a read. Also, write | |
98 | * permission implies read permission. This is the closest we can get.. | |
99 | * | |
100 | * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme, | |
101 | * not only supporting separate execute, read, and write bits, but having | |
102 | * completely separate permission bits for user and kernel space. | |
1da177e4 | 103 | */ |
21440cf0 | 104 | /*xwr*/ |
1da177e4 LT |
105 | #define __P000 PAGE_NONE |
106 | #define __P001 PAGE_READONLY | |
107 | #define __P010 PAGE_COPY | |
108 | #define __P011 PAGE_COPY | |
21440cf0 PM |
109 | #define __P100 PAGE_EXECREAD |
110 | #define __P101 PAGE_EXECREAD | |
1da177e4 LT |
111 | #define __P110 PAGE_COPY |
112 | #define __P111 PAGE_COPY | |
113 | ||
114 | #define __S000 PAGE_NONE | |
115 | #define __S001 PAGE_READONLY | |
21440cf0 | 116 | #define __S010 PAGE_WRITEONLY |
1da177e4 | 117 | #define __S011 PAGE_SHARED |
21440cf0 PM |
118 | #define __S100 PAGE_EXECREAD |
119 | #define __S101 PAGE_EXECREAD | |
120 | #define __S110 PAGE_RWX | |
121 | #define __S111 PAGE_RWX | |
1da177e4 | 122 | |
1da177e4 LT |
123 | typedef pte_t *pte_addr_t; |
124 | ||
1da177e4 LT |
125 | #define kern_addr_valid(addr) (1) |
126 | ||
249cfea9 | 127 | #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) |
8c65b4a6 | 128 | |
1da177e4 | 129 | /* |
2a5eacca | 130 | * Initialise the page table caches |
1da177e4 | 131 | */ |
2a5eacca | 132 | extern void pgtable_cache_init(void); |
1da177e4 | 133 | |
249cfea9 | 134 | struct vm_area_struct; |
8f82f0c7 | 135 | struct mm_struct; |
9cef7492 PM |
136 | |
137 | extern void __update_cache(struct vm_area_struct *vma, | |
138 | unsigned long address, pte_t pte); | |
139 | extern void __update_tlb(struct vm_area_struct *vma, | |
140 | unsigned long address, pte_t pte); | |
141 | ||
142 | static inline void | |
4b3073e1 | 143 | update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) |
9cef7492 | 144 | { |
4b3073e1 | 145 | pte_t pte = *ptep; |
9cef7492 PM |
146 | __update_cache(vma, address, pte); |
147 | __update_tlb(vma, address, pte); | |
148 | } | |
149 | ||
21440cf0 PM |
150 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; |
151 | extern void paging_init(void); | |
9acb98fb PM |
152 | extern void page_table_range_init(unsigned long start, unsigned long end, |
153 | pgd_t *pgd); | |
21440cf0 | 154 | |
ee1acbfa PM |
155 | /* arch/sh/mm/mmap.c */ |
156 | #define HAVE_ARCH_UNMAPPED_AREA | |
157 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | |
158 | ||
a16382ce PM |
159 | #define __HAVE_ARCH_PTE_SPECIAL |
160 | ||
1da177e4 LT |
161 | #include <asm-generic/pgtable.h> |
162 | ||
249cfea9 | 163 | #endif /* __ASM_SH_PGTABLE_H */ |