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af3c7dfe PM |
1 | #ifndef __ASM_SH_PROCESSOR_64_H |
2 | #define __ASM_SH_PROCESSOR_64_H | |
1da177e4 LT |
3 | |
4 | /* | |
af3c7dfe | 5 | * include/asm-sh/processor_64.h |
1da177e4 LT |
6 | * |
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | |
8 | * Copyright (C) 2003 Paul Mundt | |
9 | * Copyright (C) 2004 Richard Curnow | |
10 | * | |
af3c7dfe PM |
11 | * This file is subject to the terms and conditions of the GNU General Public |
12 | * License. See the file "COPYING" in the main directory of this archive | |
13 | * for more details. | |
1da177e4 | 14 | */ |
1da177e4 LT |
15 | #ifndef __ASSEMBLY__ |
16 | ||
af3c7dfe PM |
17 | #include <linux/compiler.h> |
18 | #include <asm/page.h> | |
1da177e4 | 19 | #include <asm/types.h> |
256b22ca | 20 | #include <asm/ptrace.h> |
f15cbe6f | 21 | #include <cpu/registers.h> |
1da177e4 LT |
22 | |
23 | /* | |
24 | * Default implementation of macro that returns current | |
25 | * instruction pointer ("program counter"). | |
26 | */ | |
27 | #define current_text_addr() ({ \ | |
28 | void *pc; \ | |
29 | unsigned long long __dummy = 0; \ | |
30 | __asm__("gettr tr0, %1\n\t" \ | |
31 | "pta 4, tr0\n\t" \ | |
32 | "gettr tr0, %0\n\t" \ | |
33 | "ptabs %1, tr0\n\t" \ | |
34 | :"=r" (pc), "=r" (__dummy) \ | |
35 | : "1" (__dummy)); \ | |
36 | pc; }) | |
37 | ||
1da177e4 LT |
38 | #endif |
39 | ||
40 | /* | |
41 | * User space process size: 2GB - 4k. | |
42 | */ | |
43 | #define TASK_SIZE 0x7ffff000UL | |
44 | ||
922a70d3 DH |
45 | #define STACK_TOP TASK_SIZE |
46 | #define STACK_TOP_MAX STACK_TOP | |
47 | ||
1da177e4 LT |
48 | /* This decides where the kernel will search for a free chunk of vm |
49 | * space during mmap's. | |
50 | */ | |
51 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | |
52 | ||
53 | /* | |
54 | * Bit of SR register | |
55 | * | |
56 | * FD-bit: | |
57 | * When it's set, it means the processor doesn't have right to use FPU, | |
58 | * and it results exception when the floating operation is executed. | |
59 | * | |
60 | * IMASK-bit: | |
61 | * Interrupt level mask | |
62 | * | |
63 | * STEP-bit: | |
64 | * Single step bit | |
65 | * | |
66 | */ | |
1da177e4 LT |
67 | #if defined(CONFIG_SH64_SR_WATCH) |
68 | #define SR_MMU 0x84000000 | |
69 | #else | |
70 | #define SR_MMU 0x80000000 | |
71 | #endif | |
72 | ||
73 | #define SR_IMASK 0x000000f0 | |
9bbafce2 | 74 | #define SR_FD 0x00008000 |
1da177e4 LT |
75 | #define SR_SSTEP 0x08000000 |
76 | ||
77 | #ifndef __ASSEMBLY__ | |
78 | ||
79 | /* | |
80 | * FPU structure and data : require 8-byte alignment as we need to access it | |
81 | with fld.p, fst.p | |
82 | */ | |
83 | ||
84 | struct sh_fpu_hard_struct { | |
85 | unsigned long fp_regs[64]; | |
86 | unsigned int fpscr; | |
87 | /* long status; * software status information */ | |
88 | }; | |
89 | ||
90 | #if 0 | |
91 | /* Dummy fpu emulator */ | |
92 | struct sh_fpu_soft_struct { | |
93 | unsigned long long fp_regs[32]; | |
94 | unsigned int fpscr; | |
95 | unsigned char lookahead; | |
96 | unsigned long entry_pc; | |
97 | }; | |
98 | #endif | |
99 | ||
100 | union sh_fpu_union { | |
101 | struct sh_fpu_hard_struct hard; | |
102 | /* 'hard' itself only produces 32 bit alignment, yet we need | |
103 | to access it using 64 bit load/store as well. */ | |
104 | unsigned long long alignment_dummy; | |
105 | }; | |
106 | ||
107 | struct thread_struct { | |
108 | unsigned long sp; | |
109 | unsigned long pc; | |
110 | /* This stores the address of the pt_regs built during a context | |
111 | switch, or of the register save area built for a kernel mode | |
112 | exception. It is used for backtracing the stack of a sleeping task | |
113 | or one that traps in kernel mode. */ | |
114 | struct pt_regs *kregs; | |
115 | /* This stores the address of the pt_regs constructed on entry from | |
116 | user mode. It is a fixed value over the lifetime of a process, or | |
117 | NULL for a kernel thread. */ | |
118 | struct pt_regs *uregs; | |
119 | ||
120 | unsigned long trap_no, error_code; | |
121 | unsigned long address; | |
122 | /* Hardware debugging registers may come here */ | |
123 | ||
124 | /* floating point info */ | |
125 | union sh_fpu_union fpu; | |
126 | }; | |
127 | ||
128 | #define INIT_MMAP \ | |
129 | { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } | |
130 | ||
1da177e4 LT |
131 | #define INIT_THREAD { \ |
132 | .sp = sizeof(init_stack) + \ | |
133 | (long) &init_stack, \ | |
134 | .pc = 0, \ | |
135 | .kregs = &fake_swapper_regs, \ | |
136 | .uregs = NULL, \ | |
137 | .trap_no = 0, \ | |
138 | .error_code = 0, \ | |
139 | .address = 0, \ | |
140 | .fpu = { { { 0, } }, } \ | |
141 | } | |
142 | ||
143 | /* | |
144 | * Do necessary setup to start up a newly executed thread. | |
145 | */ | |
146 | #define SR_USER (SR_MMU | SR_FD) | |
147 | ||
dc66ff62 | 148 | #define start_thread(_regs, new_pc, new_sp) \ |
af3c7dfe | 149 | set_fs(USER_DS); \ |
dc66ff62 RK |
150 | _regs->sr = SR_USER; /* User mode. */ \ |
151 | _regs->pc = new_pc - 4; /* Compensate syscall exit */ \ | |
152 | _regs->pc |= 1; /* Set SHmedia ! */ \ | |
153 | _regs->regs[18] = 0; \ | |
154 | _regs->regs[15] = new_sp | |
1da177e4 LT |
155 | |
156 | /* Forward declaration, a strange C thing */ | |
157 | struct task_struct; | |
158 | struct mm_struct; | |
159 | ||
160 | /* Free all resources held by a thread. */ | |
161 | extern void release_thread(struct task_struct *); | |
162 | /* | |
163 | * create a kernel thread without removing it from tasklists | |
164 | */ | |
165 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | |
166 | ||
167 | ||
168 | /* Copy and release all segment info associated with a VM */ | |
169 | #define copy_segments(p, mm) do { } while (0) | |
170 | #define release_segments(mm) do { } while (0) | |
171 | #define forget_segments() do { } while (0) | |
172 | #define prepare_to_copy(tsk) do { } while (0) | |
173 | /* | |
174 | * FPU lazy state save handling. | |
175 | */ | |
176 | ||
256b22ca | 177 | static inline void disable_fpu(void) |
1da177e4 LT |
178 | { |
179 | unsigned long long __dummy; | |
180 | ||
181 | /* Set FD flag in SR */ | |
182 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | |
183 | "or %0, %1, %0\n\t" | |
184 | "putcon %0, " __SR "\n\t" | |
185 | : "=&r" (__dummy) | |
186 | : "r" (SR_FD)); | |
187 | } | |
188 | ||
256b22ca | 189 | static inline void enable_fpu(void) |
1da177e4 LT |
190 | { |
191 | unsigned long long __dummy; | |
192 | ||
193 | /* Clear out FD flag in SR */ | |
194 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | |
195 | "and %0, %1, %0\n\t" | |
196 | "putcon %0, " __SR "\n\t" | |
197 | : "=&r" (__dummy) | |
198 | : "r" (~SR_FD)); | |
199 | } | |
200 | ||
201 | /* Round to nearest, no exceptions on inexact, overflow, underflow, | |
202 | zero-divide, invalid. Configure option for whether to flush denorms to | |
203 | zero, or except if a denorm is encountered. */ | |
204 | #if defined(CONFIG_SH64_FPU_DENORM_FLUSH) | |
205 | #define FPSCR_INIT 0x00040000 | |
206 | #else | |
207 | #define FPSCR_INIT 0x00000000 | |
208 | #endif | |
209 | ||
ffd25eb6 | 210 | #ifdef CONFIG_SH_FPU |
1da177e4 LT |
211 | /* Initialise the FP state of a task */ |
212 | void fpinit(struct sh_fpu_hard_struct *fpregs); | |
ffd25eb6 | 213 | #else |
ffd25eb6 PM |
214 | #define fpinit(fpregs) do { } while (0) |
215 | #endif | |
1da177e4 LT |
216 | |
217 | extern struct task_struct *last_task_used_math; | |
218 | ||
219 | /* | |
220 | * Return saved PC of a blocked thread. | |
221 | */ | |
222 | #define thread_saved_pc(tsk) (tsk->thread.pc) | |
223 | ||
224 | extern unsigned long get_wchan(struct task_struct *p); | |
225 | ||
226 | #define KSTK_EIP(tsk) ((tsk)->thread.pc) | |
227 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) | |
228 | ||
dc66ff62 | 229 | #define user_stack_pointer(_regs) ((_regs)->regs[15]) |
9996b42a | 230 | |
1da177e4 | 231 | #endif /* __ASSEMBLY__ */ |
af3c7dfe | 232 | #endif /* __ASM_SH_PROCESSOR_64_H */ |