Commit | Line | Data |
---|---|---|
711fa809 | 1 | /* |
11c19656 | 2 | * arch/sh/kernel/setup.c |
1da177e4 | 3 | * |
1da177e4 | 4 | * This file handles the architecture-dependent parts of initialization |
11c19656 PM |
5 | * |
6 | * Copyright (C) 1999 Niibe Yutaka | |
01066625 | 7 | * Copyright (C) 2002 - 2007 Paul Mundt |
1da177e4 | 8 | */ |
894673ee | 9 | #include <linux/screen_info.h> |
1da177e4 LT |
10 | #include <linux/ioport.h> |
11 | #include <linux/init.h> | |
12 | #include <linux/initrd.h> | |
13 | #include <linux/bootmem.h> | |
14 | #include <linux/console.h> | |
15 | #include <linux/seq_file.h> | |
16 | #include <linux/root_dev.h> | |
17 | #include <linux/utsname.h> | |
01066625 | 18 | #include <linux/nodemask.h> |
1da177e4 | 19 | #include <linux/cpu.h> |
22a9835c | 20 | #include <linux/pfn.h> |
711fa809 | 21 | #include <linux/fs.h> |
01066625 | 22 | #include <linux/mm.h> |
4d5ade5b | 23 | #include <linux/kexec.h> |
98d877c4 | 24 | #include <linux/module.h> |
0016a126 | 25 | #include <linux/smp.h> |
1da177e4 LT |
26 | #include <asm/uaccess.h> |
27 | #include <asm/io.h> | |
7a302a96 | 28 | #include <asm/page.h> |
1da177e4 LT |
29 | #include <asm/sections.h> |
30 | #include <asm/irq.h> | |
31 | #include <asm/setup.h> | |
de02797a | 32 | #include <asm/clock.h> |
01066625 | 33 | #include <asm/mmu_context.h> |
1da177e4 | 34 | |
1da177e4 | 35 | extern void * __rd_start, * __rd_end; |
fa5da2f7 | 36 | |
1da177e4 LT |
37 | /* |
38 | * Machine setup.. | |
39 | */ | |
40 | ||
41 | /* | |
42 | * Initialize loops_per_jiffy as 10000000 (1000MIPS). | |
43 | * This value will be used at the very early stage of serial setup. | |
44 | * The bigger value means no problem. | |
45 | */ | |
2d4a73d5 PM |
46 | struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { |
47 | [0] = { | |
48 | .type = CPU_SH_NONE, | |
49 | .loops_per_jiffy = 10000000, | |
50 | }, | |
51 | }; | |
52 | EXPORT_SYMBOL(cpu_data); | |
82f81f47 PM |
53 | |
54 | /* | |
55 | * The machine vector. First entry in .machvec.init, or clobbered by | |
56 | * sh_mv= on the command line, prior to .machvec.init teardown. | |
57 | */ | |
fd8f20e8 | 58 | struct sh_machine_vector sh_mv = { .mv_name = "generic", }; |
82f81f47 | 59 | |
2c7834a6 | 60 | #ifdef CONFIG_VT |
1da177e4 | 61 | struct screen_info screen_info; |
2c7834a6 | 62 | #endif |
1da177e4 | 63 | |
1da177e4 LT |
64 | extern int root_mountflags; |
65 | ||
1da177e4 LT |
66 | /* |
67 | * This is set up by the setup-routine at boot-time | |
68 | */ | |
69 | #define PARAM ((unsigned char *)empty_zero_page) | |
70 | ||
71 | #define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) | |
72 | #define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) | |
73 | #define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008)) | |
74 | #define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c)) | |
75 | #define INITRD_START (*(unsigned long *) (PARAM+0x010)) | |
76 | #define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) | |
77 | /* ... */ | |
78 | #define COMMAND_LINE ((char *) (PARAM+0x100)) | |
79 | ||
65463b73 | 80 | #define RAMDISK_IMAGE_START_MASK 0x07FF |
1da177e4 | 81 | #define RAMDISK_PROMPT_FLAG 0x8000 |
65463b73 | 82 | #define RAMDISK_LOAD_FLAG 0x4000 |
1da177e4 | 83 | |
53c82622 | 84 | static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, }; |
1da177e4 | 85 | |
2c7834a6 PM |
86 | static struct resource code_resource = { .name = "Kernel code", }; |
87 | static struct resource data_resource = { .name = "Kernel data", }; | |
1da177e4 | 88 | |
98d877c4 PM |
89 | unsigned long memory_start; |
90 | EXPORT_SYMBOL(memory_start); | |
91 | ||
92 | unsigned long memory_end; | |
93 | EXPORT_SYMBOL(memory_end); | |
1da177e4 | 94 | |
9655ad03 | 95 | static int __init early_parse_mem(char *p) |
1da177e4 | 96 | { |
9655ad03 | 97 | unsigned long size; |
1da177e4 LT |
98 | |
99 | memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START; | |
9655ad03 PM |
100 | size = memparse(p, &p); |
101 | memory_end = memory_start + size; | |
2c7834a6 | 102 | |
1da177e4 LT |
103 | return 0; |
104 | } | |
9655ad03 | 105 | early_param("mem", early_parse_mem); |
1da177e4 | 106 | |
01066625 PM |
107 | /* |
108 | * Register fully available low RAM pages with the bootmem allocator. | |
109 | */ | |
110 | static void __init register_bootmem_low_pages(void) | |
1da177e4 | 111 | { |
01066625 | 112 | unsigned long curr_pfn, last_pfn, pages; |
b641fe01 | 113 | |
1da177e4 | 114 | /* |
01066625 | 115 | * We are rounding up the start address of usable memory: |
1da177e4 | 116 | */ |
01066625 | 117 | curr_pfn = PFN_UP(__MEMORY_START); |
1da177e4 LT |
118 | |
119 | /* | |
01066625 | 120 | * ... and at the end of the usable range downwards: |
1da177e4 | 121 | */ |
01066625 | 122 | last_pfn = PFN_DOWN(__pa(memory_end)); |
1da177e4 | 123 | |
01066625 PM |
124 | if (last_pfn > max_low_pfn) |
125 | last_pfn = max_low_pfn; | |
126 | ||
127 | pages = last_pfn - curr_pfn; | |
128 | free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages)); | |
129 | } | |
130 | ||
2826fa61 | 131 | void __init setup_bootmem_allocator(unsigned long free_pfn) |
01066625 PM |
132 | { |
133 | unsigned long bootmap_size; | |
1da177e4 LT |
134 | |
135 | /* | |
136 | * Find a proper area for the bootmem bitmap. After this | |
137 | * bootstrap step all allocations (until the page allocator | |
138 | * is intact) must be done via bootmem_alloc(). | |
139 | */ | |
2826fa61 | 140 | bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, |
01066625 | 141 | min_low_pfn, max_low_pfn); |
1da177e4 | 142 | |
dfbb9042 | 143 | add_active_range(0, min_low_pfn, max_low_pfn); |
01066625 | 144 | register_bootmem_low_pages(); |
1da177e4 | 145 | |
01066625 | 146 | node_set_online(0); |
b641fe01 | 147 | |
1da177e4 LT |
148 | /* |
149 | * Reserve the kernel text and | |
150 | * Reserve the bootmem bitmap. We do this in two steps (first step | |
151 | * was init_bootmem()), because this catches the (definitely buggy) | |
152 | * case of us accidentally initializing the bootmem allocator with | |
153 | * an invalid RAM area. | |
154 | */ | |
01066625 | 155 | reserve_bootmem(__MEMORY_START+PAGE_SIZE, |
2826fa61 | 156 | (PFN_PHYS(free_pfn)+bootmap_size+PAGE_SIZE-1)-__MEMORY_START); |
1da177e4 LT |
157 | |
158 | /* | |
159 | * reserve physical page 0 - it's a special BIOS page on many boxes, | |
160 | * enabling clean reboots, SMP operation, laptop functions. | |
161 | */ | |
01066625 | 162 | reserve_bootmem(__MEMORY_START, PAGE_SIZE); |
1da177e4 | 163 | |
2826fa61 PM |
164 | sparse_memory_present_with_active_regions(0); |
165 | ||
1da177e4 | 166 | #ifdef CONFIG_BLK_DEV_INITRD |
65463b73 PM |
167 | ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); |
168 | if (&__rd_start != &__rd_end) { | |
1da177e4 | 169 | LOADER_TYPE = 1; |
41504c39 PM |
170 | INITRD_START = PHYSADDR((unsigned long)&__rd_start) - |
171 | __MEMORY_START; | |
172 | INITRD_SIZE = (unsigned long)&__rd_end - | |
173 | (unsigned long)&__rd_start; | |
65463b73 | 174 | } |
1da177e4 LT |
175 | |
176 | if (LOADER_TYPE && INITRD_START) { | |
177 | if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) { | |
01066625 PM |
178 | reserve_bootmem(INITRD_START + __MEMORY_START, |
179 | INITRD_SIZE); | |
41504c39 PM |
180 | initrd_start = INITRD_START + PAGE_OFFSET + |
181 | __MEMORY_START; | |
1da177e4 LT |
182 | initrd_end = initrd_start + INITRD_SIZE; |
183 | } else { | |
184 | printk("initrd extends beyond end of memory " | |
185 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", | |
186 | INITRD_START + INITRD_SIZE, | |
187 | max_low_pfn << PAGE_SHIFT); | |
188 | initrd_start = 0; | |
189 | } | |
190 | } | |
191 | #endif | |
4d5ade5b PM |
192 | #ifdef CONFIG_KEXEC |
193 | if (crashk_res.start != crashk_res.end) | |
194 | reserve_bootmem(crashk_res.start, | |
195 | crashk_res.end - crashk_res.start + 1); | |
196 | #endif | |
01066625 PM |
197 | } |
198 | ||
199 | #ifndef CONFIG_NEED_MULTIPLE_NODES | |
200 | static void __init setup_memory(void) | |
201 | { | |
202 | unsigned long start_pfn; | |
203 | ||
204 | /* | |
205 | * Partially used pages are not usable - thus | |
206 | * we are rounding upwards: | |
207 | */ | |
208 | start_pfn = PFN_UP(__pa(_end)); | |
209 | setup_bootmem_allocator(start_pfn); | |
210 | } | |
211 | #else | |
212 | extern void __init setup_memory(void); | |
213 | #endif | |
214 | ||
215 | void __init setup_arch(char **cmdline_p) | |
216 | { | |
217 | enable_mmu(); | |
218 | ||
01066625 PM |
219 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); |
220 | ||
221 | #ifdef CONFIG_BLK_DEV_RAM | |
222 | rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; | |
223 | rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); | |
224 | rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); | |
225 | #endif | |
226 | ||
227 | if (!MOUNT_ROOT_RDONLY) | |
228 | root_mountflags &= ~MS_RDONLY; | |
229 | init_mm.start_code = (unsigned long) _text; | |
230 | init_mm.end_code = (unsigned long) _etext; | |
231 | init_mm.end_data = (unsigned long) _edata; | |
232 | init_mm.brk = (unsigned long) _end; | |
233 | ||
234 | code_resource.start = virt_to_phys(_text); | |
235 | code_resource.end = virt_to_phys(_etext)-1; | |
236 | data_resource.start = virt_to_phys(_etext); | |
237 | data_resource.end = virt_to_phys(_edata)-1; | |
238 | ||
9655ad03 PM |
239 | memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START; |
240 | memory_end = memory_start + __MEMORY_SIZE; | |
241 | ||
ba36197c PM |
242 | #ifdef CONFIG_CMDLINE_BOOL |
243 | strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); | |
244 | #else | |
245 | strlcpy(command_line, COMMAND_LINE, sizeof(command_line)); | |
246 | #endif | |
9655ad03 | 247 | |
ba36197c PM |
248 | /* Save unparsed command line copy for /proc/cmdline */ |
249 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); | |
9655ad03 PM |
250 | *cmdline_p = command_line; |
251 | ||
01066625 PM |
252 | parse_early_param(); |
253 | ||
9655ad03 | 254 | sh_mv_setup(); |
01066625 PM |
255 | |
256 | /* | |
257 | * Find the highest page frame number we have available | |
258 | */ | |
259 | max_pfn = PFN_DOWN(__pa(memory_end)); | |
260 | ||
261 | /* | |
262 | * Determine low and high memory ranges: | |
263 | */ | |
264 | max_low_pfn = max_pfn; | |
265 | min_low_pfn = __MEMORY_START >> PAGE_SHIFT; | |
266 | ||
267 | nodes_clear(node_online_map); | |
dfbb9042 PM |
268 | |
269 | /* Setup bootmem with available RAM */ | |
01066625 | 270 | setup_memory(); |
01066625 | 271 | sparse_init(); |
1da177e4 LT |
272 | |
273 | #ifdef CONFIG_DUMMY_CONSOLE | |
274 | conswitchp = &dummy_con; | |
275 | #endif | |
276 | ||
277 | /* Perform the machine specific initialisation */ | |
2c7834a6 PM |
278 | if (likely(sh_mv.mv_setup)) |
279 | sh_mv.mv_setup(cmdline_p); | |
1da177e4 | 280 | |
dfbb9042 | 281 | paging_init(); |
0016a126 PM |
282 | |
283 | #ifdef CONFIG_SMP | |
284 | plat_smp_setup(); | |
285 | #endif | |
dfbb9042 | 286 | } |
1da177e4 | 287 | |
1da177e4 | 288 | static const char *cpu_name[] = { |
b552c7e8 | 289 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", |
e5723e0e PM |
290 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", |
291 | [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", | |
292 | [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", | |
3ea6bc3d | 293 | [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", |
e5723e0e PM |
294 | [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", |
295 | [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", | |
296 | [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", | |
870e8a24 | 297 | [CPU_SH7760] = "SH7760", |
e5723e0e PM |
298 | [CPU_ST40RA] = "ST40RA", [CPU_ST40GX1] = "ST40GX1", |
299 | [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", | |
300 | [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780", | |
301 | [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343", | |
41504c39 | 302 | [CPU_SH7785] = "SH7785", [CPU_SH7722] = "SH7722", |
2b1bd1ac | 303 | [CPU_SHX3] = "SH-X3", [CPU_SH_NONE] = "Unknown" |
1da177e4 LT |
304 | }; |
305 | ||
11c19656 | 306 | const char *get_cpu_subtype(struct sh_cpuinfo *c) |
1da177e4 | 307 | { |
11c19656 | 308 | return cpu_name[c->type]; |
1da177e4 LT |
309 | } |
310 | ||
311 | #ifdef CONFIG_PROC_FS | |
2220d164 | 312 | /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ |
1da177e4 | 313 | static const char *cpu_flags[] = { |
2220d164 | 314 | "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", |
074f98df | 315 | "ptea", "llsc", "l2", "op32", NULL |
1da177e4 LT |
316 | }; |
317 | ||
11c19656 | 318 | static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) |
1da177e4 LT |
319 | { |
320 | unsigned long i; | |
321 | ||
322 | seq_printf(m, "cpu flags\t:"); | |
323 | ||
11c19656 | 324 | if (!c->flags) { |
1da177e4 LT |
325 | seq_printf(m, " %s\n", cpu_flags[0]); |
326 | return; | |
327 | } | |
328 | ||
de02797a | 329 | for (i = 0; cpu_flags[i]; i++) |
11c19656 | 330 | if ((c->flags & (1 << i))) |
1da177e4 LT |
331 | seq_printf(m, " %s", cpu_flags[i+1]); |
332 | ||
333 | seq_printf(m, "\n"); | |
334 | } | |
335 | ||
2c7834a6 PM |
336 | static void show_cacheinfo(struct seq_file *m, const char *type, |
337 | struct cache_info info) | |
1da177e4 LT |
338 | { |
339 | unsigned int cache_size; | |
340 | ||
341 | cache_size = info.ways * info.sets * info.linesz; | |
342 | ||
de02797a PM |
343 | seq_printf(m, "%s size\t: %2dKiB (%d-way)\n", |
344 | type, cache_size >> 10, info.ways); | |
1da177e4 LT |
345 | } |
346 | ||
347 | /* | |
348 | * Get CPU information for use by the procfs. | |
349 | */ | |
350 | static int show_cpuinfo(struct seq_file *m, void *v) | |
351 | { | |
11c19656 PM |
352 | struct sh_cpuinfo *c = v; |
353 | unsigned int cpu = c - cpu_data; | |
354 | ||
355 | if (!cpu_online(cpu)) | |
356 | return 0; | |
1da177e4 | 357 | |
11c19656 | 358 | if (cpu == 0) |
1da177e4 LT |
359 | seq_printf(m, "machine\t\t: %s\n", get_system_type()); |
360 | ||
361 | seq_printf(m, "processor\t: %d\n", cpu); | |
96b644bd | 362 | seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); |
11c19656 | 363 | seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); |
1da177e4 | 364 | |
11c19656 | 365 | show_cpuflags(m, c); |
1da177e4 LT |
366 | |
367 | seq_printf(m, "cache type\t: "); | |
368 | ||
369 | /* | |
370 | * Check for what type of cache we have, we support both the | |
371 | * unified cache on the SH-2 and SH-3, as well as the harvard | |
372 | * style cache on the SH-4. | |
373 | */ | |
11c19656 | 374 | if (c->icache.flags & SH_CACHE_COMBINED) { |
1da177e4 | 375 | seq_printf(m, "unified\n"); |
11c19656 | 376 | show_cacheinfo(m, "cache", c->icache); |
1da177e4 LT |
377 | } else { |
378 | seq_printf(m, "split (harvard)\n"); | |
11c19656 PM |
379 | show_cacheinfo(m, "icache", c->icache); |
380 | show_cacheinfo(m, "dcache", c->dcache); | |
1da177e4 LT |
381 | } |
382 | ||
72c35543 | 383 | /* Optional secondary cache */ |
11c19656 PM |
384 | if (c->flags & CPU_HAS_L2_CACHE) |
385 | show_cacheinfo(m, "scache", c->scache); | |
72c35543 | 386 | |
1da177e4 | 387 | seq_printf(m, "bogomips\t: %lu.%02lu\n", |
11c19656 PM |
388 | c->loops_per_jiffy/(500000/HZ), |
389 | (c->loops_per_jiffy/(5000/HZ)) % 100); | |
1da177e4 | 390 | |
db62e5bd | 391 | return 0; |
1da177e4 LT |
392 | } |
393 | ||
1da177e4 LT |
394 | static void *c_start(struct seq_file *m, loff_t *pos) |
395 | { | |
396 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | |
397 | } | |
398 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
399 | { | |
400 | ++*pos; | |
401 | return c_start(m, pos); | |
402 | } | |
403 | static void c_stop(struct seq_file *m, void *v) | |
404 | { | |
405 | } | |
406 | struct seq_operations cpuinfo_op = { | |
407 | .start = c_start, | |
408 | .next = c_next, | |
409 | .stop = c_stop, | |
410 | .show = show_cpuinfo, | |
411 | }; | |
412 | #endif /* CONFIG_PROC_FS */ |