Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/sh/mm/cache-sh2.c | |
3 | * | |
4 | * Copyright (C) 2002 Paul Mundt | |
cce2d453 | 5 | * Copyright (C) 2008 Yoshinori Sato |
1da177e4 LT |
6 | * |
7 | * Released under the terms of the GNU GPL v2.0. | |
8 | */ | |
9d4436a6 | 9 | |
1da177e4 LT |
10 | #include <linux/init.h> |
11 | #include <linux/mm.h> | |
12 | ||
13 | #include <asm/cache.h> | |
14 | #include <asm/addrspace.h> | |
15 | #include <asm/processor.h> | |
16 | #include <asm/cacheflush.h> | |
17 | #include <asm/io.h> | |
18 | ||
109b44a8 | 19 | static void sh2__flush_wback_region(void *start, int size) |
1da177e4 | 20 | { |
9d4436a6 YS |
21 | unsigned long v; |
22 | unsigned long begin, end; | |
23 | ||
24 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | |
25 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | |
26 | & ~(L1_CACHE_BYTES-1); | |
27 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | |
cce2d453 YS |
28 | unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); |
29 | int way; | |
30 | for (way = 0; way < 4; way++) { | |
9d56dd3b | 31 | unsigned long data = __raw_readl(addr | (way << 12)); |
cce2d453 YS |
32 | if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) { |
33 | data &= ~SH_CACHE_UPDATED; | |
9d56dd3b | 34 | __raw_writel(data, addr | (way << 12)); |
cce2d453 YS |
35 | } |
36 | } | |
9d4436a6 YS |
37 | } |
38 | } | |
39 | ||
109b44a8 | 40 | static void sh2__flush_purge_region(void *start, int size) |
9d4436a6 YS |
41 | { |
42 | unsigned long v; | |
43 | unsigned long begin, end; | |
44 | ||
45 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | |
46 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | |
47 | & ~(L1_CACHE_BYTES-1); | |
cce2d453 YS |
48 | |
49 | for (v = begin; v < end; v+=L1_CACHE_BYTES) | |
9d56dd3b | 50 | __raw_writel((v & CACHE_PHYSADDR_MASK), |
cce2d453 | 51 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); |
9d4436a6 YS |
52 | } |
53 | ||
109b44a8 | 54 | static void sh2__flush_invalidate_region(void *start, int size) |
9d4436a6 | 55 | { |
cce2d453 YS |
56 | #ifdef CONFIG_CACHE_WRITEBACK |
57 | /* | |
58 | * SH-2 does not support individual line invalidation, only a | |
59 | * global invalidate. | |
60 | */ | |
61 | unsigned long ccr; | |
62 | unsigned long flags; | |
63 | local_irq_save(flags); | |
64 | jump_to_uncached(); | |
65 | ||
9d56dd3b | 66 | ccr = __raw_readl(CCR); |
cce2d453 | 67 | ccr |= CCR_CACHE_INVALIDATE; |
9d56dd3b | 68 | __raw_writel(ccr, CCR); |
cce2d453 YS |
69 | |
70 | back_to_cached(); | |
71 | local_irq_restore(flags); | |
72 | #else | |
9d4436a6 YS |
73 | unsigned long v; |
74 | unsigned long begin, end; | |
75 | ||
76 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | |
77 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | |
78 | & ~(L1_CACHE_BYTES-1); | |
1da177e4 | 79 | |
cce2d453 | 80 | for (v = begin; v < end; v+=L1_CACHE_BYTES) |
9d56dd3b | 81 | __raw_writel((v & CACHE_PHYSADDR_MASK), |
cce2d453 YS |
82 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); |
83 | #endif | |
84 | } | |
109b44a8 PM |
85 | |
86 | void __init sh2_cache_init(void) | |
87 | { | |
88 | __flush_wback_region = sh2__flush_wback_region; | |
89 | __flush_purge_region = sh2__flush_purge_region; | |
90 | __flush_invalidate_region = sh2__flush_invalidate_region; | |
91 | } |