Commit | Line | Data |
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1da177e4 | 1 | /* |
811d50cb | 2 | * The SH64 TLB miss. |
1da177e4 LT |
3 | * |
4 | * Original code from fault.c | |
5 | * Copyright (C) 2000, 2001 Paolo Alberelli | |
6 | * | |
7 | * Fast PTE->TLB refill path | |
8 | * Copyright (C) 2003 Richard.Curnow@superh.com | |
9 | * | |
10 | * IMPORTANT NOTES : | |
811d50cb PM |
11 | * The do_fast_page_fault function is called from a context in entry.S |
12 | * where very few registers have been saved. In particular, the code in | |
13 | * this file must be compiled not to use ANY caller-save registers that | |
14 | * are not part of the restricted save set. Also, it means that code in | |
15 | * this file must not make calls to functions elsewhere in the kernel, or | |
16 | * else the excepting context will see corruption in its caller-save | |
17 | * registers. Plus, the entry.S save area is non-reentrant, so this code | |
18 | * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic | |
19 | * on any exception. | |
1da177e4 | 20 | * |
811d50cb PM |
21 | * This file is subject to the terms and conditions of the GNU General Public |
22 | * License. See the file "COPYING" in the main directory of this archive | |
23 | * for more details. | |
1da177e4 | 24 | */ |
1da177e4 LT |
25 | #include <linux/signal.h> |
26 | #include <linux/sched.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/string.h> | |
30 | #include <linux/types.h> | |
31 | #include <linux/ptrace.h> | |
32 | #include <linux/mman.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/smp.h> | |
1da177e4 | 35 | #include <linux/interrupt.h> |
392c3822 | 36 | #include <linux/kprobes.h> |
1da177e4 LT |
37 | #include <asm/tlb.h> |
38 | #include <asm/io.h> | |
39 | #include <asm/uaccess.h> | |
40 | #include <asm/pgalloc.h> | |
41 | #include <asm/mmu_context.h> | |
1da177e4 | 42 | |
392c3822 | 43 | static int handle_tlbmiss(unsigned long long protection_flags, |
811d50cb | 44 | unsigned long address) |
1da177e4 | 45 | { |
392c3822 | 46 | pgd_t *pgd; |
811d50cb | 47 | pud_t *pud; |
1da177e4 LT |
48 | pmd_t *pmd; |
49 | pte_t *pte; | |
50 | pte_t entry; | |
51 | ||
392c3822 PM |
52 | if (is_vmalloc_addr((void *)address)) { |
53 | pgd = pgd_offset_k(address); | |
54 | } else { | |
55 | if (unlikely(address >= TASK_SIZE || !current->mm)) | |
56 | return 1; | |
811d50cb | 57 | |
392c3822 PM |
58 | pgd = pgd_offset(current->mm, address); |
59 | } | |
1da177e4 | 60 | |
392c3822 | 61 | pud = pud_offset(pgd, address); |
811d50cb | 62 | if (pud_none(*pud) || !pud_present(*pud)) |
4de51856 | 63 | return 1; |
811d50cb PM |
64 | |
65 | pmd = pmd_offset(pud, address); | |
66 | if (pmd_none(*pmd) || !pmd_present(*pmd)) | |
4de51856 | 67 | return 1; |
811d50cb | 68 | |
1da177e4 LT |
69 | pte = pte_offset_kernel(pmd, address); |
70 | entry = *pte; | |
811d50cb | 71 | if (pte_none(entry) || !pte_present(entry)) |
4de51856 | 72 | return 1; |
1da177e4 | 73 | |
811d50cb PM |
74 | /* |
75 | * If the page doesn't have sufficient protection bits set to | |
76 | * service the kind of fault being handled, there's not much | |
77 | * point doing the TLB refill. Punt the fault to the general | |
78 | * handler. | |
79 | */ | |
80 | if ((pte_val(entry) & protection_flags) != protection_flags) | |
4de51856 | 81 | return 1; |
1da177e4 | 82 | |
c06fd283 | 83 | update_mmu_cache(NULL, address, pte); |
1da177e4 | 84 | |
4de51856 | 85 | return 0; |
1da177e4 LT |
86 | } |
87 | ||
811d50cb PM |
88 | /* |
89 | * Put all this information into one structure so that everything is just | |
90 | * arithmetic relative to a single base address. This reduces the number | |
91 | * of movi/shori pairs needed just to load addresses of static data. | |
92 | */ | |
1da177e4 LT |
93 | struct expevt_lookup { |
94 | unsigned short protection_flags[8]; | |
95 | unsigned char is_text_access[8]; | |
96 | unsigned char is_write_access[8]; | |
97 | }; | |
98 | ||
99 | #define PRU (1<<9) | |
100 | #define PRW (1<<8) | |
101 | #define PRX (1<<7) | |
102 | #define PRR (1<<6) | |
103 | ||
1da177e4 LT |
104 | /* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether |
105 | the fault happened in user mode or privileged mode. */ | |
106 | static struct expevt_lookup expevt_lookup_table = { | |
107 | .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW}, | |
108 | .is_text_access = {1, 1, 0, 0, 0, 0, 0, 0} | |
109 | }; | |
110 | ||
fd37e75e PM |
111 | static inline unsigned int |
112 | expevt_to_fault_code(unsigned long expevt) | |
113 | { | |
114 | if (expevt == 0xa40) | |
115 | return FAULT_CODE_ITLB; | |
116 | else if (expevt == 0x060) | |
117 | return FAULT_CODE_WRITE; | |
118 | ||
119 | return 0; | |
120 | } | |
121 | ||
1da177e4 LT |
122 | /* |
123 | This routine handles page faults that can be serviced just by refilling a | |
124 | TLB entry from an existing page table entry. (This case represents a very | |
125 | large majority of page faults.) Return 1 if the fault was successfully | |
126 | handled. Return 0 if the fault could not be handled. (This leads into the | |
127 | general fault handling in fault.c which deals with mapping file-backed | |
128 | pages, stack growth, segmentation faults, swapping etc etc) | |
129 | */ | |
392c3822 PM |
130 | asmlinkage int __kprobes |
131 | do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt, | |
132 | unsigned long address) | |
1da177e4 | 133 | { |
1da177e4 LT |
134 | unsigned long long protection_flags; |
135 | unsigned long long index; | |
136 | unsigned long long expevt4; | |
fd37e75e | 137 | unsigned int fault_code; |
1da177e4 | 138 | |
811d50cb PM |
139 | /* The next few lines implement a way of hashing EXPEVT into a |
140 | * small array index which can be used to lookup parameters | |
141 | * specific to the type of TLBMISS being handled. | |
142 | * | |
143 | * Note: | |
144 | * ITLBMISS has EXPEVT==0xa40 | |
145 | * RTLBMISS has EXPEVT==0x040 | |
146 | * WTLBMISS has EXPEVT==0x060 | |
147 | */ | |
1da177e4 | 148 | expevt4 = (expevt >> 4); |
811d50cb PM |
149 | /* TODO : xor ssr_md into this expression too. Then we can check |
150 | * that PRU is set when it needs to be. */ | |
1da177e4 LT |
151 | index = expevt4 ^ (expevt4 >> 5); |
152 | index &= 7; | |
c06fd283 | 153 | |
fd37e75e PM |
154 | fault_code = expevt_to_fault_code(expevt); |
155 | ||
1da177e4 | 156 | protection_flags = expevt_lookup_table.protection_flags[index]; |
c06fd283 PM |
157 | |
158 | if (expevt_lookup_table.is_text_access[index]) | |
fd37e75e PM |
159 | fault_code |= FAULT_CODE_ITLB; |
160 | if (!ssr_md) | |
161 | fault_code |= FAULT_CODE_USER; | |
162 | ||
163 | set_thread_fault_code(fault_code); | |
1da177e4 | 164 | |
392c3822 | 165 | return handle_tlbmiss(protection_flags, address); |
1da177e4 | 166 | } |