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a00736e9 SR |
1 | /* ns87303.h: Configuration Register Description for the |
2 | * National Semiconductor PC87303 (SuperIO). | |
3 | * | |
4 | * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) | |
5 | */ | |
6 | ||
7 | #ifndef _SPARC_NS87303_H | |
8 | #define _SPARC_NS87303_H 1 | |
9 | ||
10 | /* | |
11 | * Control Register Index Values | |
12 | */ | |
13 | #define FER 0x00 | |
14 | #define FAR 0x01 | |
15 | #define PTR 0x02 | |
16 | #define FCR 0x03 | |
17 | #define PCR 0x04 | |
18 | #define KRR 0x05 | |
19 | #define PMC 0x06 | |
20 | #define TUP 0x07 | |
21 | #define SID 0x08 | |
22 | #define ASC 0x09 | |
23 | #define CS0CF0 0x0a | |
24 | #define CS0CF1 0x0b | |
25 | #define CS1CF0 0x0c | |
26 | #define CS1CF1 0x0d | |
27 | ||
28 | /* Function Enable Register (FER) bits */ | |
29 | #define FER_EDM 0x10 /* Encoded Drive and Motor pin information */ | |
30 | ||
31 | /* Function Address Register (FAR) bits */ | |
32 | #define FAR_LPT_MASK 0x03 | |
33 | #define FAR_LPTB 0x00 | |
34 | #define FAR_LPTA 0x01 | |
35 | #define FAR_LPTC 0x02 | |
36 | ||
37 | /* Power and Test Register (PTR) bits */ | |
38 | #define PTR_LPTB_IRQ7 0x08 | |
39 | #define PTR_LEVEL_IRQ 0x80 /* When not ECP/EPP: Use level IRQ */ | |
25985edc | 40 | #define PTR_LPT_REG_DIR 0x80 /* When ECP/EPP: LPT CTR controls direction */ |
a00736e9 SR |
41 | /* of the parallel port */ |
42 | ||
43 | /* Function Control Register (FCR) bits */ | |
44 | #define FCR_LDE 0x10 /* Logical Drive Exchange */ | |
45 | #define FCR_ZWS_ENA 0x20 /* Enable short host read/write in ECP/EPP */ | |
46 | ||
47 | /* Printer Control Register (PCR) bits */ | |
48 | #define PCR_EPP_ENABLE 0x01 | |
49 | #define PCR_EPP_IEEE 0x02 /* Enable EPP Version 1.9 (IEEE 1284) */ | |
50 | #define PCR_ECP_ENABLE 0x04 | |
51 | #define PCR_ECP_CLK_ENA 0x08 /* If 0 ECP Clock is stopped on Power down */ | |
52 | #define PCR_IRQ_POLAR 0x20 /* If 0 IRQ is level high or negative pulse, */ | |
53 | /* if 1 polarity is inverted */ | |
54 | #define PCR_IRQ_ODRAIN 0x40 /* If 1, IRQ is open drain */ | |
55 | ||
56 | /* Tape UARTs and Parallel Port Config Register (TUP) bits */ | |
57 | #define TUP_EPP_TIMO 0x02 /* Enable EPP timeout IRQ */ | |
58 | ||
59 | /* Advanced SuperIO Config Register (ASC) bits */ | |
60 | #define ASC_LPT_IRQ7 0x01 /* Always use IRQ7 for LPT */ | |
61 | #define ASC_DRV2_SEL 0x02 /* Logical Drive Exchange controlled by TDR */ | |
62 | ||
63 | #define FER_RESERVED 0x00 | |
64 | #define FAR_RESERVED 0x00 | |
65 | #define PTR_RESERVED 0x73 | |
66 | #define FCR_RESERVED 0xc4 | |
67 | #define PCR_RESERVED 0x10 | |
68 | #define KRR_RESERVED 0x00 | |
69 | #define PMC_RESERVED 0x98 | |
70 | #define TUP_RESERVED 0xfb | |
71 | #define SIP_RESERVED 0x00 | |
72 | #define ASC_RESERVED 0x18 | |
73 | #define CS0CF0_RESERVED 0x00 | |
74 | #define CS0CF1_RESERVED 0x08 | |
75 | #define CS1CF0_RESERVED 0x00 | |
76 | #define CS1CF1_RESERVED 0x08 | |
77 | ||
78 | #ifdef __KERNEL__ | |
79 | ||
80 | #include <linux/spinlock.h> | |
81 | ||
a00736e9 SR |
82 | #include <asm/io.h> |
83 | ||
84 | extern spinlock_t ns87303_lock; | |
85 | ||
86 | static inline int ns87303_modify(unsigned long port, unsigned int index, | |
87 | unsigned char clr, unsigned char set) | |
88 | { | |
89 | static unsigned char reserved[] = { | |
90 | FER_RESERVED, FAR_RESERVED, PTR_RESERVED, FCR_RESERVED, | |
91 | PCR_RESERVED, KRR_RESERVED, PMC_RESERVED, TUP_RESERVED, | |
92 | SIP_RESERVED, ASC_RESERVED, CS0CF0_RESERVED, CS0CF1_RESERVED, | |
93 | CS1CF0_RESERVED, CS1CF1_RESERVED | |
94 | }; | |
95 | unsigned long flags; | |
96 | unsigned char value; | |
97 | ||
98 | if (index > 0x0d) | |
99 | return -EINVAL; | |
100 | ||
101 | spin_lock_irqsave(&ns87303_lock, flags); | |
102 | ||
103 | outb(index, port); | |
104 | value = inb(port + 1); | |
105 | value &= ~(reserved[index] | clr); | |
106 | value |= set; | |
107 | outb(value, port + 1); | |
108 | outb(value, port + 1); | |
109 | ||
110 | spin_unlock_irqrestore(&ns87303_lock, flags); | |
111 | ||
112 | return 0; | |
113 | } | |
114 | ||
115 | #endif /* __KERNEL__ */ | |
116 | ||
117 | #endif /* !(_SPARC_NS87303_H) */ |