Commit | Line | Data |
---|---|---|
1b1fbbca | 1 | /* ld script for sparc32/sparc64 kernel */ |
1da177e4 LT |
2 | |
3 | #include <asm-generic/vmlinux.lds.h> | |
b74e34db | 4 | |
bcbe40eb | 5 | #include <asm/page.h> |
b74e34db | 6 | #include <asm/thread_info.h> |
1da177e4 | 7 | |
1b1fbbca SR |
8 | #ifdef CONFIG_SPARC32 |
9 | #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS | |
10 | #define TEXTSTART 0xf0004000 | |
11 | ||
12 | #define SMP_CACHE_BYTES_SHIFT 5 | |
13 | ||
14 | #else | |
15 | #define SMP_CACHE_BYTES_SHIFT 6 | |
16 | #define INITIAL_ADDRESS 0x4000 | |
17 | #define TEXTSTART 0x0000000000404000 | |
18 | ||
19 | #endif | |
20 | ||
21 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) | |
22 | ||
23 | #ifdef CONFIG_SPARC32 | |
1da177e4 LT |
24 | OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") |
25 | OUTPUT_ARCH(sparc) | |
26 | ENTRY(_start) | |
27 | jiffies = jiffies_64 + 4; | |
1b1fbbca SR |
28 | #else |
29 | /* sparc64 */ | |
30 | OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") | |
31 | OUTPUT_ARCH(sparc:v9a) | |
32 | ENTRY(_start) | |
33 | jiffies = jiffies_64; | |
34 | #endif | |
35 | ||
49fa5230 DM |
36 | #ifdef CONFIG_SPARC64 |
37 | ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large") | |
38 | #endif | |
39 | ||
1da177e4 LT |
40 | SECTIONS |
41 | { | |
d195b71b DM |
42 | #ifdef CONFIG_SPARC64 |
43 | swapper_pg_dir = 0x0000000000402000; | |
44 | #endif | |
1b1fbbca SR |
45 | . = INITIAL_ADDRESS; |
46 | .text TEXTSTART : | |
bcbe40eb SR |
47 | { |
48 | _text = .; | |
ce8a7424 | 49 | HEAD_TEXT |
bcbe40eb SR |
50 | TEXT_TEXT |
51 | SCHED_TEXT | |
52 | LOCK_TEXT | |
1b1fbbca | 53 | KPROBES_TEXT |
9960e9e8 | 54 | IRQENTRY_TEXT |
be7635e7 | 55 | SOFTIRQENTRY_TEXT |
bcbe40eb SR |
56 | *(.gnu.warning) |
57 | } = 0 | |
58 | _etext = .; | |
1b1fbbca SR |
59 | |
60 | RO_DATA(PAGE_SIZE) | |
8b8d8e28 DM |
61 | |
62 | /* Start of data section */ | |
63 | _sdata = .; | |
64 | ||
bcbe40eb SR |
65 | .data1 : { |
66 | *(.data1) | |
67 | } | |
3240a77b GT |
68 | RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) |
69 | ||
b74e34db | 70 | /* End of data section */ |
bcbe40eb | 71 | _edata = .; |
b74e34db | 72 | |
bcbe40eb SR |
73 | .fixup : { |
74 | __start___fixup = .; | |
75 | *(.fixup) | |
76 | __stop___fixup = .; | |
77 | } | |
3240a77b | 78 | EXCEPTION_TABLE(16) |
bcbe40eb SR |
79 | NOTES |
80 | ||
81 | . = ALIGN(PAGE_SIZE); | |
3240a77b GT |
82 | __init_begin = ALIGN(PAGE_SIZE); |
83 | INIT_TEXT_SECTION(PAGE_SIZE) | |
bcbe40eb | 84 | __init_text_end = .; |
3240a77b | 85 | INIT_DATA_SECTION(16) |
67d38229 | 86 | |
1b1fbbca SR |
87 | . = ALIGN(4); |
88 | .tsb_ldquad_phys_patch : { | |
89 | __tsb_ldquad_phys_patch = .; | |
90 | *(.tsb_ldquad_phys_patch) | |
91 | __tsb_ldquad_phys_patch_end = .; | |
92 | } | |
93 | ||
94 | .tsb_phys_patch : { | |
95 | __tsb_phys_patch = .; | |
96 | *(.tsb_phys_patch) | |
97 | __tsb_phys_patch_end = .; | |
98 | } | |
99 | ||
100 | .cpuid_patch : { | |
101 | __cpuid_patch = .; | |
102 | *(.cpuid_patch) | |
103 | __cpuid_patch_end = .; | |
104 | } | |
105 | ||
106 | .sun4v_1insn_patch : { | |
107 | __sun4v_1insn_patch = .; | |
108 | *(.sun4v_1insn_patch) | |
109 | __sun4v_1insn_patch_end = .; | |
110 | } | |
111 | .sun4v_2insn_patch : { | |
112 | __sun4v_2insn_patch = .; | |
113 | *(.sun4v_2insn_patch) | |
114 | __sun4v_2insn_patch_end = .; | |
115 | } | |
5b8b93c4 SR |
116 | .leon_1insn_patch : { |
117 | __leon_1insn_patch = .; | |
118 | *(.leon_1insn_patch) | |
119 | __leon_1insn_patch_end = .; | |
120 | } | |
9076d0e7 DM |
121 | .swapper_tsb_phys_patch : { |
122 | __swapper_tsb_phys_patch = .; | |
123 | *(.swapper_tsb_phys_patch) | |
124 | __swapper_tsb_phys_patch_end = .; | |
125 | } | |
126 | .swapper_4m_tsb_phys_patch : { | |
127 | __swapper_4m_tsb_phys_patch = .; | |
128 | *(.swapper_4m_tsb_phys_patch) | |
129 | __swapper_4m_tsb_phys_patch_end = .; | |
130 | } | |
ef7c4d46 DM |
131 | .popc_3insn_patch : { |
132 | __popc_3insn_patch = .; | |
133 | *(.popc_3insn_patch) | |
134 | __popc_3insn_patch_end = .; | |
135 | } | |
56d205cc DM |
136 | .popc_6insn_patch : { |
137 | __popc_6insn_patch = .; | |
138 | *(.popc_6insn_patch) | |
139 | __popc_6insn_patch_end = .; | |
140 | } | |
187818cd DM |
141 | .pause_3insn_patch : { |
142 | __pause_3insn_patch = .; | |
143 | *(.pause_3insn_patch) | |
144 | __pause_3insn_patch_end = .; | |
e9b9eb59 | 145 | } |
494e5b6f KA |
146 | .sun_m7_2insn_patch : { |
147 | __sun_m7_2insn_patch = .; | |
148 | *(.sun_m7_2insn_patch) | |
149 | __sun_m7_2insn_patch_end = .; | |
150 | } | |
0415b00d | 151 | PERCPU_SECTION(SMP_CACHE_BYTES) |
1b1fbbca | 152 | |
10d7227b JB |
153 | #ifdef CONFIG_JUMP_LABEL |
154 | . = ALIGN(PAGE_SIZE); | |
155 | .exit.text : { | |
156 | EXIT_TEXT | |
157 | } | |
158 | #endif | |
159 | ||
bcbe40eb SR |
160 | . = ALIGN(PAGE_SIZE); |
161 | __init_end = .; | |
3240a77b | 162 | BSS_SECTION(0, 0, 0) |
bcbe40eb | 163 | _end = . ; |
1b1fbbca | 164 | |
bcbe40eb SR |
165 | STABS_DEBUG |
166 | DWARF_DEBUG | |
023bf6f1 TH |
167 | |
168 | DISCARDS | |
1da177e4 | 169 | } |