[deliverable/linux.git] / arch / sparc64 / kernel / kprobes.c

/* arch/sparc64/kernel/kprobes.c
 *
 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
 */

#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <linux/module.h>
#include <linux/kdebug.h>
#include <asm/signal.h>
#include <asm/cacheflush.h>
#include <asm/uaccess.h>

/* We do not have hardware single-stepping on sparc64.
 * So we implement software single-stepping with breakpoint
 * traps.  The top-level scheme is similar to that used
 * in the x86 kprobes implementation.
 *
 * In the kprobe->ainsn.insn[] array we store the original
 * instruction at index zero and a break instruction at
 * index one.
 *
 * When we hit a kprobe we:
 * - Run the pre-handler
 * - Remember "regs->tnpc" and interrupt level stored in
 *   "regs->tstate" so we can restore them later
 * - Disable PIL interrupts
 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
 * - Mark that we are actively in a kprobe
 *
 * At this point we wait for the second breakpoint at
 * kprobe->ainsn.insn[1] to hit.  When it does we:
 * - Run the post-handler
 * - Set regs->tpc to "remembered" regs->tnpc stored above,
 *   restore the PIL interrupt level in "regs->tstate" as well
 * - Make any adjustments necessary to regs->tnpc in order
 *   to handle relative branches correctly.  See below.
 * - Mark that we are no longer actively in a kprobe.
 */

DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);

int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
	p->ainsn.insn[0] = *p->addr;
	flushi(&p->ainsn.insn[0]);

	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
	flushi(&p->ainsn.insn[1]);

	p->opcode = *p->addr;
	return 0;
}

void __kprobes arch_arm_kprobe(struct kprobe *p)
{
	*p->addr = BREAKPOINT_INSTRUCTION;
	flushi(p->addr);
}

void __kprobes arch_disarm_kprobe(struct kprobe *p)
{
	*p->addr = p->opcode;
	flushi(p->addr);
}

static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
{
	kcb->prev_kprobe.kp = kprobe_running();
	kcb->prev_kprobe.status = kcb->kprobe_status;
	kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
	kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
}

static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
{
	__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
	kcb->kprobe_status = kcb->prev_kprobe.status;
	kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
	kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
}

static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
				struct kprobe_ctlblk *kcb)
{
	__get_cpu_var(current_kprobe) = p;
	kcb->kprobe_orig_tnpc = regs->tnpc;
	kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
}

static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
			struct kprobe_ctlblk *kcb)
{
	regs->tstate |= TSTATE_PIL;

	/*single step inline, if it a breakpoint instruction*/
	if (p->opcode == BREAKPOINT_INSTRUCTION) {
		regs->tpc = (unsigned long) p->addr;
		regs->tnpc = kcb->kprobe_orig_tnpc;
	} else {
		regs->tpc = (unsigned long) &p->ainsn.insn[0];
		regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	}
}

static int __kprobes kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *p;
	void *addr = (void *) regs->tpc;
	int ret = 0;
	struct kprobe_ctlblk *kcb;

	/*
	 * We don't want to be preempted for the entire
	 * duration of kprobe processing
	 */
	preempt_disable();
	kcb = get_kprobe_ctlblk();

	if (kprobe_running()) {
		p = get_kprobe(addr);
		if (p) {
			if (kcb->kprobe_status == KPROBE_HIT_SS) {
				regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
					kcb->kprobe_orig_tstate_pil);
				goto no_kprobe;
			}
			/* We have reentered the kprobe_handler(), since
			 * another probe was hit while within the handler.
			 * We here save the original kprobes variables and
			 * just single step on the instruction of the new probe
			 * without calling any user handlers.
			 */
			save_previous_kprobe(kcb);
			set_current_kprobe(p, regs, kcb);
			kprobes_inc_nmissed_count(p);
			kcb->kprobe_status = KPROBE_REENTER;
			prepare_singlestep(p, regs, kcb);
			return 1;
		} else {
			if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
			/* The breakpoint instruction was removed by
			 * another cpu right after we hit, no further
			 * handling of this interrupt is appropriate
			 */
				ret = 1;
				goto no_kprobe;
			}
			p = __get_cpu_var(current_kprobe);
			if (p->break_handler && p->break_handler(p, regs))
				goto ss_probe;
		}
		goto no_kprobe;
	}

	p = get_kprobe(addr);
	if (!p) {
		if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
			/*
			 * The breakpoint instruction was removed right
			 * after we hit it.  Another cpu has removed
			 * either a probepoint or a debugger breakpoint
			 * at this address.  In either case, no further
			 * handling of this interrupt is appropriate.
			 */
			ret = 1;
		}
		/* Not one of ours: let kernel handle it */
		goto no_kprobe;
	}

	set_current_kprobe(p, regs, kcb);
	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
	if (p->pre_handler && p->pre_handler(p, regs))
		return 1;

ss_probe:
	prepare_singlestep(p, regs, kcb);
	kcb->kprobe_status = KPROBE_HIT_SS;
	return 1;

no_kprobe:
	preempt_enable_no_resched();
	return ret;
}

/* If INSN is a relative control transfer instruction,
 * return the corrected branch destination value.
 *
 * regs->tpc and regs->tnpc still hold the values of the
 * program counters at the time of trap due to the execution
 * of the BREAKPOINT_INSTRUCTION_2 at p->ainsn.insn[1]
 * 
 */
static unsigned long __kprobes relbranch_fixup(u32 insn, struct kprobe *p,
					       struct pt_regs *regs)
{
	unsigned long real_pc = (unsigned long) p->addr;

	/* Branch not taken, no mods necessary.  */
	if (regs->tnpc == regs->tpc + 0x4UL)
		return real_pc + 0x8UL;

	/* The three cases are call, branch w/prediction,
	 * and traditional branch.
	 */
	if ((insn & 0xc0000000) == 0x40000000 ||
	    (insn & 0xc1c00000) == 0x00400000 ||
	    (insn & 0xc1c00000) == 0x00800000) {
		unsigned long ainsn_addr;

		ainsn_addr = (unsigned long) &p->ainsn.insn[0];

		/* The instruction did all the work for us
		 * already, just apply the offset to the correct
		 * instruction location.
		 */
		return (real_pc + (regs->tnpc - ainsn_addr));
	}

	/* It is jmpl or some other absolute PC modification instruction,
	 * leave NPC as-is.
	 */
	return regs->tnpc;
}

/* If INSN is an instruction which writes it's PC location
 * into a destination register, fix that up.
 */
static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
				  unsigned long real_pc)
{
	unsigned long *slot = NULL;

	/* Simplest case is 'call', which always uses %o7 */
	if ((insn & 0xc0000000) == 0x40000000) {
		slot = &regs->u_regs[UREG_I7];
	}

	/* 'jmpl' encodes the register inside of the opcode */
	if ((insn & 0xc1f80000) == 0x81c00000) {
		unsigned long rd = ((insn >> 25) & 0x1f);

		if (rd <= 15) {
			slot = &regs->u_regs[rd];
		} else {
			/* Hard case, it goes onto the stack. */
			flushw_all();

			rd -= 16;
			slot = (unsigned long *)
				(regs->u_regs[UREG_FP] + STACK_BIAS);
			slot += rd;
		}
	}
	if (slot != NULL)
		*slot = real_pc;
}

/*
 * Called after single-stepping.  p->addr is the address of the
 * instruction which has been replaced by the breakpoint
 * instruction.  To avoid the SMP problems that can occur when we
 * temporarily put back the original opcode to single-step, we
 * single-stepped a copy of the instruction.  The address of this
 * copy is &p->ainsn.insn[0].
 *
 * This function prepares to return from the post-single-step
 * breakpoint trap.
 */
static void __kprobes resume_execution(struct kprobe *p,
		struct pt_regs *regs, struct kprobe_ctlblk *kcb)
{
	u32 insn = p->ainsn.insn[0];

	regs->tnpc = relbranch_fixup(insn, p, regs);

	/* This assignment must occur after relbranch_fixup() */
	regs->tpc = kcb->kprobe_orig_tnpc;

	retpc_fixup(regs, insn, (unsigned long) p->addr);

	regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
			kcb->kprobe_orig_tstate_pil);
}

static int __kprobes post_kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *cur = kprobe_running();
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	if (!cur)
		return 0;

	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
		kcb->kprobe_status = KPROBE_HIT_SSDONE;
		cur->post_handler(cur, regs, 0);
	}

	resume_execution(cur, regs, kcb);

	/*Restore back the original saved kprobes variables and continue. */
	if (kcb->kprobe_status == KPROBE_REENTER) {
		restore_previous_kprobe(kcb);
		goto out;
	}
	reset_current_kprobe();
out:
	preempt_enable_no_resched();

	return 1;
}

int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
{
	struct kprobe *cur = kprobe_running();
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	const struct exception_table_entry *entry;

	switch(kcb->kprobe_status) {
	case KPROBE_HIT_SS:
	case KPROBE_REENTER:
		/*
		 * We are here because the instruction being single
		 * stepped caused a page fault. We reset the current
		 * kprobe and the tpc points back to the probe address
		 * and allow the page fault handler to continue as a
		 * normal page fault.
		 */
		regs->tpc = (unsigned long)cur->addr;
		regs->tnpc = kcb->kprobe_orig_tnpc;
		regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
				kcb->kprobe_orig_tstate_pil);
		if (kcb->kprobe_status == KPROBE_REENTER)
			restore_previous_kprobe(kcb);
		else
			reset_current_kprobe();
		preempt_enable_no_resched();
		break;
	case KPROBE_HIT_ACTIVE:
	case KPROBE_HIT_SSDONE:
		/*
		 * We increment the nmissed count for accounting,
		 * we can also use npre/npostfault count for accouting
		 * these specific fault cases.
		 */
		kprobes_inc_nmissed_count(cur);

		/*
		 * We come here because instructions in the pre/post
		 * handler caused the page_fault, this could happen
		 * if handler tries to access user space by
		 * copy_from_user(), get_user() etc. Let the
		 * user-specified handler try to fix it first.
		 */
		if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
			return 1;

		/*
		 * In case the user-specified fault handler returned
		 * zero, try to fix up.
		 */

		entry = search_exception_tables(regs->tpc);
		if (entry) {
			regs->tpc = entry->fixup;
			regs->tnpc = regs->tpc + 4;
			return 1;
		}

		/*
		 * fixup_exception() could not handle it,
		 * Let do_page_fault() fix it.
		 */
		break;
	default:
		break;
	}

	return 0;
}

/*
 * Wrapper routine to for handling exceptions.
 */
int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
				       unsigned long val, void *data)
{
	struct die_args *args = (struct die_args *)data;
	int ret = NOTIFY_DONE;

	if (args->regs && user_mode(args->regs))
		return ret;

	switch (val) {
	case DIE_DEBUG:
		if (kprobe_handler(args->regs))
			ret = NOTIFY_STOP;
		break;
	case DIE_DEBUG_2:
		if (post_kprobe_handler(args->regs))
			ret = NOTIFY_STOP;
		break;
	default:
		break;
	}
	return ret;
}

asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
				      struct pt_regs *regs)
{
	BUG_ON(trap_level != 0x170 && trap_level != 0x171);

	if (user_mode(regs)) {
		local_irq_enable();
		bad_trap(regs, trap_level);
		return;
	}

	/* trap_level == 0x170 --> ta 0x70
	 * trap_level == 0x171 --> ta 0x71
	 */
	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
		       (trap_level == 0x170) ? "debug" : "debug_2",
		       regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
		bad_trap(regs, trap_level);
}

/* Jprobes support.  */
int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
{
	struct jprobe *jp = container_of(p, struct jprobe, kp);
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	memcpy(&(kcb->jprobe_saved_regs), regs, sizeof(*regs));

	regs->tpc  = (unsigned long) jp->entry;
	regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
	regs->tstate |= TSTATE_PIL;

	return 1;
}

void __kprobes jprobe_return(void)
{
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	register unsigned long orig_fp asm("g1");

	orig_fp = kcb->jprobe_saved_regs.u_regs[UREG_FP];
	__asm__ __volatile__("\n"
"1:	cmp		%%sp, %0\n\t"
	"blu,a,pt	%%xcc, 1b\n\t"
	" restore\n\t"
	".globl		jprobe_return_trap_instruction\n"
"jprobe_return_trap_instruction:\n\t"
	"ta		0x70"
	: /* no outputs */
	: "r" (orig_fp));
}

extern void jprobe_return_trap_instruction(void);

extern void __show_regs(struct pt_regs * regs);

int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
{
	u32 *addr = (u32 *) regs->tpc;
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	if (addr == (u32 *) jprobe_return_trap_instruction) {
		memcpy(regs, &(kcb->jprobe_saved_regs), sizeof(*regs));
		preempt_enable_no_resched();
		return 1;
	}
	return 0;
}

/* architecture specific initialization */
int arch_init_kprobes(void)
{
	return 0;
}
Commit	Line	Data
1da177e4 LT	1	/* arch/sparc64/kernel/kprobes.c
	2	*
	3	* Copyright (C) 2004 David S. Miller <davem@davemloft.net>
	4	*/
	5
1da177e4 LT	6	#include <linux/kernel.h>
1da177e4 LT	7	#include <linux/kprobes.h>
b6700096	8	#include <linux/module.h>
1eeb66a1	9	#include <linux/kdebug.h>
1da177e4	10	#include <asm/signal.h>
05e14cb3	11	#include <asm/cacheflush.h>
b6700096	12	#include <asm/uaccess.h>
1da177e4 LT	13
	14	/* We do not have hardware single-stepping on sparc64.
	15	* So we implement software single-stepping with breakpoint
	16	* traps. The top-level scheme is similar to that used
	17	* in the x86 kprobes implementation.
	18	*
	19	* In the kprobe->ainsn.insn[] array we store the original
	20	* instruction at index zero and a break instruction at
	21	* index one.
	22	*
	23	* When we hit a kprobe we:
	24	* - Run the pre-handler
	25	* - Remember "regs->tnpc" and interrupt level stored in
	26	* "regs->tstate" so we can restore them later
	27	* - Disable PIL interrupts
	28	* - Set regs->tpc to point to kprobe->ainsn.insn[0]
	29	* - Set regs->tnpc to point to kprobe->ainsn.insn[1]
	30	* - Mark that we are actively in a kprobe
	31	*
	32	* At this point we wait for the second breakpoint at
	33	* kprobe->ainsn.insn[1] to hit. When it does we:
	34	* - Run the post-handler
	35	* - Set regs->tpc to "remembered" regs->tnpc stored above,
	36	* restore the PIL interrupt level in "regs->tstate" as well
	37	* - Make any adjustments necessary to regs->tnpc in order
	38	* to handle relative branches correctly. See below.
	39	* - Mark that we are no longer actively in a kprobe.
	40	*/
	41
f215d985 AM	42	DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
	43	DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
	44
05e14cb3	45	int __kprobes arch_prepare_kprobe(struct kprobe *p)
1da177e4 LT	46	{
1da177e4 LT	47	p->ainsn.insn[0] = *p->addr;
f0882589 DM	48	flushi(&p->ainsn.insn[0]);
f0882589 DM	49
1da177e4	50	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
f0882589 DM	51	flushi(&p->ainsn.insn[1]);
f0882589 DM	52
7e1048b1	53	p->opcode = *p->addr;
49a2a1b8	54	return 0;
7e1048b1 RL	55	}
7e1048b1 RL	56
05e14cb3	57	void __kprobes arch_arm_kprobe(struct kprobe *p)
7e1048b1 RL	58	{
	59	*p->addr = BREAKPOINT_INSTRUCTION;
	60	flushi(p->addr);
	61	}
	62
05e14cb3	63	void __kprobes arch_disarm_kprobe(struct kprobe *p)
7e1048b1 RL	64	{
	65	*p->addr = p->opcode;
	66	flushi(p->addr);
1da177e4 LT	67	}
1da177e4 LT	68
07fab8da	69	static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
e539c233	70	{
f215d985 AM	71	kcb->prev_kprobe.kp = kprobe_running();
	72	kcb->prev_kprobe.status = kcb->kprobe_status;
	73	kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
	74	kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
e539c233 PP	75	}
e539c233 PP	76
07fab8da	77	static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
e539c233	78	{
f215d985 AM	79	__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
	80	kcb->kprobe_status = kcb->prev_kprobe.status;
	81	kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
	82	kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
e539c233 PP	83	}
e539c233 PP	84
07fab8da	85	static void __kprobes set_current_kprobe(struct kprobe p, struct pt_regs regs,
f215d985	86	struct kprobe_ctlblk *kcb)
1da177e4	87	{
f215d985 AM	88	__get_cpu_var(current_kprobe) = p;
	89	kcb->kprobe_orig_tnpc = regs->tnpc;
	90	kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
e539c233 PP	91	}
e539c233 PP	92
07fab8da	93	static void __kprobes prepare_singlestep(struct kprobe p, struct pt_regs regs,
f215d985	94	struct kprobe_ctlblk *kcb)
e539c233	95	{
1da177e4 LT	96	regs->tstate \|= TSTATE_PIL;
	97
	98	/single step inline, if it a breakpoint instruction/
	99	if (p->opcode == BREAKPOINT_INSTRUCTION) {
	100	regs->tpc = (unsigned long) p->addr;
f215d985	101	regs->tnpc = kcb->kprobe_orig_tnpc;
1da177e4 LT	102	} else {
	103	regs->tpc = (unsigned long) &p->ainsn.insn[0];
	104	regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	105	}
	106	}
	107
05e14cb3	108	static int __kprobes kprobe_handler(struct pt_regs *regs)
1da177e4 LT	109	{
	110	struct kprobe *p;
	111	void addr = (void ) regs->tpc;
	112	int ret = 0;
d217d545 AM	113	struct kprobe_ctlblk *kcb;
	114
	115	/*
	116	* We don't want to be preempted for the entire
	117	* duration of kprobe processing
	118	*/
	119	preempt_disable();
	120	kcb = get_kprobe_ctlblk();
1da177e4	121
1da177e4	122	if (kprobe_running()) {
1da177e4 LT	123	p = get_kprobe(addr);
1da177e4 LT	124	if (p) {
f215d985	125	if (kcb->kprobe_status == KPROBE_HIT_SS) {
1da177e4	126	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
f215d985	127	kcb->kprobe_orig_tstate_pil);
1da177e4 LT	128	goto no_kprobe;
1da177e4 LT	129	}
e539c233 PP	130	/* We have reentered the kprobe_handler(), since
	131	* another probe was hit while within the handler.
	132	* We here save the original kprobes variables and
	133	* just single step on the instruction of the new probe
	134	* without calling any user handlers.
	135	*/
f215d985 AM	136	save_previous_kprobe(kcb);
f215d985 AM	137	set_current_kprobe(p, regs, kcb);
bf8d5c52	138	kprobes_inc_nmissed_count(p);
f215d985 AM	139	kcb->kprobe_status = KPROBE_REENTER;
f215d985 AM	140	prepare_singlestep(p, regs, kcb);
e539c233	141	return 1;
1da177e4	142	} else {
eb3a7292 KA	143	if ((u32 )addr != BREAKPOINT_INSTRUCTION) {
	144	/* The breakpoint instruction was removed by
	145	* another cpu right after we hit, no further
	146	* handling of this interrupt is appropriate
	147	*/
	148	ret = 1;
	149	goto no_kprobe;
	150	}
f215d985	151	p = __get_cpu_var(current_kprobe);
1da177e4 LT	152	if (p->break_handler && p->break_handler(p, regs))
	153	goto ss_probe;
	154	}
1da177e4 LT	155	goto no_kprobe;
	156	}
	157
1da177e4 LT	158	p = get_kprobe(addr);
1da177e4 LT	159	if (!p) {
1da177e4 LT	160	if ((u32 )addr != BREAKPOINT_INSTRUCTION) {
	161	/*
	162	* The breakpoint instruction was removed right
	163	* after we hit it. Another cpu has removed
	164	* either a probepoint or a debugger breakpoint
	165	* at this address. In either case, no further
	166	* handling of this interrupt is appropriate.
	167	*/
	168	ret = 1;
	169	}
	170	/* Not one of ours: let kernel handle it */
	171	goto no_kprobe;
	172	}
	173
f215d985 AM	174	set_current_kprobe(p, regs, kcb);
f215d985 AM	175	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1da177e4 LT	176	if (p->pre_handler && p->pre_handler(p, regs))
	177	return 1;
	178
	179	ss_probe:
f215d985 AM	180	prepare_singlestep(p, regs, kcb);
f215d985 AM	181	kcb->kprobe_status = KPROBE_HIT_SS;
1da177e4 LT	182	return 1;
	183
	184	no_kprobe:
d217d545	185	preempt_enable_no_resched();
1da177e4 LT	186	return ret;
	187	}
	188
	189	/* If INSN is a relative control transfer instruction,
	190	* return the corrected branch destination value.
	191	*
f0882589 DM	192	* regs->tpc and regs->tnpc still hold the values of the
	193	* program counters at the time of trap due to the execution
	194	* of the BREAKPOINT_INSTRUCTION_2 at p->ainsn.insn[1]
	195	*
1da177e4	196	*/
f0882589 DM	197	static unsigned long __kprobes relbranch_fixup(u32 insn, struct kprobe *p,
f0882589 DM	198	struct pt_regs *regs)
1da177e4	199	{
f0882589 DM	200	unsigned long real_pc = (unsigned long) p->addr;
f0882589 DM	201
1da177e4	202	/* Branch not taken, no mods necessary. */
f0882589 DM	203	if (regs->tnpc == regs->tpc + 0x4UL)
f0882589 DM	204	return real_pc + 0x8UL;
1da177e4 LT	205
	206	/* The three cases are call, branch w/prediction,
	207	* and traditional branch.
	208	*/
	209	if ((insn & 0xc0000000) == 0x40000000 \|\|
	210	(insn & 0xc1c00000) == 0x00400000 \|\|
	211	(insn & 0xc1c00000) == 0x00800000) {
f0882589 DM	212	unsigned long ainsn_addr;
	213
	214	ainsn_addr = (unsigned long) &p->ainsn.insn[0];
	215
1da177e4 LT	216	/* The instruction did all the work for us
	217	* already, just apply the offset to the correct
	218	* instruction location.
	219	*/
f0882589	220	return (real_pc + (regs->tnpc - ainsn_addr));
1da177e4 LT	221	}
1da177e4 LT	222
f0882589 DM	223	/* It is jmpl or some other absolute PC modification instruction,
	224	* leave NPC as-is.
	225	*/
	226	return regs->tnpc;
1da177e4 LT	227	}
	228
	229	/* If INSN is an instruction which writes it's PC location
	230	* into a destination register, fix that up.
	231	*/
05e14cb3 PP	232	static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
05e14cb3 PP	233	unsigned long real_pc)
1da177e4 LT	234	{
	235	unsigned long *slot = NULL;
	236
f0882589	237	/* Simplest case is 'call', which always uses %o7 */
1da177e4 LT	238	if ((insn & 0xc0000000) == 0x40000000) {
	239	slot = &regs->u_regs[UREG_I7];
	240	}
	241
f0882589	242	/* 'jmpl' encodes the register inside of the opcode */
1da177e4 LT	243	if ((insn & 0xc1f80000) == 0x81c00000) {
	244	unsigned long rd = ((insn >> 25) & 0x1f);
	245
	246	if (rd <= 15) {
	247	slot = &regs->u_regs[rd];
	248	} else {
	249	/* Hard case, it goes onto the stack. */
	250	flushw_all();
	251
	252	rd -= 16;
	253	slot = (unsigned long *)
	254	(regs->u_regs[UREG_FP] + STACK_BIAS);
	255	slot += rd;
	256	}
	257	}
	258	if (slot != NULL)
	259	*slot = real_pc;
	260	}
	261
	262	/*
	263	* Called after single-stepping. p->addr is the address of the
f0882589	264	* instruction which has been replaced by the breakpoint
1da177e4 LT	265	* instruction. To avoid the SMP problems that can occur when we
	266	* temporarily put back the original opcode to single-step, we
	267	* single-stepped a copy of the instruction. The address of this
f0882589	268	* copy is &p->ainsn.insn[0].
1da177e4 LT	269	*
	270	* This function prepares to return from the post-single-step
	271	* breakpoint trap.
	272	*/
f215d985 AM	273	static void __kprobes resume_execution(struct kprobe *p,
f215d985 AM	274	struct pt_regs regs, struct kprobe_ctlblk kcb)
1da177e4 LT	275	{
	276	u32 insn = p->ainsn.insn[0];
	277
f0882589 DM	278	regs->tnpc = relbranch_fixup(insn, p, regs);
	279
	280	/* This assignment must occur after relbranch_fixup() */
f215d985	281	regs->tpc = kcb->kprobe_orig_tnpc;
f0882589	282
1da177e4 LT	283	retpc_fixup(regs, insn, (unsigned long) p->addr);
	284
	285	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
f215d985	286	kcb->kprobe_orig_tstate_pil);
1da177e4 LT	287	}
1da177e4 LT	288
07fab8da	289	static int __kprobes post_kprobe_handler(struct pt_regs *regs)
1da177e4	290	{
f215d985 AM	291	struct kprobe *cur = kprobe_running();
	292	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	293
	294	if (!cur)
1da177e4 LT	295	return 0;
1da177e4 LT	296
f215d985 AM	297	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
	298	kcb->kprobe_status = KPROBE_HIT_SSDONE;
	299	cur->post_handler(cur, regs, 0);
e539c233	300	}
1da177e4	301
f215d985	302	resume_execution(cur, regs, kcb);
1da177e4	303
e539c233	304	/Restore back the original saved kprobes variables and continue. /
f215d985 AM	305	if (kcb->kprobe_status == KPROBE_REENTER) {
f215d985 AM	306	restore_previous_kprobe(kcb);
e539c233 PP	307	goto out;
e539c233 PP	308	}
f215d985	309	reset_current_kprobe();
e539c233	310	out:
1da177e4 LT	311	preempt_enable_no_resched();
	312
	313	return 1;
	314	}
	315
127cda1e	316	int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
1da177e4	317	{
f215d985 AM	318	struct kprobe *cur = kprobe_running();
f215d985 AM	319	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
b6700096 PP	320	const struct exception_table_entry *entry;
	321
	322	switch(kcb->kprobe_status) {
	323	case KPROBE_HIT_SS:
	324	case KPROBE_REENTER:
	325	/*
	326	* We are here because the instruction being single
	327	* stepped caused a page fault. We reset the current
	328	* kprobe and the tpc points back to the probe address
	329	* and allow the page fault handler to continue as a
	330	* normal page fault.
	331	*/
	332	regs->tpc = (unsigned long)cur->addr;
	333	regs->tnpc = kcb->kprobe_orig_tnpc;
	334	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
	335	kcb->kprobe_orig_tstate_pil);
	336	if (kcb->kprobe_status == KPROBE_REENTER)
	337	restore_previous_kprobe(kcb);
	338	else
	339	reset_current_kprobe();
	340	preempt_enable_no_resched();
	341	break;
	342	case KPROBE_HIT_ACTIVE:
	343	case KPROBE_HIT_SSDONE:
	344	/*
	345	* We increment the nmissed count for accounting,
	346	* we can also use npre/npostfault count for accouting
	347	* these specific fault cases.
	348	*/
	349	kprobes_inc_nmissed_count(cur);
	350
	351	/*
	352	* We come here because instructions in the pre/post
	353	* handler caused the page_fault, this could happen
	354	* if handler tries to access user space by
	355	* copy_from_user(), get_user() etc. Let the
	356	* user-specified handler try to fix it first.
	357	*/
	358	if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
	359	return 1;
f215d985	360
b6700096 PP	361	/*
	362	* In case the user-specified fault handler returned
	363	* zero, try to fix up.
	364	*/
1da177e4	365
b6700096 PP	366	entry = search_exception_tables(regs->tpc);
	367	if (entry) {
	368	regs->tpc = entry->fixup;
	369	regs->tnpc = regs->tpc + 4;
	370	return 1;
	371	}
1da177e4	372
b6700096 PP	373	/*
	374	* fixup_exception() could not handle it,
	375	* Let do_page_fault() fix it.
	376	*/
	377	break;
	378	default:
	379	break;
1da177e4	380	}
b6700096	381
1da177e4 LT	382	return 0;
	383	}
	384
	385	/*
	386	* Wrapper routine to for handling exceptions.
	387	*/
05e14cb3 PP	388	int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
05e14cb3 PP	389	unsigned long val, void *data)
1da177e4 LT	390	{
1da177e4 LT	391	struct die_args args = (struct die_args )data;
66ff2d06 AM	392	int ret = NOTIFY_DONE;
66ff2d06 AM	393
2326c770	394	if (args->regs && user_mode(args->regs))
	395	return ret;
	396
1da177e4 LT	397	switch (val) {
	398	case DIE_DEBUG:
	399	if (kprobe_handler(args->regs))
66ff2d06	400	ret = NOTIFY_STOP;
1da177e4 LT	401	break;
	402	case DIE_DEBUG_2:
	403	if (post_kprobe_handler(args->regs))
66ff2d06	404	ret = NOTIFY_STOP;
1da177e4	405	break;
1da177e4 LT	406	default:
	407	break;
	408	}
66ff2d06	409	return ret;
1da177e4 LT	410	}
1da177e4 LT	411
05e14cb3 PP	412	asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
05e14cb3 PP	413	struct pt_regs *regs)
1da177e4 LT	414	{
	415	BUG_ON(trap_level != 0x170 && trap_level != 0x171);
	416
	417	if (user_mode(regs)) {
	418	local_irq_enable();
	419	bad_trap(regs, trap_level);
	420	return;
	421	}
	422
	423	/* trap_level == 0x170 --> ta 0x70
	424	* trap_level == 0x171 --> ta 0x71
	425	*/
	426	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
	427	(trap_level == 0x170) ? "debug" : "debug_2",
	428	regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
	429	bad_trap(regs, trap_level);
	430	}
	431
	432	/* Jprobes support. */
05e14cb3	433	int __kprobes setjmp_pre_handler(struct kprobe p, struct pt_regs regs)
1da177e4 LT	434	{
1da177e4 LT	435	struct jprobe *jp = container_of(p, struct jprobe, kp);
f215d985	436	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
1da177e4	437
f215d985	438	memcpy(&(kcb->jprobe_saved_regs), regs, sizeof(*regs));
1da177e4	439
1da177e4 LT	440	regs->tpc = (unsigned long) jp->entry;
	441	regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
	442	regs->tstate \|= TSTATE_PIL;
	443
	444	return 1;
	445	}
	446
05e14cb3	447	void __kprobes jprobe_return(void)
1da177e4	448	{
f0882589 DM	449	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	450	register unsigned long orig_fp asm("g1");
	451
	452	orig_fp = kcb->jprobe_saved_regs.u_regs[UREG_FP];
	453	__asm__ __volatile__("\n"
	454	"1: cmp %%sp, %0\n\t"
	455	"blu,a,pt %%xcc, 1b\n\t"
	456	" restore\n\t"
	457	".globl jprobe_return_trap_instruction\n"
1da177e4	458	"jprobe_return_trap_instruction:\n\t"
f0882589 DM	459	"ta 0x70"
	460	: /* no outputs */
	461	: "r" (orig_fp));
1da177e4 LT	462	}
	463
	464	extern void jprobe_return_trap_instruction(void);
	465
	466	extern void __show_regs(struct pt_regs * regs);
	467
05e14cb3	468	int __kprobes longjmp_break_handler(struct kprobe p, struct pt_regs regs)
1da177e4 LT	469	{
1da177e4 LT	470	u32 addr = (u32 ) regs->tpc;
f215d985	471	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
1da177e4 LT	472
1da177e4 LT	473	if (addr == (u32 *) jprobe_return_trap_instruction) {
f215d985	474	memcpy(regs, &(kcb->jprobe_saved_regs), sizeof(*regs));
d217d545	475	preempt_enable_no_resched();
1da177e4 LT	476	return 1;
	477	}
	478	return 0;
	479	}
e539c233	480
6772926b RL	481	/* architecture specific initialization */
	482	int arch_init_kprobes(void)
	483	{
	484	return 0;
	485	}