[deliverable/linux.git] / arch / sparc64 / kernel / unaligned.c

/* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $
 * unaligned.c: Unaligned load/store trap handling with special
 *              cases for the kernel to do them more quickly.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */


#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <asm/asi.h>
#include <asm/ptrace.h>
#include <asm/pstate.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/bitops.h>
#include <linux/kallsyms.h>
#include <asm/fpumacro.h>

/* #define DEBUG_MNA */

enum direction {
	load,    /* ld, ldd, ldh, ldsh */
	store,   /* st, std, sth, stsh */
	both,    /* Swap, ldstub, cas, ... */
	fpld,
	fpst,
	invalid,
};

#ifdef DEBUG_MNA
static char *dirstrings[] = {
  "load", "store", "both", "fpload", "fpstore", "invalid"
};
#endif

static inline enum direction decode_direction(unsigned int insn)
{
	unsigned long tmp = (insn >> 21) & 1;

	if (!tmp)
		return load;
	else {
		switch ((insn>>19)&0xf) {
		case 15: /* swap* */
			return both;
		default:
			return store;
		}
	}
}

/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
static inline int decode_access_size(unsigned int insn)
{
	unsigned int tmp;

	tmp = ((insn >> 19) & 0xf);
	if (tmp == 11 || tmp == 14) /* ldx/stx */
		return 8;
	tmp &= 3;
	if (!tmp)
		return 4;
	else if (tmp == 3)
		return 16;	/* ldd/std - Although it is actually 8 */
	else if (tmp == 2)
		return 2;
	else {
		printk("Impossible unaligned trap. insn=%08x\n", insn);
		die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);

		/* GCC should never warn that control reaches the end
		 * of this function without returning a value because
		 * die_if_kernel() is marked with attribute 'noreturn'.
		 * Alas, some versions do...
		 */

		return 0;
	}
}

static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
{
	if (insn & 0x800000) {
		if (insn & 0x2000)
			return (unsigned char)(regs->tstate >> 24);	/* %asi */
		else
			return (unsigned char)(insn >> 5);		/* imm_asi */
	} else
		return ASI_P;
}

/* 0x400000 = signed, 0 = unsigned */
static inline int decode_signedness(unsigned int insn)
{
	return (insn & 0x400000);
}

static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
				       unsigned int rd, int from_kernel)
{
	if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
		if (from_kernel != 0)
			__asm__ __volatile__("flushw");
		else
			flushw_user();
	}
}

static inline long sign_extend_imm13(long imm)
{
	return imm << 51 >> 51;
}

static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
{
	unsigned long value;
	
	if (reg < 16)
		return (!reg ? 0 : regs->u_regs[reg]);
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		value = win->locals[reg - 16];
	} else if (test_thread_flag(TIF_32BIT)) {
		struct reg_window32 __user *win32;
		win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		get_user(value, &win32->locals[reg - 16]);
	} else {
		struct reg_window __user *win;
		win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		get_user(value, &win->locals[reg - 16]);
	}
	return value;
}

static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
{
	if (reg < 16)
		return &regs->u_regs[reg];
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	} else if (test_thread_flag(TIF_32BIT)) {
		struct reg_window32 *win32;
		win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		return (unsigned long *)&win32->locals[reg - 16];
	} else {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	}
}

unsigned long compute_effective_address(struct pt_regs *regs,
					unsigned int insn, unsigned int rd)
{
	unsigned int rs1 = (insn >> 14) & 0x1f;
	unsigned int rs2 = insn & 0x1f;
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;

	if (insn & 0x2000) {
		maybe_flush_windows(rs1, 0, rd, from_kernel);
		return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
	} else {
		maybe_flush_windows(rs1, rs2, rd, from_kernel);
		return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
	}
}

/* This is just to make gcc think die_if_kernel does return... */
static void __attribute_used__ unaligned_panic(char *str, struct pt_regs *regs)
{
	die_if_kernel(str, regs);
}

extern int do_int_load(unsigned long *dest_reg, int size,
		       unsigned long *saddr, int is_signed, int asi);
	
extern int __do_int_store(unsigned long *dst_addr, int size,
			  unsigned long src_val, int asi);

static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
			       struct pt_regs *regs, int asi, int orig_asi)
{
	unsigned long zero = 0;
	unsigned long *src_val_p = &zero;
	unsigned long src_val;

	if (size == 16) {
		size = 8;
		zero = (((long)(reg_num ?
		        (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
			(unsigned)fetch_reg(reg_num + 1, regs);
	} else if (reg_num) {
		src_val_p = fetch_reg_addr(reg_num, regs);
	}
	src_val = *src_val_p;
	if (unlikely(asi != orig_asi)) {
		switch (size) {
		case 2:
			src_val = swab16(src_val);
			break;
		case 4:
			src_val = swab32(src_val);
			break;
		case 8:
			src_val = swab64(src_val);
			break;
		case 16:
		default:
			BUG();
			break;
		};
	}
	return __do_int_store(dst_addr, size, src_val, asi);
}

static inline void advance(struct pt_regs *regs)
{
	regs->tpc   = regs->tnpc;
	regs->tnpc += 4;
	if (test_thread_flag(TIF_32BIT)) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
}

static inline int floating_point_load_or_store_p(unsigned int insn)
{
	return (insn >> 24) & 1;
}

static inline int ok_for_kernel(unsigned int insn)
{
	return !floating_point_load_or_store_p(insn);
}

static void kernel_mna_trap_fault(int fixup_tstate_asi)
{
	struct pt_regs *regs = current_thread_info()->kern_una_regs;
	unsigned int insn = current_thread_info()->kern_una_insn;
	const struct exception_table_entry *entry;

	entry = search_exception_tables(regs->tpc);
	if (!entry) {
		unsigned long address;

		address = compute_effective_address(regs, insn,
						    ((insn >> 25) & 0x1f));
        	if (address < PAGE_SIZE) {
                	printk(KERN_ALERT "Unable to handle kernel NULL "
			       "pointer dereference in mna handler");
        	} else
                	printk(KERN_ALERT "Unable to handle kernel paging "
			       "request in mna handler");
	        printk(KERN_ALERT " at virtual address %016lx\n",address);
		printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
			(current->mm ? CTX_HWBITS(current->mm->context) :
			CTX_HWBITS(current->active_mm->context)));
		printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
			(current->mm ? (unsigned long) current->mm->pgd :
			(unsigned long) current->active_mm->pgd));
	        die_if_kernel("Oops", regs);
		/* Not reached */
	}
	regs->tpc = entry->fixup;
	regs->tnpc = regs->tpc + 4;

	if (fixup_tstate_asi) {
		regs->tstate &= ~TSTATE_ASI;
		regs->tstate |= (ASI_AIUS << 24UL);
	}
}

static void log_unaligned(struct pt_regs *regs)
{
	static unsigned long count, last_time;

	if (jiffies - last_time > 5 * HZ)
		count = 0;
	if (count < 5) {
		last_time = jiffies;
		count++;
		printk("Kernel unaligned access at TPC[%lx] ", regs->tpc);
		print_symbol("%s\n", regs->tpc);
	}
}

asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
{
	enum direction dir = decode_direction(insn);
	int size = decode_access_size(insn);
	int orig_asi, asi;

	current_thread_info()->kern_una_regs = regs;
	current_thread_info()->kern_una_insn = insn;

	orig_asi = asi = decode_asi(insn, regs);

	/* If this is a {get,put}_user() on an unaligned userspace pointer,
	 * just signal a fault and do not log the event.
	 */
	if (asi == ASI_AIUS) {
		kernel_mna_trap_fault(0);
		return;
	}

	log_unaligned(regs);

	if (!ok_for_kernel(insn) || dir == both) {
		printk("Unsupported unaligned load/store trap for kernel "
		       "at <%016lx>.\n", regs->tpc);
		unaligned_panic("Kernel does fpu/atomic "
				"unaligned load/store.", regs);

		kernel_mna_trap_fault(0);
	} else {
		unsigned long addr, *reg_addr;
		int err;

		addr = compute_effective_address(regs, insn,
						 ((insn >> 25) & 0x1f));
#ifdef DEBUG_MNA
		printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
		       "retpc[%016lx]\n",
		       regs->tpc, dirstrings[dir], addr, size,
		       regs->u_regs[UREG_RETPC]);
#endif
		switch (asi) {
		case ASI_NL:
		case ASI_AIUPL:
		case ASI_AIUSL:
		case ASI_PL:
		case ASI_SL:
		case ASI_PNFL:
		case ASI_SNFL:
			asi &= ~0x08;
			break;
		};
		switch (dir) {
		case load:
			reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
			err = do_int_load(reg_addr, size,
					  (unsigned long *) addr,
					  decode_signedness(insn), asi);
			if (likely(!err) && unlikely(asi != orig_asi)) {
				unsigned long val_in = *reg_addr;
				switch (size) {
				case 2:
					val_in = swab16(val_in);
					break;
				case 4:
					val_in = swab32(val_in);
					break;
				case 8:
					val_in = swab64(val_in);
					break;
				case 16:
				default:
					BUG();
					break;
				};
				*reg_addr = val_in;
			}
			break;

		case store:
			err = do_int_store(((insn>>25)&0x1f), size,
					   (unsigned long *) addr, regs,
					   asi, orig_asi);
			break;

		default:
			panic("Impossible kernel unaligned trap.");
			/* Not reached... */
		}
		if (unlikely(err))
			kernel_mna_trap_fault(1);
		else
			advance(regs);
	}
}

static char popc_helper[] = {
0, 1, 1, 2, 1, 2, 2, 3,
1, 2, 2, 3, 2, 3, 3, 4, 
};

int handle_popc(u32 insn, struct pt_regs *regs)
{
	u64 value;
	int ret, i, rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	                        
	if (insn & 0x2000) {
		maybe_flush_windows(0, 0, rd, from_kernel);
		value = sign_extend_imm13(insn);
	} else {
		maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
		value = fetch_reg(insn & 0x1f, regs);
	}
	for (ret = 0, i = 0; i < 16; i++) {
		ret += popc_helper[value & 0xf];
		value >>= 4;
	}
	if (rd < 16) {
		if (rd)
			regs->u_regs[rd] = ret;
	} else {
		if (test_thread_flag(TIF_32BIT)) {
			struct reg_window32 __user *win32;
			win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
			put_user(ret, &win32->locals[rd - 16]);
		} else {
			struct reg_window __user *win;
			win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
			put_user(ret, &win->locals[rd - 16]);
		}
	}
	advance(regs);
	return 1;
}

extern void do_fpother(struct pt_regs *regs);
extern void do_privact(struct pt_regs *regs);
extern void spitfire_data_access_exception(struct pt_regs *regs,
					   unsigned long sfsr,
					   unsigned long sfar);
extern void sun4v_data_access_exception(struct pt_regs *regs,
					unsigned long addr,
					unsigned long type_ctx);

int handle_ldf_stq(u32 insn, struct pt_regs *regs)
{
	unsigned long addr = compute_effective_address(regs, insn, 0);
	int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
	struct fpustate *f = FPUSTATE;
	int asi = decode_asi(insn, regs);
	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;

	save_and_clear_fpu();
	current_thread_info()->xfsr[0] &= ~0x1c000;
	if (freg & 3) {
		current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
		do_fpother(regs);
		return 0;
	}
	if (insn & 0x200000) {
		/* STQ */
		u64 first = 0, second = 0;
		
		if (current_thread_info()->fpsaved[0] & flag) {
			first = *(u64 *)&f->regs[freg];
			second = *(u64 *)&f->regs[freg+2];
		}
		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		}
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			{
				/* Need to convert endians */
				u64 tmp = __swab64p(&first);
				
				first = __swab64p(&second);
				second = tmp;
				break;
			}
		default:
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		if (put_user (first >> 32, (u32 __user *)addr) ||
		    __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
		    __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
		    __put_user ((u32)second, (u32 __user *)(addr + 12))) {
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
		    	return 1;
		}
	} else {
		/* LDF, LDDF, LDQF */
		u32 data[4] __attribute__ ((aligned(8)));
		int size, i;
		int err;

		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		} else if (asi > ASI_SNFL) {
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		switch (insn & 0x180000) {
		case 0x000000: size = 1; break;
		case 0x100000: size = 4; break;
		default: size = 2; break;
		}
		for (i = 0; i < size; i++)
			data[i] = 0;
		
		err = get_user (data[0], (u32 __user *) addr);
		if (!err) {
			for (i = 1; i < size; i++)
				err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
		}
		if (err && !(asi & 0x2 /* NF */)) {
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		if (asi & 0x8) /* Little */ {
			u64 tmp;

			switch (size) {
			case 1: data[0] = le32_to_cpup(data + 0); break;
			default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
				break;
			case 4: tmp = le64_to_cpup((u64 *)(data + 0));
				*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
				*(u64 *)(data + 2) = tmp;
				break;
			}
		}
		if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
			current_thread_info()->fpsaved[0] = FPRS_FEF;
			current_thread_info()->gsr[0] = 0;
		}
		if (!(current_thread_info()->fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		memcpy(f->regs + freg, data, size * 4);
		current_thread_info()->fpsaved[0] |= flag;
	}
	advance(regs);
	return 1;
}

void handle_ld_nf(u32 insn, struct pt_regs *regs)
{
	int rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	unsigned long *reg;
	                        
	maybe_flush_windows(0, 0, rd, from_kernel);
	reg = fetch_reg_addr(rd, regs);
	if (from_kernel || rd < 16) {
		reg[0] = 0;
		if ((insn & 0x780000) == 0x180000)
			reg[1] = 0;
	} else if (test_thread_flag(TIF_32BIT)) {
		put_user(0, (int __user *) reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, ((int __user *) reg) + 1);
	} else {
		put_user(0, (unsigned long __user *) reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, (unsigned long __user *) reg + 1);
	}
	advance(regs);
}

void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u32 first, second;
	u64 value;
	u8 freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if (tstate & TSTATE_PRIV)
		die_if_kernel("lddfmna from kernel", regs);
	if (test_thread_flag(TIF_32BIT))
		pc = (u32)pc;
	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
		int asi = decode_asi(insn, regs);
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		if (get_user(first, (u32 __user *)sfar) ||
		     get_user(second, (u32 __user *)(sfar + 4))) {
			if (asi & 0x2) /* NF */ {
				first = 0; second = 0;
			} else
				goto daex;
		}
		save_and_clear_fpu();
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		value = (((u64)first) << 32) | second;
		if (asi & 0x8) /* Little */
			value = __swab64p(&value);
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
			current_thread_info()->fpsaved[0] = FPRS_FEF;
			current_thread_info()->gsr[0] = 0;
		}
		if (!(current_thread_info()->fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		*(u64 *)(f->regs + freg) = value;
		current_thread_info()->fpsaved[0] |= flag;
	} else {
daex:
		if (tlb_type == hypervisor)
			sun4v_data_access_exception(regs, sfar, sfsr);
		else
			spitfire_data_access_exception(regs, sfsr, sfar);
		return;
	}
	advance(regs);
	return;
}

void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u64 value;
	u8 freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if (tstate & TSTATE_PRIV)
		die_if_kernel("stdfmna from kernel", regs);
	if (test_thread_flag(TIF_32BIT))
		pc = (u32)pc;
	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
		int asi = decode_asi(insn, regs);
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		value = 0;
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		save_and_clear_fpu();
		if (current_thread_info()->fpsaved[0] & flag)
			value = *(u64 *)&f->regs[freg];
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			value = __swab64p(&value); break;
		default: goto daex;
		}
		if (put_user (value >> 32, (u32 __user *) sfar) ||
		    __put_user ((u32)value, (u32 __user *)(sfar + 4)))
			goto daex;
	} else {
daex:
		if (tlb_type == hypervisor)
			sun4v_data_access_exception(regs, sfar, sfsr);
		else
			spitfire_data_access_exception(regs, sfsr, sfar);
		return;
	}
	advance(regs);
	return;
}
Commit	Line	Data
1da177e4 LT	1	/* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $
	2	* unaligned.c: Unaligned load/store trap handling with special
	3	* cases for the kernel to do them more quickly.
	4	*
	5	* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
	6	* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	7	*/
	8
	9
	10	#include <linux/kernel.h>
	11	#include <linux/sched.h>
	12	#include <linux/mm.h>
	13	#include <linux/module.h>
	14	#include <asm/asi.h>
	15	#include <asm/ptrace.h>
	16	#include <asm/pstate.h>
	17	#include <asm/processor.h>
	18	#include <asm/system.h>
	19	#include <asm/uaccess.h>
	20	#include <linux/smp.h>
	21	#include <linux/smp_lock.h>
	22	#include <linux/bitops.h>
675f740e	23	#include <linux/kallsyms.h>
1da177e4 LT	24	#include <asm/fpumacro.h>
	25
	26	/* #define DEBUG_MNA */
	27
	28	enum direction {
	29	load, /* ld, ldd, ldh, ldsh */
	30	store, /* st, std, sth, stsh */
	31	both, /* Swap, ldstub, cas, ... */
	32	fpld,
	33	fpst,
	34	invalid,
	35	};
	36
	37	#ifdef DEBUG_MNA
	38	static char *dirstrings[] = {
	39	"load", "store", "both", "fpload", "fpstore", "invalid"
	40	};
	41	#endif
	42
	43	static inline enum direction decode_direction(unsigned int insn)
	44	{
	45	unsigned long tmp = (insn >> 21) & 1;
	46
	47	if (!tmp)
	48	return load;
	49	else {
	50	switch ((insn>>19)&0xf) {
	51	case 15: /* swap* */
	52	return both;
	53	default:
	54	return store;
	55	}
	56	}
	57	}
	58
	59	/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
	60	static inline int decode_access_size(unsigned int insn)
	61	{
	62	unsigned int tmp;
	63
	64	tmp = ((insn >> 19) & 0xf);
	65	if (tmp == 11 \|\| tmp == 14) /* ldx/stx */
	66	return 8;
	67	tmp &= 3;
	68	if (!tmp)
	69	return 4;
	70	else if (tmp == 3)
	71	return 16; /* ldd/std - Although it is actually 8 */
	72	else if (tmp == 2)
	73	return 2;
	74	else {
	75	printk("Impossible unaligned trap. insn=%08x\n", insn);
	76	die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
	77
	78	/* GCC should never warn that control reaches the end
	79	* of this function without returning a value because
	80	* die_if_kernel() is marked with attribute 'noreturn'.
	81	* Alas, some versions do...
	82	*/
	83
	84	return 0;
	85	}
	86	}
	87
88	static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
89	{
90	if (insn & 0x800000) {
91	if (insn & 0x2000)
92	return (unsigned char)(regs->tstate >> 24); /* %asi */
93	else
94	return (unsigned char)(insn >> 5); /* imm_asi */
95	} else
96	return ASI_P;
97	}
98
99	/* 0x400000 = signed, 0 = unsigned */
100	static inline int decode_signedness(unsigned int insn)
101	{
102	return (insn & 0x400000);
103	}
104
105	static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
106	unsigned int rd, int from_kernel)
107	{
108	if (rs2 >= 16 \|\| rs1 >= 16 \|\| rd >= 16) {
109	if (from_kernel != 0)
110	__asm__ __volatile__("flushw");
111	else
112	flushw_user();
113	}
114	}
115
116	static inline long sign_extend_imm13(long imm)
117	{
118	return imm << 51 >> 51;
119	}
120
121	static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
122	{
123	unsigned long value;
124
125	if (reg < 16)
126	return (!reg ? 0 : regs->u_regs[reg]);
127	if (regs->tstate & TSTATE_PRIV) {
128	struct reg_window *win;
129	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
130	value = win->locals[reg - 16];
131	} else if (test_thread_flag(TIF_32BIT)) {
132	struct reg_window32 __user *win32;
133	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
134	get_user(value, &win32->locals[reg - 16]);
135	} else {
136	struct reg_window __user *win;
137	win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
138	get_user(value, &win->locals[reg - 16]);
139	}
140	return value;
141	}
142
143	static unsigned long fetch_reg_addr(unsigned int reg, struct pt_regs regs)
144	{
145	if (reg < 16)
146	return &regs->u_regs[reg];
147	if (regs->tstate & TSTATE_PRIV) {
148	struct reg_window *win;
149	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
150	return &win->locals[reg - 16];
151	} else if (test_thread_flag(TIF_32BIT)) {
152	struct reg_window32 *win32;
153	win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
154	return (unsigned long *)&win32->locals[reg - 16];
155	} else {
156	struct reg_window *win;
157	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
158	return &win->locals[reg - 16];
159	}
160	}
161
162	unsigned long compute_effective_address(struct pt_regs *regs,
163	unsigned int insn, unsigned int rd)
164	{
165	unsigned int rs1 = (insn >> 14) & 0x1f;
166	unsigned int rs2 = insn & 0x1f;
167	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
168
169	if (insn & 0x2000) {
170	maybe_flush_windows(rs1, 0, rd, from_kernel);
171	return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
172	} else {
173	maybe_flush_windows(rs1, rs2, rd, from_kernel);
174	return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
175	}
176	}
177
178	/* This is just to make gcc think die_if_kernel does return... */
179	static void __attribute_used__ unaligned_panic(char str, struct pt_regs regs)
180	{
181	die_if_kernel(str, regs);
182	}
183
5fd29752 DM	184	extern int do_int_load(unsigned long *dest_reg, int size,
5fd29752 DM	185	unsigned long *saddr, int is_signed, int asi);
1da177e4	186
5fd29752 DM	187	extern int __do_int_store(unsigned long *dst_addr, int size,
5fd29752 DM	188	unsigned long src_val, int asi);
a3f99858	189
5fd29752 DM	190	static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
5fd29752 DM	191	struct pt_regs *regs, int asi, int orig_asi)
a3f99858 DM	192	{
a3f99858 DM	193	unsigned long zero = 0;
ff171d8f DM	194	unsigned long *src_val_p = &zero;
ff171d8f DM	195	unsigned long src_val;
a3f99858 DM	196
	197	if (size == 16) {
	198	size = 8;
	199	zero = (((long)(reg_num ?
	200	(unsigned)fetch_reg(reg_num, regs) : 0)) << 32) \|
	201	(unsigned)fetch_reg(reg_num + 1, regs);
	202	} else if (reg_num) {
ff171d8f DM	203	src_val_p = fetch_reg_addr(reg_num, regs);
	204	}
	205	src_val = *src_val_p;
	206	if (unlikely(asi != orig_asi)) {
	207	switch (size) {
	208	case 2:
	209	src_val = swab16(src_val);
	210	break;
	211	case 4:
	212	src_val = swab32(src_val);
	213	break;
	214	case 8:
	215	src_val = swab64(src_val);
	216	break;
	217	case 16:
	218	default:
	219	BUG();
	220	break;
	221	};
a3f99858	222	}
5fd29752	223	return __do_int_store(dst_addr, size, src_val, asi);
a3f99858	224	}
1da177e4 LT	225
	226	static inline void advance(struct pt_regs *regs)
	227	{
	228	regs->tpc = regs->tnpc;
	229	regs->tnpc += 4;
	230	if (test_thread_flag(TIF_32BIT)) {
	231	regs->tpc &= 0xffffffff;
	232	regs->tnpc &= 0xffffffff;
	233	}
	234	}
	235
	236	static inline int floating_point_load_or_store_p(unsigned int insn)
	237	{
	238	return (insn >> 24) & 1;
	239	}
	240
	241	static inline int ok_for_kernel(unsigned int insn)
	242	{
	243	return !floating_point_load_or_store_p(insn);
	244	}
	245
c449c38b	246	static void kernel_mna_trap_fault(int fixup_tstate_asi)
1da177e4	247	{
a3f99858 DM	248	struct pt_regs *regs = current_thread_info()->kern_una_regs;
a3f99858 DM	249	unsigned int insn = current_thread_info()->kern_una_insn;
8cf14af0	250	const struct exception_table_entry *entry;
1da177e4	251
8cf14af0 DM	252	entry = search_exception_tables(regs->tpc);
8cf14af0 DM	253	if (!entry) {
a3f99858 DM	254	unsigned long address;
	255
	256	address = compute_effective_address(regs, insn,
	257	((insn >> 25) & 0x1f));
1da177e4	258	if (address < PAGE_SIZE) {
a3f99858 DM	259	printk(KERN_ALERT "Unable to handle kernel NULL "
a3f99858 DM	260	"pointer dereference in mna handler");
1da177e4	261	} else
a3f99858 DM	262	printk(KERN_ALERT "Unable to handle kernel paging "
a3f99858 DM	263	"request in mna handler");
1da177e4	264	printk(KERN_ALERT " at virtual address %016lx\n",address);
a3f99858	265	printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
1da177e4 LT	266	(current->mm ? CTX_HWBITS(current->mm->context) :
1da177e4 LT	267	CTX_HWBITS(current->active_mm->context)));
a3f99858	268	printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
1da177e4 LT	269	(current->mm ? (unsigned long) current->mm->pgd :
	270	(unsigned long) current->active_mm->pgd));
	271	die_if_kernel("Oops", regs);
	272	/* Not reached */
	273	}
8cf14af0	274	regs->tpc = entry->fixup;
1da177e4	275	regs->tnpc = regs->tpc + 4;
1da177e4	276
c449c38b DM	277	if (fixup_tstate_asi) {
	278	regs->tstate &= ~TSTATE_ASI;
	279	regs->tstate \|= (ASI_AIUS << 24UL);
	280	}
1da177e4 LT	281	}
1da177e4 LT	282
c449c38b	283	static void log_unaligned(struct pt_regs *regs)
1da177e4	284	{
27cc64c7	285	static unsigned long count, last_time;
a3f99858	286
27cc64c7 DM	287	if (jiffies - last_time > 5 * HZ)
	288	count = 0;
	289	if (count < 5) {
	290	last_time = jiffies;
	291	count++;
675f740e DM	292	printk("Kernel unaligned access at TPC[%lx] ", regs->tpc);
675f740e DM	293	print_symbol("%s\n", regs->tpc);
27cc64c7	294	}
c449c38b DM	295	}
	296
	297	asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
	298	{
	299	enum direction dir = decode_direction(insn);
	300	int size = decode_access_size(insn);
	301	int orig_asi, asi;
	302
	303	current_thread_info()->kern_una_regs = regs;
	304	current_thread_info()->kern_una_insn = insn;
	305
	306	orig_asi = asi = decode_asi(insn, regs);
	307
	308	/* If this is a {get,put}_user() on an unaligned userspace pointer,
	309	* just signal a fault and do not log the event.
	310	*/
	311	if (asi == ASI_AIUS) {
	312	kernel_mna_trap_fault(0);
	313	return;
	314	}
	315
	316	log_unaligned(regs);
27cc64c7	317
1da177e4	318	if (!ok_for_kernel(insn) \|\| dir == both) {
a3f99858 DM	319	printk("Unsupported unaligned load/store trap for kernel "
	320	"at <%016lx>.\n", regs->tpc);
	321	unaligned_panic("Kernel does fpu/atomic "
	322	"unaligned load/store.", regs);
	323
c449c38b	324	kernel_mna_trap_fault(0);
1da177e4	325	} else {
705747ab	326	unsigned long addr, *reg_addr;
c449c38b	327	int err;
1da177e4	328
a3f99858 DM	329	addr = compute_effective_address(regs, insn,
a3f99858 DM	330	((insn >> 25) & 0x1f));
1da177e4	331	#ifdef DEBUG_MNA
a3f99858 DM	332	printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
	333	"retpc[%016lx]\n",
	334	regs->tpc, dirstrings[dir], addr, size,
	335	regs->u_regs[UREG_RETPC]);
1da177e4	336	#endif
ff171d8f DM	337	switch (asi) {
	338	case ASI_NL:
	339	case ASI_AIUPL:
	340	case ASI_AIUSL:
	341	case ASI_PL:
	342	case ASI_SL:
	343	case ASI_PNFL:
	344	case ASI_SNFL:
	345	asi &= ~0x08;
	346	break;
	347	};
1da177e4 LT	348	switch (dir) {
1da177e4 LT	349	case load:
705747ab	350	reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
5fd29752 DM	351	err = do_int_load(reg_addr, size,
	352	(unsigned long *) addr,
	353	decode_signedness(insn), asi);
	354	if (likely(!err) && unlikely(asi != orig_asi)) {
705747ab	355	unsigned long val_in = *reg_addr;
ff171d8f DM	356	switch (size) {
	357	case 2:
	358	val_in = swab16(val_in);
	359	break;
	360	case 4:
	361	val_in = swab32(val_in);
	362	break;
	363	case 8:
	364	val_in = swab64(val_in);
	365	break;
	366	case 16:
	367	default:
	368	BUG();
	369	break;
	370	};
705747ab	371	*reg_addr = val_in;
ff171d8f	372	}
1da177e4 LT	373	break;
	374
	375	case store:
5fd29752 DM	376	err = do_int_store(((insn>>25)&0x1f), size,
	377	(unsigned long *) addr, regs,
	378	asi, orig_asi);
1da177e4	379	break;
a3f99858	380
1da177e4 LT	381	default:
	382	panic("Impossible kernel unaligned trap.");
	383	/* Not reached... */
	384	}
5fd29752	385	if (unlikely(err))
c449c38b	386	kernel_mna_trap_fault(1);
5fd29752 DM	387	else
5fd29752 DM	388	advance(regs);
1da177e4 LT	389	}
	390	}
	391
	392	static char popc_helper[] = {
	393	0, 1, 1, 2, 1, 2, 2, 3,
	394	1, 2, 2, 3, 2, 3, 3, 4,
	395	};
	396
	397	int handle_popc(u32 insn, struct pt_regs *regs)
	398	{
	399	u64 value;
	400	int ret, i, rd = ((insn >> 25) & 0x1f);
	401	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	402
	403	if (insn & 0x2000) {
	404	maybe_flush_windows(0, 0, rd, from_kernel);
	405	value = sign_extend_imm13(insn);
	406	} else {
	407	maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
	408	value = fetch_reg(insn & 0x1f, regs);
	409	}
	410	for (ret = 0, i = 0; i < 16; i++) {
	411	ret += popc_helper[value & 0xf];
	412	value >>= 4;
	413	}
	414	if (rd < 16) {
	415	if (rd)
	416	regs->u_regs[rd] = ret;
	417	} else {
	418	if (test_thread_flag(TIF_32BIT)) {
	419	struct reg_window32 __user *win32;
	420	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
	421	put_user(ret, &win32->locals[rd - 16]);
	422	} else {
	423	struct reg_window __user *win;
	424	win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
	425	put_user(ret, &win->locals[rd - 16]);
	426	}
	427	}
	428	advance(regs);
	429	return 1;
	430	}
	431
	432	extern void do_fpother(struct pt_regs *regs);
	433	extern void do_privact(struct pt_regs *regs);
6c52a96e DM	434	extern void spitfire_data_access_exception(struct pt_regs *regs,
	435	unsigned long sfsr,
	436	unsigned long sfar);
ed6b0b45 DM	437	extern void sun4v_data_access_exception(struct pt_regs *regs,
	438	unsigned long addr,
	439	unsigned long type_ctx);
1da177e4 LT	440
	441	int handle_ldf_stq(u32 insn, struct pt_regs *regs)
	442	{
	443	unsigned long addr = compute_effective_address(regs, insn, 0);
	444	int freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
	445	struct fpustate *f = FPUSTATE;
	446	int asi = decode_asi(insn, regs);
	447	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	448
	449	save_and_clear_fpu();
	450	current_thread_info()->xfsr[0] &= ~0x1c000;
	451	if (freg & 3) {
	452	current_thread_info()->xfsr[0] \|= (6 << 14) /* invalid_fp_register */;
	453	do_fpother(regs);
	454	return 0;
	455	}
	456	if (insn & 0x200000) {
	457	/* STQ */
	458	u64 first = 0, second = 0;
	459
	460	if (current_thread_info()->fpsaved[0] & flag) {
	461	first = (u64 )&f->regs[freg];
	462	second = (u64 )&f->regs[freg+2];
	463	}
	464	if (asi < 0x80) {
	465	do_privact(regs);
	466	return 1;
	467	}
	468	switch (asi) {
	469	case ASI_P:
	470	case ASI_S: break;
	471	case ASI_PL:
	472	case ASI_SL:
	473	{
	474	/* Need to convert endians */
	475	u64 tmp = __swab64p(&first);
	476
	477	first = __swab64p(&second);
	478	second = tmp;
	479	break;
	480	}
	481	default:
ed6b0b45 DM	482	if (tlb_type == hypervisor)
	483	sun4v_data_access_exception(regs, addr, 0);
	484	else
	485	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	486	return 1;
	487	}
	488	if (put_user (first >> 32, (u32 __user *)addr) \|\|
	489	__put_user ((u32)first, (u32 __user *)(addr + 4)) \|\|
	490	__put_user (second >> 32, (u32 __user *)(addr + 8)) \|\|
	491	__put_user ((u32)second, (u32 __user *)(addr + 12))) {
ed6b0b45 DM	492	if (tlb_type == hypervisor)
	493	sun4v_data_access_exception(regs, addr, 0);
	494	else
	495	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	496	return 1;
	497	}
	498	} else {
	499	/* LDF, LDDF, LDQF */
	500	u32 data[4] __attribute__ ((aligned(8)));
	501	int size, i;
	502	int err;
	503
	504	if (asi < 0x80) {
	505	do_privact(regs);
	506	return 1;
	507	} else if (asi > ASI_SNFL) {
ed6b0b45 DM	508	if (tlb_type == hypervisor)
	509	sun4v_data_access_exception(regs, addr, 0);
	510	else
	511	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	512	return 1;
	513	}
	514	switch (insn & 0x180000) {
	515	case 0x000000: size = 1; break;
	516	case 0x100000: size = 4; break;
	517	default: size = 2; break;
	518	}
	519	for (i = 0; i < size; i++)
	520	data[i] = 0;
	521
	522	err = get_user (data[0], (u32 __user *) addr);
	523	if (!err) {
	524	for (i = 1; i < size; i++)
	525	err \|= __get_user (data[i], (u32 __user )(addr + 4i));
	526	}
	527	if (err && !(asi & 0x2 /* NF */)) {
ed6b0b45 DM	528	if (tlb_type == hypervisor)
	529	sun4v_data_access_exception(regs, addr, 0);
	530	else
	531	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	532	return 1;
	533	}
	534	if (asi & 0x8) /* Little */ {
	535	u64 tmp;
	536
	537	switch (size) {
	538	case 1: data[0] = le32_to_cpup(data + 0); break;
	539	default:(u64 )(data + 0) = le64_to_cpup((u64 *)(data + 0));
	540	break;
	541	case 4: tmp = le64_to_cpup((u64 *)(data + 0));
	542	(u64 )(data + 0) = le64_to_cpup((u64 *)(data + 2));
	543	(u64 )(data + 2) = tmp;
	544	break;
	545	}
	546	}
	547	if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
	548	current_thread_info()->fpsaved[0] = FPRS_FEF;
	549	current_thread_info()->gsr[0] = 0;
	550	}
	551	if (!(current_thread_info()->fpsaved[0] & flag)) {
	552	if (freg < 32)
	553	memset(f->regs, 0, 32*sizeof(u32));
	554	else
	555	memset(f->regs+32, 0, 32*sizeof(u32));
	556	}
	557	memcpy(f->regs + freg, data, size * 4);
	558	current_thread_info()->fpsaved[0] \|= flag;
	559	}
	560	advance(regs);
	561	return 1;
	562	}
	563
	564	void handle_ld_nf(u32 insn, struct pt_regs *regs)
	565	{
	566	int rd = ((insn >> 25) & 0x1f);
	567	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	568	unsigned long *reg;
	569
	570	maybe_flush_windows(0, 0, rd, from_kernel);
	571	reg = fetch_reg_addr(rd, regs);
	572	if (from_kernel \|\| rd < 16) {
	573	reg[0] = 0;
	574	if ((insn & 0x780000) == 0x180000)
	575	reg[1] = 0;
	576	} else if (test_thread_flag(TIF_32BIT)) {
	577	put_user(0, (int __user *) reg);
	578	if ((insn & 0x780000) == 0x180000)
	579	put_user(0, ((int __user *) reg) + 1);
	580	} else {
	581	put_user(0, (unsigned long __user *) reg);
	582	if ((insn & 0x780000) == 0x180000)
	583	put_user(0, (unsigned long __user *) reg + 1);
	584	}
	585	advance(regs);
	586	}
	587
	588	void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
	589	{
	590	unsigned long pc = regs->tpc;
	591	unsigned long tstate = regs->tstate;
	592	u32 insn;
	593	u32 first, second;
	594	u64 value;
ed6b0b45	595	u8 freg;
1da177e4 LT	596	int flag;
	597	struct fpustate *f = FPUSTATE;
	598
	599	if (tstate & TSTATE_PRIV)
	600	die_if_kernel("lddfmna from kernel", regs);
	601	if (test_thread_flag(TIF_32BIT))
	602	pc = (u32)pc;
	603	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
ed6b0b45	604	int asi = decode_asi(insn, regs);
1da177e4 LT	605	if ((asi > ASI_SNFL) \|\|
	606	(asi < ASI_P))
	607	goto daex;
	608	if (get_user(first, (u32 __user *)sfar) \|\|
	609	get_user(second, (u32 __user *)(sfar + 4))) {
	610	if (asi & 0x2) /* NF */ {
	611	first = 0; second = 0;
	612	} else
	613	goto daex;
	614	}
	615	save_and_clear_fpu();
	616	freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
	617	value = (((u64)first) << 32) \| second;
	618	if (asi & 0x8) /* Little */
	619	value = __swab64p(&value);
	620	flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	621	if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
	622	current_thread_info()->fpsaved[0] = FPRS_FEF;
	623	current_thread_info()->gsr[0] = 0;
	624	}
	625	if (!(current_thread_info()->fpsaved[0] & flag)) {
	626	if (freg < 32)
	627	memset(f->regs, 0, 32*sizeof(u32));
	628	else
	629	memset(f->regs+32, 0, 32*sizeof(u32));
	630	}
	631	(u64 )(f->regs + freg) = value;
	632	current_thread_info()->fpsaved[0] \|= flag;
	633	} else {
ed6b0b45 DM	634	daex:
	635	if (tlb_type == hypervisor)
	636	sun4v_data_access_exception(regs, sfar, sfsr);
	637	else
	638	spitfire_data_access_exception(regs, sfsr, sfar);
1da177e4 LT	639	return;
	640	}
	641	advance(regs);
	642	return;
	643	}
	644
	645	void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
	646	{
	647	unsigned long pc = regs->tpc;
	648	unsigned long tstate = regs->tstate;
	649	u32 insn;
	650	u64 value;
ed6b0b45	651	u8 freg;
1da177e4 LT	652	int flag;
	653	struct fpustate *f = FPUSTATE;
	654
	655	if (tstate & TSTATE_PRIV)
	656	die_if_kernel("stdfmna from kernel", regs);
	657	if (test_thread_flag(TIF_32BIT))
	658	pc = (u32)pc;
	659	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
ed6b0b45	660	int asi = decode_asi(insn, regs);
1da177e4	661	freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
1da177e4 LT	662	value = 0;
	663	flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	664	if ((asi > ASI_SNFL) \|\|
	665	(asi < ASI_P))
	666	goto daex;
	667	save_and_clear_fpu();
	668	if (current_thread_info()->fpsaved[0] & flag)
	669	value = (u64 )&f->regs[freg];
	670	switch (asi) {
	671	case ASI_P:
	672	case ASI_S: break;
	673	case ASI_PL:
	674	case ASI_SL:
	675	value = __swab64p(&value); break;
	676	default: goto daex;
	677	}
	678	if (put_user (value >> 32, (u32 __user *) sfar) \|\|
	679	__put_user ((u32)value, (u32 __user *)(sfar + 4)))
	680	goto daex;
	681	} else {
ed6b0b45 DM	682	daex:
	683	if (tlb_type == hypervisor)
	684	sun4v_data_access_exception(regs, sfar, sfsr);
	685	else
	686	spitfire_data_access_exception(regs, sfsr, sfar);
1da177e4 LT	687	return;
	688	}
	689	advance(regs);
	690	return;
	691	}