[deliverable/linux.git] / arch / sparc64 / kernel / unaligned.c

/* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $
 * unaligned.c: Unaligned load/store trap handling with special
 *              cases for the kernel to do them more quickly.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */


#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <asm/asi.h>
#include <asm/ptrace.h>
#include <asm/pstate.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/bitops.h>
#include <asm/fpumacro.h>

/* #define DEBUG_MNA */

enum direction {
	load,    /* ld, ldd, ldh, ldsh */
	store,   /* st, std, sth, stsh */
	both,    /* Swap, ldstub, cas, ... */
	fpld,
	fpst,
	invalid,
};

#ifdef DEBUG_MNA
static char *dirstrings[] = {
  "load", "store", "both", "fpload", "fpstore", "invalid"
};
#endif

static inline enum direction decode_direction(unsigned int insn)
{
	unsigned long tmp = (insn >> 21) & 1;

	if (!tmp)
		return load;
	else {
		switch ((insn>>19)&0xf) {
		case 15: /* swap* */
			return both;
		default:
			return store;
		}
	}
}

/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
static inline int decode_access_size(unsigned int insn)
{
	unsigned int tmp;

	tmp = ((insn >> 19) & 0xf);
	if (tmp == 11 || tmp == 14) /* ldx/stx */
		return 8;
	tmp &= 3;
	if (!tmp)
		return 4;
	else if (tmp == 3)
		return 16;	/* ldd/std - Although it is actually 8 */
	else if (tmp == 2)
		return 2;
	else {
		printk("Impossible unaligned trap. insn=%08x\n", insn);
		die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);

		/* GCC should never warn that control reaches the end
		 * of this function without returning a value because
		 * die_if_kernel() is marked with attribute 'noreturn'.
		 * Alas, some versions do...
		 */

		return 0;
	}
}

static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
{
	if (insn & 0x800000) {
		if (insn & 0x2000)
			return (unsigned char)(regs->tstate >> 24);	/* %asi */
		else
			return (unsigned char)(insn >> 5);		/* imm_asi */
	} else
		return ASI_P;
}

/* 0x400000 = signed, 0 = unsigned */
static inline int decode_signedness(unsigned int insn)
{
	return (insn & 0x400000);
}

static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
				       unsigned int rd, int from_kernel)
{
	if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
		if (from_kernel != 0)
			__asm__ __volatile__("flushw");
		else
			flushw_user();
	}
}

static inline long sign_extend_imm13(long imm)
{
	return imm << 51 >> 51;
}

static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
{
	unsigned long value;
	
	if (reg < 16)
		return (!reg ? 0 : regs->u_regs[reg]);
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		value = win->locals[reg - 16];
	} else if (test_thread_flag(TIF_32BIT)) {
		struct reg_window32 __user *win32;
		win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		get_user(value, &win32->locals[reg - 16]);
	} else {
		struct reg_window __user *win;
		win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		get_user(value, &win->locals[reg - 16]);
	}
	return value;
}

static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
{
	if (reg < 16)
		return &regs->u_regs[reg];
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	} else if (test_thread_flag(TIF_32BIT)) {
		struct reg_window32 *win32;
		win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		return (unsigned long *)&win32->locals[reg - 16];
	} else {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	}
}

unsigned long compute_effective_address(struct pt_regs *regs,
					unsigned int insn, unsigned int rd)
{
	unsigned int rs1 = (insn >> 14) & 0x1f;
	unsigned int rs2 = insn & 0x1f;
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;

	if (insn & 0x2000) {
		maybe_flush_windows(rs1, 0, rd, from_kernel);
		return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
	} else {
		maybe_flush_windows(rs1, rs2, rd, from_kernel);
		return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
	}
}

/* This is just to make gcc think die_if_kernel does return... */
static void __attribute_used__ unaligned_panic(char *str, struct pt_regs *regs)
{
	die_if_kernel(str, regs);
}

extern void do_int_load(unsigned long *dest_reg, int size,
			unsigned long *saddr, int is_signed, int asi);
	
extern void __do_int_store(unsigned long *dst_addr, int size,
			   unsigned long src_val, int asi);

static inline void do_int_store(int reg_num, int size, unsigned long *dst_addr,
				struct pt_regs *regs, int asi, int orig_asi)
{
	unsigned long zero = 0;
	unsigned long *src_val_p = &zero;
	unsigned long src_val;

	if (size == 16) {
		size = 8;
		zero = (((long)(reg_num ?
		        (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
			(unsigned)fetch_reg(reg_num + 1, regs);
	} else if (reg_num) {
		src_val_p = fetch_reg_addr(reg_num, regs);
	}
	src_val = *src_val_p;
	if (unlikely(asi != orig_asi)) {
		switch (size) {
		case 2:
			src_val = swab16(src_val);
			break;
		case 4:
			src_val = swab32(src_val);
			break;
		case 8:
			src_val = swab64(src_val);
			break;
		case 16:
		default:
			BUG();
			break;
		};
	}
	__do_int_store(dst_addr, size, src_val, asi);
}

static inline void advance(struct pt_regs *regs)
{
	regs->tpc   = regs->tnpc;
	regs->tnpc += 4;
	if (test_thread_flag(TIF_32BIT)) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
}

static inline int floating_point_load_or_store_p(unsigned int insn)
{
	return (insn >> 24) & 1;
}

static inline int ok_for_kernel(unsigned int insn)
{
	return !floating_point_load_or_store_p(insn);
}

void kernel_mna_trap_fault(void)
{
	struct pt_regs *regs = current_thread_info()->kern_una_regs;
	unsigned int insn = current_thread_info()->kern_una_insn;
	unsigned long g2 = regs->u_regs[UREG_G2];
	unsigned long fixup = search_extables_range(regs->tpc, &g2);

	if (!fixup) {
		unsigned long address;

		address = compute_effective_address(regs, insn,
						    ((insn >> 25) & 0x1f));
        	if (address < PAGE_SIZE) {
                	printk(KERN_ALERT "Unable to handle kernel NULL "
			       "pointer dereference in mna handler");
        	} else
                	printk(KERN_ALERT "Unable to handle kernel paging "
			       "request in mna handler");
	        printk(KERN_ALERT " at virtual address %016lx\n",address);
		printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
			(current->mm ? CTX_HWBITS(current->mm->context) :
			CTX_HWBITS(current->active_mm->context)));
		printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
			(current->mm ? (unsigned long) current->mm->pgd :
			(unsigned long) current->active_mm->pgd));
	        die_if_kernel("Oops", regs);
		/* Not reached */
	}
	regs->tpc = fixup;
	regs->tnpc = regs->tpc + 4;
	regs->u_regs [UREG_G2] = g2;

	regs->tstate &= ~TSTATE_ASI;
	regs->tstate |= (ASI_AIUS << 24UL);
}

asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, unsigned long sfar, unsigned long sfsr)
{
	enum direction dir = decode_direction(insn);
	int size = decode_access_size(insn);

	current_thread_info()->kern_una_regs = regs;
	current_thread_info()->kern_una_insn = insn;

	if (!ok_for_kernel(insn) || dir == both) {
		printk("Unsupported unaligned load/store trap for kernel "
		       "at <%016lx>.\n", regs->tpc);
		unaligned_panic("Kernel does fpu/atomic "
				"unaligned load/store.", regs);

		kernel_mna_trap_fault();
	} else {
		unsigned long addr;
		int orig_asi, asi;

		addr = compute_effective_address(regs, insn,
						 ((insn >> 25) & 0x1f));
#ifdef DEBUG_MNA
		printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
		       "retpc[%016lx]\n",
		       regs->tpc, dirstrings[dir], addr, size,
		       regs->u_regs[UREG_RETPC]);
#endif
		orig_asi = asi = decode_asi(insn, regs);
		switch (asi) {
		case ASI_NL:
		case ASI_AIUPL:
		case ASI_AIUSL:
		case ASI_PL:
		case ASI_SL:
		case ASI_PNFL:
		case ASI_SNFL:
			asi &= ~0x08;
			break;
		};
		switch (dir) {
		case load:
			do_int_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
				    size, (unsigned long *) addr,
				    decode_signedness(insn), asi);
			if (unlikely(asi != orig_asi)) {
				unsigned long val_in = *(unsigned long *) addr;
				switch (size) {
				case 2:
					val_in = swab16(val_in);
					break;
				case 4:
					val_in = swab32(val_in);
					break;
				case 8:
					val_in = swab64(val_in);
					break;
				case 16:
				default:
					BUG();
					break;
				};
				*(unsigned long *) addr = val_in;
			}
			break;

		case store:
			do_int_store(((insn>>25)&0x1f), size,
				     (unsigned long *) addr, regs,
				     asi, orig_asi);
			break;

		default:
			panic("Impossible kernel unaligned trap.");
			/* Not reached... */
		}
		advance(regs);
	}
}

static char popc_helper[] = {
0, 1, 1, 2, 1, 2, 2, 3,
1, 2, 2, 3, 2, 3, 3, 4, 
};

int handle_popc(u32 insn, struct pt_regs *regs)
{
	u64 value;
	int ret, i, rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	                        
	if (insn & 0x2000) {
		maybe_flush_windows(0, 0, rd, from_kernel);
		value = sign_extend_imm13(insn);
	} else {
		maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
		value = fetch_reg(insn & 0x1f, regs);
	}
	for (ret = 0, i = 0; i < 16; i++) {
		ret += popc_helper[value & 0xf];
		value >>= 4;
	}
	if (rd < 16) {
		if (rd)
			regs->u_regs[rd] = ret;
	} else {
		if (test_thread_flag(TIF_32BIT)) {
			struct reg_window32 __user *win32;
			win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
			put_user(ret, &win32->locals[rd - 16]);
		} else {
			struct reg_window __user *win;
			win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
			put_user(ret, &win->locals[rd - 16]);
		}
	}
	advance(regs);
	return 1;
}

extern void do_fpother(struct pt_regs *regs);
extern void do_privact(struct pt_regs *regs);
extern void spitfire_data_access_exception(struct pt_regs *regs,
					   unsigned long sfsr,
					   unsigned long sfar);

int handle_ldf_stq(u32 insn, struct pt_regs *regs)
{
	unsigned long addr = compute_effective_address(regs, insn, 0);
	int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
	struct fpustate *f = FPUSTATE;
	int asi = decode_asi(insn, regs);
	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;

	save_and_clear_fpu();
	current_thread_info()->xfsr[0] &= ~0x1c000;
	if (freg & 3) {
		current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
		do_fpother(regs);
		return 0;
	}
	if (insn & 0x200000) {
		/* STQ */
		u64 first = 0, second = 0;
		
		if (current_thread_info()->fpsaved[0] & flag) {
			first = *(u64 *)&f->regs[freg];
			second = *(u64 *)&f->regs[freg+2];
		}
		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		}
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			{
				/* Need to convert endians */
				u64 tmp = __swab64p(&first);
				
				first = __swab64p(&second);
				second = tmp;
				break;
			}
		default:
			spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		if (put_user (first >> 32, (u32 __user *)addr) ||
		    __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
		    __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
		    __put_user ((u32)second, (u32 __user *)(addr + 12))) {
		    	spitfire_data_access_exception(regs, 0, addr);
		    	return 1;
		}
	} else {
		/* LDF, LDDF, LDQF */
		u32 data[4] __attribute__ ((aligned(8)));
		int size, i;
		int err;

		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		} else if (asi > ASI_SNFL) {
			spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		switch (insn & 0x180000) {
		case 0x000000: size = 1; break;
		case 0x100000: size = 4; break;
		default: size = 2; break;
		}
		for (i = 0; i < size; i++)
			data[i] = 0;
		
		err = get_user (data[0], (u32 __user *) addr);
		if (!err) {
			for (i = 1; i < size; i++)
				err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
		}
		if (err && !(asi & 0x2 /* NF */)) {
			spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		if (asi & 0x8) /* Little */ {
			u64 tmp;

			switch (size) {
			case 1: data[0] = le32_to_cpup(data + 0); break;
			default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
				break;
			case 4: tmp = le64_to_cpup((u64 *)(data + 0));
				*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
				*(u64 *)(data + 2) = tmp;
				break;
			}
		}
		if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
			current_thread_info()->fpsaved[0] = FPRS_FEF;
			current_thread_info()->gsr[0] = 0;
		}
		if (!(current_thread_info()->fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		memcpy(f->regs + freg, data, size * 4);
		current_thread_info()->fpsaved[0] |= flag;
	}
	advance(regs);
	return 1;
}

void handle_ld_nf(u32 insn, struct pt_regs *regs)
{
	int rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	unsigned long *reg;
	                        
	maybe_flush_windows(0, 0, rd, from_kernel);
	reg = fetch_reg_addr(rd, regs);
	if (from_kernel || rd < 16) {
		reg[0] = 0;
		if ((insn & 0x780000) == 0x180000)
			reg[1] = 0;
	} else if (test_thread_flag(TIF_32BIT)) {
		put_user(0, (int __user *) reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, ((int __user *) reg) + 1);
	} else {
		put_user(0, (unsigned long __user *) reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, (unsigned long __user *) reg + 1);
	}
	advance(regs);
}

void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u32 first, second;
	u64 value;
	u8 asi, freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if (tstate & TSTATE_PRIV)
		die_if_kernel("lddfmna from kernel", regs);
	if (test_thread_flag(TIF_32BIT))
		pc = (u32)pc;
	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
		asi = sfsr >> 16;
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		if (get_user(first, (u32 __user *)sfar) ||
		     get_user(second, (u32 __user *)(sfar + 4))) {
			if (asi & 0x2) /* NF */ {
				first = 0; second = 0;
			} else
				goto daex;
		}
		save_and_clear_fpu();
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		value = (((u64)first) << 32) | second;
		if (asi & 0x8) /* Little */
			value = __swab64p(&value);
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
			current_thread_info()->fpsaved[0] = FPRS_FEF;
			current_thread_info()->gsr[0] = 0;
		}
		if (!(current_thread_info()->fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		*(u64 *)(f->regs + freg) = value;
		current_thread_info()->fpsaved[0] |= flag;
	} else {
daex:		spitfire_data_access_exception(regs, sfsr, sfar);
		return;
	}
	advance(regs);
	return;
}

void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u64 value;
	u8 asi, freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if (tstate & TSTATE_PRIV)
		die_if_kernel("stdfmna from kernel", regs);
	if (test_thread_flag(TIF_32BIT))
		pc = (u32)pc;
	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		asi = sfsr >> 16;
		value = 0;
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		save_and_clear_fpu();
		if (current_thread_info()->fpsaved[0] & flag)
			value = *(u64 *)&f->regs[freg];
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			value = __swab64p(&value); break;
		default: goto daex;
		}
		if (put_user (value >> 32, (u32 __user *) sfar) ||
		    __put_user ((u32)value, (u32 __user *)(sfar + 4)))
			goto daex;
	} else {
daex:		spitfire_data_access_exception(regs, sfsr, sfar);
		return;
	}
	advance(regs);
	return;
}
Commit	Line	Data
1da177e4 LT	1	/* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $
	2	* unaligned.c: Unaligned load/store trap handling with special
	3	* cases for the kernel to do them more quickly.
	4	*
	5	* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
	6	* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	7	*/
	8
	9
	10	#include <linux/kernel.h>
	11	#include <linux/sched.h>
	12	#include <linux/mm.h>
	13	#include <linux/module.h>
	14	#include <asm/asi.h>
	15	#include <asm/ptrace.h>
	16	#include <asm/pstate.h>
	17	#include <asm/processor.h>
	18	#include <asm/system.h>
	19	#include <asm/uaccess.h>
	20	#include <linux/smp.h>
	21	#include <linux/smp_lock.h>
	22	#include <linux/bitops.h>
	23	#include <asm/fpumacro.h>
	24
	25	/* #define DEBUG_MNA */
	26
	27	enum direction {
	28	load, /* ld, ldd, ldh, ldsh */
	29	store, /* st, std, sth, stsh */
	30	both, /* Swap, ldstub, cas, ... */
	31	fpld,
	32	fpst,
	33	invalid,
	34	};
	35
	36	#ifdef DEBUG_MNA
	37	static char *dirstrings[] = {
	38	"load", "store", "both", "fpload", "fpstore", "invalid"
	39	};
	40	#endif
	41
	42	static inline enum direction decode_direction(unsigned int insn)
	43	{
	44	unsigned long tmp = (insn >> 21) & 1;
	45
	46	if (!tmp)
	47	return load;
	48	else {
	49	switch ((insn>>19)&0xf) {
	50	case 15: /* swap* */
	51	return both;
	52	default:
	53	return store;
	54	}
	55	}
	56	}
	57
	58	/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
	59	static inline int decode_access_size(unsigned int insn)
	60	{
	61	unsigned int tmp;
	62
	63	tmp = ((insn >> 19) & 0xf);
	64	if (tmp == 11 \|\| tmp == 14) /* ldx/stx */
65	return 8;
66	tmp &= 3;
67	if (!tmp)
68	return 4;
69	else if (tmp == 3)
70	return 16; /* ldd/std - Although it is actually 8 */
71	else if (tmp == 2)
72	return 2;
73	else {
74	printk("Impossible unaligned trap. insn=%08x\n", insn);
75	die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
76
77	/* GCC should never warn that control reaches the end
78	* of this function without returning a value because
79	* die_if_kernel() is marked with attribute 'noreturn'.
80	* Alas, some versions do...
81	*/
82
83	return 0;
84	}
85	}
86
87	static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
88	{
89	if (insn & 0x800000) {
90	if (insn & 0x2000)
91	return (unsigned char)(regs->tstate >> 24); /* %asi */
92	else
93	return (unsigned char)(insn >> 5); /* imm_asi */
94	} else
95	return ASI_P;
96	}
97
98	/* 0x400000 = signed, 0 = unsigned */
99	static inline int decode_signedness(unsigned int insn)
100	{
101	return (insn & 0x400000);
102	}
103
104	static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
105	unsigned int rd, int from_kernel)
106	{
107	if (rs2 >= 16 \|\| rs1 >= 16 \|\| rd >= 16) {
108	if (from_kernel != 0)
109	__asm__ __volatile__("flushw");
110	else
111	flushw_user();
112	}
113	}
114
115	static inline long sign_extend_imm13(long imm)
116	{
117	return imm << 51 >> 51;
118	}
119
120	static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
121	{
122	unsigned long value;
123
124	if (reg < 16)
125	return (!reg ? 0 : regs->u_regs[reg]);
126	if (regs->tstate & TSTATE_PRIV) {
127	struct reg_window *win;
128	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
129	value = win->locals[reg - 16];
130	} else if (test_thread_flag(TIF_32BIT)) {
131	struct reg_window32 __user *win32;
132	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
133	get_user(value, &win32->locals[reg - 16]);
134	} else {
135	struct reg_window __user *win;
136	win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
137	get_user(value, &win->locals[reg - 16]);
138	}
139	return value;
140	}
141
142	static unsigned long fetch_reg_addr(unsigned int reg, struct pt_regs regs)
143	{
144	if (reg < 16)
145	return &regs->u_regs[reg];
146	if (regs->tstate & TSTATE_PRIV) {
147	struct reg_window *win;
148	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
149	return &win->locals[reg - 16];
150	} else if (test_thread_flag(TIF_32BIT)) {
151	struct reg_window32 *win32;
152	win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
153	return (unsigned long *)&win32->locals[reg - 16];
154	} else {
155	struct reg_window *win;
156	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
157	return &win->locals[reg - 16];
158	}
159	}
160
161	unsigned long compute_effective_address(struct pt_regs *regs,
162	unsigned int insn, unsigned int rd)
163	{
164	unsigned int rs1 = (insn >> 14) & 0x1f;
165	unsigned int rs2 = insn & 0x1f;
166	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
167
168	if (insn & 0x2000) {
169	maybe_flush_windows(rs1, 0, rd, from_kernel);
170	return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
171	} else {
172	maybe_flush_windows(rs1, rs2, rd, from_kernel);
173	return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
174	}
175	}
176
177	/* This is just to make gcc think die_if_kernel does return... */
178	static void __attribute_used__ unaligned_panic(char str, struct pt_regs regs)
179	{
180	die_if_kernel(str, regs);
181	}
182
a3f99858 DM	183	extern void do_int_load(unsigned long *dest_reg, int size,
a3f99858 DM	184	unsigned long *saddr, int is_signed, int asi);
1da177e4	185
a3f99858	186	extern void __do_int_store(unsigned long *dst_addr, int size,
ff171d8f	187	unsigned long src_val, int asi);
a3f99858 DM	188
a3f99858 DM	189	static inline void do_int_store(int reg_num, int size, unsigned long *dst_addr,
ff171d8f	190	struct pt_regs *regs, int asi, int orig_asi)
a3f99858 DM	191	{
a3f99858 DM	192	unsigned long zero = 0;
ff171d8f DM	193	unsigned long *src_val_p = &zero;
ff171d8f DM	194	unsigned long src_val;
a3f99858 DM	195
	196	if (size == 16) {
	197	size = 8;
	198	zero = (((long)(reg_num ?
	199	(unsigned)fetch_reg(reg_num, regs) : 0)) << 32) \|
	200	(unsigned)fetch_reg(reg_num + 1, regs);
	201	} else if (reg_num) {
ff171d8f DM	202	src_val_p = fetch_reg_addr(reg_num, regs);
	203	}
	204	src_val = *src_val_p;
	205	if (unlikely(asi != orig_asi)) {
	206	switch (size) {
	207	case 2:
	208	src_val = swab16(src_val);
	209	break;
	210	case 4:
	211	src_val = swab32(src_val);
	212	break;
	213	case 8:
	214	src_val = swab64(src_val);
	215	break;
	216	case 16:
	217	default:
	218	BUG();
	219	break;
	220	};
a3f99858 DM	221	}
	222	__do_int_store(dst_addr, size, src_val, asi);
	223	}
1da177e4 LT	224
	225	static inline void advance(struct pt_regs *regs)
	226	{
	227	regs->tpc = regs->tnpc;
	228	regs->tnpc += 4;
	229	if (test_thread_flag(TIF_32BIT)) {
	230	regs->tpc &= 0xffffffff;
	231	regs->tnpc &= 0xffffffff;
	232	}
	233	}
	234
	235	static inline int floating_point_load_or_store_p(unsigned int insn)
	236	{
	237	return (insn >> 24) & 1;
	238	}
	239
	240	static inline int ok_for_kernel(unsigned int insn)
	241	{
	242	return !floating_point_load_or_store_p(insn);
	243	}
	244
a3f99858	245	void kernel_mna_trap_fault(void)
1da177e4	246	{
a3f99858 DM	247	struct pt_regs *regs = current_thread_info()->kern_una_regs;
	248	unsigned int insn = current_thread_info()->kern_una_insn;
	249	unsigned long g2 = regs->u_regs[UREG_G2];
1da177e4 LT	250	unsigned long fixup = search_extables_range(regs->tpc, &g2);
	251
	252	if (!fixup) {
a3f99858 DM	253	unsigned long address;
	254
	255	address = compute_effective_address(regs, insn,
	256	((insn >> 25) & 0x1f));
1da177e4	257	if (address < PAGE_SIZE) {
a3f99858 DM	258	printk(KERN_ALERT "Unable to handle kernel NULL "
a3f99858 DM	259	"pointer dereference in mna handler");
1da177e4	260	} else
a3f99858 DM	261	printk(KERN_ALERT "Unable to handle kernel paging "
a3f99858 DM	262	"request in mna handler");
1da177e4	263	printk(KERN_ALERT " at virtual address %016lx\n",address);
a3f99858	264	printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
1da177e4 LT	265	(current->mm ? CTX_HWBITS(current->mm->context) :
1da177e4 LT	266	CTX_HWBITS(current->active_mm->context)));
a3f99858	267	printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
1da177e4 LT	268	(current->mm ? (unsigned long) current->mm->pgd :
	269	(unsigned long) current->active_mm->pgd));
	270	die_if_kernel("Oops", regs);
	271	/* Not reached */
	272	}
	273	regs->tpc = fixup;
	274	regs->tnpc = regs->tpc + 4;
	275	regs->u_regs [UREG_G2] = g2;
	276
	277	regs->tstate &= ~TSTATE_ASI;
	278	regs->tstate \|= (ASI_AIUS << 24UL);
	279	}
	280
	281	asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, unsigned long sfar, unsigned long sfsr)
	282	{
	283	enum direction dir = decode_direction(insn);
	284	int size = decode_access_size(insn);
	285
a3f99858 DM	286	current_thread_info()->kern_una_regs = regs;
	287	current_thread_info()->kern_una_insn = insn;
	288
1da177e4	289	if (!ok_for_kernel(insn) \|\| dir == both) {
a3f99858 DM	290	printk("Unsupported unaligned load/store trap for kernel "
	291	"at <%016lx>.\n", regs->tpc);
	292	unaligned_panic("Kernel does fpu/atomic "
	293	"unaligned load/store.", regs);
	294
	295	kernel_mna_trap_fault();
1da177e4	296	} else {
a3f99858	297	unsigned long addr;
ff171d8f	298	int orig_asi, asi;
1da177e4	299
a3f99858 DM	300	addr = compute_effective_address(regs, insn,
a3f99858 DM	301	((insn >> 25) & 0x1f));
1da177e4	302	#ifdef DEBUG_MNA
a3f99858 DM	303	printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
	304	"retpc[%016lx]\n",
	305	regs->tpc, dirstrings[dir], addr, size,
	306	regs->u_regs[UREG_RETPC]);
1da177e4	307	#endif
ff171d8f DM	308	orig_asi = asi = decode_asi(insn, regs);
	309	switch (asi) {
	310	case ASI_NL:
	311	case ASI_AIUPL:
	312	case ASI_AIUSL:
	313	case ASI_PL:
	314	case ASI_SL:
	315	case ASI_PNFL:
	316	case ASI_SNFL:
	317	asi &= ~0x08;
	318	break;
	319	};
1da177e4 LT	320	switch (dir) {
1da177e4 LT	321	case load:
a3f99858 DM	322	do_int_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
a3f99858 DM	323	size, (unsigned long *) addr,
ff171d8f DM	324	decode_signedness(insn), asi);
	325	if (unlikely(asi != orig_asi)) {
	326	unsigned long val_in = (unsigned long ) addr;
	327	switch (size) {
	328	case 2:
	329	val_in = swab16(val_in);
	330	break;
	331	case 4:
	332	val_in = swab32(val_in);
	333	break;
	334	case 8:
	335	val_in = swab64(val_in);
	336	break;
	337	case 16:
	338	default:
	339	BUG();
	340	break;
	341	};
	342	(unsigned long ) addr = val_in;
	343	}
1da177e4 LT	344	break;
	345
	346	case store:
a3f99858 DM	347	do_int_store(((insn>>25)&0x1f), size,
a3f99858 DM	348	(unsigned long *) addr, regs,
ff171d8f	349	asi, orig_asi);
1da177e4	350	break;
a3f99858	351
1da177e4 LT	352	default:
	353	panic("Impossible kernel unaligned trap.");
	354	/* Not reached... */
	355	}
	356	advance(regs);
	357	}
	358	}
	359
	360	static char popc_helper[] = {
	361	0, 1, 1, 2, 1, 2, 2, 3,
	362	1, 2, 2, 3, 2, 3, 3, 4,
	363	};
	364
	365	int handle_popc(u32 insn, struct pt_regs *regs)
	366	{
	367	u64 value;
	368	int ret, i, rd = ((insn >> 25) & 0x1f);
	369	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	370
	371	if (insn & 0x2000) {
	372	maybe_flush_windows(0, 0, rd, from_kernel);
	373	value = sign_extend_imm13(insn);
	374	} else {
	375	maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
	376	value = fetch_reg(insn & 0x1f, regs);
	377	}
	378	for (ret = 0, i = 0; i < 16; i++) {
	379	ret += popc_helper[value & 0xf];
	380	value >>= 4;
	381	}
	382	if (rd < 16) {
	383	if (rd)
	384	regs->u_regs[rd] = ret;
	385	} else {
	386	if (test_thread_flag(TIF_32BIT)) {
	387	struct reg_window32 __user *win32;
	388	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
	389	put_user(ret, &win32->locals[rd - 16]);
	390	} else {
	391	struct reg_window __user *win;
	392	win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
	393	put_user(ret, &win->locals[rd - 16]);
	394	}
	395	}
	396	advance(regs);
	397	return 1;
	398	}
	399
	400	extern void do_fpother(struct pt_regs *regs);
	401	extern void do_privact(struct pt_regs *regs);
6c52a96e DM	402	extern void spitfire_data_access_exception(struct pt_regs *regs,
	403	unsigned long sfsr,
	404	unsigned long sfar);
1da177e4 LT	405
	406	int handle_ldf_stq(u32 insn, struct pt_regs *regs)
	407	{
	408	unsigned long addr = compute_effective_address(regs, insn, 0);
	409	int freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
	410	struct fpustate *f = FPUSTATE;
	411	int asi = decode_asi(insn, regs);
	412	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	413
	414	save_and_clear_fpu();
	415	current_thread_info()->xfsr[0] &= ~0x1c000;
	416	if (freg & 3) {
	417	current_thread_info()->xfsr[0] \|= (6 << 14) /* invalid_fp_register */;
	418	do_fpother(regs);
	419	return 0;
	420	}
	421	if (insn & 0x200000) {
	422	/* STQ */
	423	u64 first = 0, second = 0;
	424
	425	if (current_thread_info()->fpsaved[0] & flag) {
	426	first = (u64 )&f->regs[freg];
	427	second = (u64 )&f->regs[freg+2];
	428	}
	429	if (asi < 0x80) {
	430	do_privact(regs);
	431	return 1;
	432	}
	433	switch (asi) {
	434	case ASI_P:
	435	case ASI_S: break;
	436	case ASI_PL:
	437	case ASI_SL:
	438	{
	439	/* Need to convert endians */
	440	u64 tmp = __swab64p(&first);
	441
	442	first = __swab64p(&second);
	443	second = tmp;
	444	break;
	445	}
	446	default:
6c52a96e	447	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	448	return 1;
	449	}
	450	if (put_user (first >> 32, (u32 __user *)addr) \|\|
	451	__put_user ((u32)first, (u32 __user *)(addr + 4)) \|\|
	452	__put_user (second >> 32, (u32 __user *)(addr + 8)) \|\|
	453	__put_user ((u32)second, (u32 __user *)(addr + 12))) {
6c52a96e	454	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	455	return 1;
	456	}
	457	} else {
	458	/* LDF, LDDF, LDQF */
	459	u32 data[4] __attribute__ ((aligned(8)));
	460	int size, i;
	461	int err;
	462
	463	if (asi < 0x80) {
	464	do_privact(regs);
	465	return 1;
	466	} else if (asi > ASI_SNFL) {
6c52a96e	467	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	468	return 1;
	469	}
	470	switch (insn & 0x180000) {
	471	case 0x000000: size = 1; break;
	472	case 0x100000: size = 4; break;
	473	default: size = 2; break;
	474	}
	475	for (i = 0; i < size; i++)
	476	data[i] = 0;
	477
	478	err = get_user (data[0], (u32 __user *) addr);
	479	if (!err) {
	480	for (i = 1; i < size; i++)
	481	err \|= __get_user (data[i], (u32 __user )(addr + 4i));
	482	}
	483	if (err && !(asi & 0x2 /* NF */)) {
6c52a96e	484	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	485	return 1;
	486	}
	487	if (asi & 0x8) /* Little */ {
	488	u64 tmp;
	489
	490	switch (size) {
	491	case 1: data[0] = le32_to_cpup(data + 0); break;
	492	default:(u64 )(data + 0) = le64_to_cpup((u64 *)(data + 0));
	493	break;
	494	case 4: tmp = le64_to_cpup((u64 *)(data + 0));
	495	(u64 )(data + 0) = le64_to_cpup((u64 *)(data + 2));
	496	(u64 )(data + 2) = tmp;
	497	break;
	498	}
	499	}
	500	if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
	501	current_thread_info()->fpsaved[0] = FPRS_FEF;
	502	current_thread_info()->gsr[0] = 0;
	503	}
	504	if (!(current_thread_info()->fpsaved[0] & flag)) {
	505	if (freg < 32)
	506	memset(f->regs, 0, 32*sizeof(u32));
	507	else
	508	memset(f->regs+32, 0, 32*sizeof(u32));
	509	}
	510	memcpy(f->regs + freg, data, size * 4);
	511	current_thread_info()->fpsaved[0] \|= flag;
	512	}
	513	advance(regs);
	514	return 1;
	515	}
	516
	517	void handle_ld_nf(u32 insn, struct pt_regs *regs)
	518	{
	519	int rd = ((insn >> 25) & 0x1f);
	520	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	521	unsigned long *reg;
	522
	523	maybe_flush_windows(0, 0, rd, from_kernel);
	524	reg = fetch_reg_addr(rd, regs);
	525	if (from_kernel \|\| rd < 16) {
	526	reg[0] = 0;
	527	if ((insn & 0x780000) == 0x180000)
	528	reg[1] = 0;
	529	} else if (test_thread_flag(TIF_32BIT)) {
	530	put_user(0, (int __user *) reg);
	531	if ((insn & 0x780000) == 0x180000)
	532	put_user(0, ((int __user *) reg) + 1);
	533	} else {
	534	put_user(0, (unsigned long __user *) reg);
	535	if ((insn & 0x780000) == 0x180000)
	536	put_user(0, (unsigned long __user *) reg + 1);
	537	}
	538	advance(regs);
	539	}
	540
	541	void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
	542	{
	543	unsigned long pc = regs->tpc;
	544	unsigned long tstate = regs->tstate;
	545	u32 insn;
	546	u32 first, second;
	547	u64 value;
	548	u8 asi, freg;
549	int flag;
550	struct fpustate *f = FPUSTATE;
551
552	if (tstate & TSTATE_PRIV)
553	die_if_kernel("lddfmna from kernel", regs);
554	if (test_thread_flag(TIF_32BIT))
555	pc = (u32)pc;
556	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
557	asi = sfsr >> 16;
558	if ((asi > ASI_SNFL) \|\|
559	(asi < ASI_P))
560	goto daex;
561	if (get_user(first, (u32 __user *)sfar) \|\|
562	get_user(second, (u32 __user *)(sfar + 4))) {
563	if (asi & 0x2) /* NF */ {
564	first = 0; second = 0;
565	} else
566	goto daex;
567	}
568	save_and_clear_fpu();
569	freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
570	value = (((u64)first) << 32) \| second;
571	if (asi & 0x8) /* Little */
572	value = __swab64p(&value);
573	flag = (freg < 32) ? FPRS_DL : FPRS_DU;
574	if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
575	current_thread_info()->fpsaved[0] = FPRS_FEF;
576	current_thread_info()->gsr[0] = 0;
577	}
578	if (!(current_thread_info()->fpsaved[0] & flag)) {
579	if (freg < 32)
580	memset(f->regs, 0, 32*sizeof(u32));
581	else
582	memset(f->regs+32, 0, 32*sizeof(u32));
583	}
584	(u64 )(f->regs + freg) = value;
585	current_thread_info()->fpsaved[0] \|= flag;
586	} else {
6c52a96e	587	daex: spitfire_data_access_exception(regs, sfsr, sfar);
1da177e4 LT	588	return;
	589	}
	590	advance(regs);
	591	return;
	592	}
	593
	594	void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
	595	{
	596	unsigned long pc = regs->tpc;
	597	unsigned long tstate = regs->tstate;
	598	u32 insn;
	599	u64 value;
	600	u8 asi, freg;
	601	int flag;
	602	struct fpustate *f = FPUSTATE;
	603
	604	if (tstate & TSTATE_PRIV)
	605	die_if_kernel("stdfmna from kernel", regs);
	606	if (test_thread_flag(TIF_32BIT))
	607	pc = (u32)pc;
	608	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
	609	freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
	610	asi = sfsr >> 16;
	611	value = 0;
	612	flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	613	if ((asi > ASI_SNFL) \|\|
	614	(asi < ASI_P))
	615	goto daex;
	616	save_and_clear_fpu();
	617	if (current_thread_info()->fpsaved[0] & flag)
	618	value = (u64 )&f->regs[freg];
	619	switch (asi) {
	620	case ASI_P:
	621	case ASI_S: break;
	622	case ASI_PL:
	623	case ASI_SL:
	624	value = __swab64p(&value); break;
	625	default: goto daex;
	626	}
	627	if (put_user (value >> 32, (u32 __user *) sfar) \|\|
	628	__put_user ((u32)value, (u32 __user *)(sfar + 4)))
	629	goto daex;
	630	} else {
6c52a96e	631	daex: spitfire_data_access_exception(regs, sfsr, sfar);
1da177e4 LT	632	return;
	633	}
	634	advance(regs);
	635	return;
	636	}