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867e359b CM |
1 | /* |
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation, version 2. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
11 | * NON INFRINGEMENT. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | ||
15 | #ifndef _ASM_TILE_IO_H | |
16 | #define _ASM_TILE_IO_H | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/bug.h> | |
20 | #include <asm/page.h> | |
21 | ||
22 | #define IO_SPACE_LIMIT 0xfffffffful | |
23 | ||
24 | /* | |
25 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
26 | * access. | |
27 | */ | |
28 | #define xlate_dev_mem_ptr(p) __va(p) | |
29 | ||
30 | /* | |
31 | * Convert a virtual cached pointer to an uncached pointer. | |
32 | */ | |
33 | #define xlate_dev_kmem_ptr(p) p | |
34 | ||
35 | /* | |
36 | * Change "struct page" to physical address. | |
37 | */ | |
38 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) | |
39 | ||
40 | /* | |
41 | * Some places try to pass in an loff_t for PHYSADDR (?!), so we cast it to | |
42 | * long before casting it to a pointer to avoid compiler warnings. | |
43 | */ | |
44 | #if CHIP_HAS_MMIO() | |
45 | extern void __iomem *ioremap(resource_size_t offset, unsigned long size); | |
46 | extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, | |
47 | pgprot_t pgprot); | |
48 | extern void iounmap(volatile void __iomem *addr); | |
49 | #else | |
50 | #define ioremap(physaddr, size) ((void __iomem *)(unsigned long)(physaddr)) | |
51 | #define iounmap(addr) ((void)0) | |
52 | #endif | |
53 | ||
54 | #define ioremap_nocache(physaddr, size) ioremap(physaddr, size) | |
55 | #define ioremap_writethrough(physaddr, size) ioremap(physaddr, size) | |
56 | #define ioremap_fullcache(physaddr, size) ioremap(physaddr, size) | |
57 | ||
867e359b CM |
58 | #define mmiowb() |
59 | ||
60 | /* Conversion between virtual and physical mappings. */ | |
61 | #define mm_ptov(addr) ((void *)phys_to_virt(addr)) | |
62 | #define mm_vtop(addr) ((unsigned long)virt_to_phys(addr)) | |
63 | ||
64 | #ifdef CONFIG_PCI | |
65 | ||
66 | extern u8 _tile_readb(unsigned long addr); | |
67 | extern u16 _tile_readw(unsigned long addr); | |
68 | extern u32 _tile_readl(unsigned long addr); | |
69 | extern u64 _tile_readq(unsigned long addr); | |
70 | extern void _tile_writeb(u8 val, unsigned long addr); | |
71 | extern void _tile_writew(u16 val, unsigned long addr); | |
72 | extern void _tile_writel(u32 val, unsigned long addr); | |
73 | extern void _tile_writeq(u64 val, unsigned long addr); | |
74 | ||
75 | #else | |
76 | ||
77 | /* | |
78 | * The Tile architecture does not support IOMEM unless PCI is enabled. | |
79 | * Unfortunately we can't yet simply not declare these methods, | |
80 | * since some generic code that compiles into the kernel, but | |
81 | * we never run, uses them unconditionally. | |
82 | */ | |
83 | ||
84 | static inline int iomem_panic(void) | |
85 | { | |
86 | panic("readb/writeb and friends do not exist on tile without PCI"); | |
87 | return 0; | |
88 | } | |
89 | ||
90 | static inline u8 _tile_readb(unsigned long addr) | |
91 | { | |
92 | return iomem_panic(); | |
93 | } | |
94 | ||
95 | static inline u16 _tile_readw(unsigned long addr) | |
96 | { | |
97 | return iomem_panic(); | |
98 | } | |
99 | ||
100 | static inline u32 _tile_readl(unsigned long addr) | |
101 | { | |
102 | return iomem_panic(); | |
103 | } | |
104 | ||
105 | static inline u64 _tile_readq(unsigned long addr) | |
106 | { | |
107 | return iomem_panic(); | |
108 | } | |
109 | ||
110 | static inline void _tile_writeb(u8 val, unsigned long addr) | |
111 | { | |
112 | iomem_panic(); | |
113 | } | |
114 | ||
115 | static inline void _tile_writew(u16 val, unsigned long addr) | |
116 | { | |
117 | iomem_panic(); | |
118 | } | |
119 | ||
120 | static inline void _tile_writel(u32 val, unsigned long addr) | |
121 | { | |
122 | iomem_panic(); | |
123 | } | |
124 | ||
125 | static inline void _tile_writeq(u64 val, unsigned long addr) | |
126 | { | |
127 | iomem_panic(); | |
128 | } | |
129 | ||
130 | #endif | |
131 | ||
132 | #define readb(addr) _tile_readb((unsigned long)addr) | |
133 | #define readw(addr) _tile_readw((unsigned long)addr) | |
134 | #define readl(addr) _tile_readl((unsigned long)addr) | |
135 | #define readq(addr) _tile_readq((unsigned long)addr) | |
136 | #define writeb(val, addr) _tile_writeb(val, (unsigned long)addr) | |
137 | #define writew(val, addr) _tile_writew(val, (unsigned long)addr) | |
138 | #define writel(val, addr) _tile_writel(val, (unsigned long)addr) | |
139 | #define writeq(val, addr) _tile_writeq(val, (unsigned long)addr) | |
140 | ||
141 | #define __raw_readb readb | |
142 | #define __raw_readw readw | |
143 | #define __raw_readl readl | |
144 | #define __raw_readq readq | |
145 | #define __raw_writeb writeb | |
146 | #define __raw_writew writew | |
147 | #define __raw_writel writel | |
148 | #define __raw_writeq writeq | |
149 | ||
150 | #define readb_relaxed readb | |
151 | #define readw_relaxed readw | |
152 | #define readl_relaxed readl | |
153 | #define readq_relaxed readq | |
154 | ||
155 | #define ioread8 readb | |
156 | #define ioread16 readw | |
157 | #define ioread32 readl | |
158 | #define ioread64 readq | |
159 | #define iowrite8 writeb | |
160 | #define iowrite16 writew | |
161 | #define iowrite32 writel | |
162 | #define iowrite64 writeq | |
163 | ||
0fab59e5 CM |
164 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, |
165 | size_t len) | |
867e359b CM |
166 | { |
167 | int x; | |
168 | BUG_ON((unsigned long)src & 0x3); | |
169 | for (x = 0; x < len; x += 4) | |
170 | *(u32 *)(dst + x) = readl(src + x); | |
867e359b CM |
171 | } |
172 | ||
0fab59e5 CM |
173 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, |
174 | size_t len) | |
867e359b CM |
175 | { |
176 | int x; | |
177 | BUG_ON((unsigned long)dst & 0x3); | |
178 | for (x = 0; x < len; x += 4) | |
179 | writel(*(u32 *)(src + x), dst + x); | |
867e359b CM |
180 | } |
181 | ||
182 | /* | |
183 | * The Tile architecture does not support IOPORT, even with PCI. | |
184 | * Unfortunately we can't yet simply not declare these methods, | |
185 | * since some generic code that compiles into the kernel, but | |
186 | * we never run, uses them unconditionally. | |
187 | */ | |
188 | ||
f02cbbe6 | 189 | static inline long ioport_panic(void) |
867e359b CM |
190 | { |
191 | panic("inb/outb and friends do not exist on tile"); | |
192 | return 0; | |
193 | } | |
194 | ||
f02cbbe6 CM |
195 | static inline void __iomem *ioport_map(unsigned long port, unsigned int len) |
196 | { | |
197 | return (void __iomem *) ioport_panic(); | |
198 | } | |
199 | ||
200 | static inline void ioport_unmap(void __iomem *addr) | |
201 | { | |
202 | ioport_panic(); | |
203 | } | |
204 | ||
867e359b CM |
205 | static inline u8 inb(unsigned long addr) |
206 | { | |
207 | return ioport_panic(); | |
208 | } | |
209 | ||
210 | static inline u16 inw(unsigned long addr) | |
211 | { | |
212 | return ioport_panic(); | |
213 | } | |
214 | ||
215 | static inline u32 inl(unsigned long addr) | |
216 | { | |
217 | return ioport_panic(); | |
218 | } | |
219 | ||
220 | static inline void outb(u8 b, unsigned long addr) | |
221 | { | |
222 | ioport_panic(); | |
223 | } | |
224 | ||
225 | static inline void outw(u16 b, unsigned long addr) | |
226 | { | |
227 | ioport_panic(); | |
228 | } | |
229 | ||
230 | static inline void outl(u32 b, unsigned long addr) | |
231 | { | |
232 | ioport_panic(); | |
233 | } | |
234 | ||
235 | #define inb_p(addr) inb(addr) | |
236 | #define inw_p(addr) inw(addr) | |
237 | #define inl_p(addr) inl(addr) | |
238 | #define outb_p(x, addr) outb((x), (addr)) | |
239 | #define outw_p(x, addr) outw((x), (addr)) | |
240 | #define outl_p(x, addr) outl((x), (addr)) | |
241 | ||
242 | static inline void insb(unsigned long addr, void *buffer, int count) | |
243 | { | |
244 | ioport_panic(); | |
245 | } | |
246 | ||
247 | static inline void insw(unsigned long addr, void *buffer, int count) | |
248 | { | |
249 | ioport_panic(); | |
250 | } | |
251 | ||
252 | static inline void insl(unsigned long addr, void *buffer, int count) | |
253 | { | |
254 | ioport_panic(); | |
255 | } | |
256 | ||
257 | static inline void outsb(unsigned long addr, const void *buffer, int count) | |
258 | { | |
259 | ioport_panic(); | |
260 | } | |
261 | ||
262 | static inline void outsw(unsigned long addr, const void *buffer, int count) | |
263 | { | |
264 | ioport_panic(); | |
265 | } | |
266 | ||
267 | static inline void outsl(unsigned long addr, const void *buffer, int count) | |
268 | { | |
269 | ioport_panic(); | |
270 | } | |
271 | ||
272 | #define ioread8_rep(p, dst, count) \ | |
273 | insb((unsigned long) (p), (dst), (count)) | |
274 | #define ioread16_rep(p, dst, count) \ | |
275 | insw((unsigned long) (p), (dst), (count)) | |
276 | #define ioread32_rep(p, dst, count) \ | |
277 | insl((unsigned long) (p), (dst), (count)) | |
278 | ||
279 | #define iowrite8_rep(p, src, count) \ | |
280 | outsb((unsigned long) (p), (src), (count)) | |
281 | #define iowrite16_rep(p, src, count) \ | |
282 | outsw((unsigned long) (p), (src), (count)) | |
283 | #define iowrite32_rep(p, src, count) \ | |
284 | outsl((unsigned long) (p), (src), (count)) | |
285 | ||
286 | #endif /* _ASM_TILE_IO_H */ |