[deliverable/linux.git] / arch / x86 / Kconfig.cpu

# Put here option for CPU selection and depending optimization
if !X86_ELAN

choice
	prompt "Processor family"
	default M686

config M386
	bool "386"
	depends on !UML
	---help---
	  This is the processor type of your CPU. This information is used for
	  optimizing purposes. In order to compile a kernel that can run on
	  all x86 CPU types (albeit not optimally fast), you can specify
	  "386" here.

	  The kernel will not necessarily run on earlier architectures than
	  the one you have chosen, e.g. a Pentium optimized kernel will run on
	  a PPro, but not necessarily on a i486.

	  Here are the settings recommended for greatest speed:
	  - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
	  486DLC/DLC2, UMC 486SX-S and NexGen Nx586.  Only "386" kernels
	  will run on a 386 class machine.
	  - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
	  SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
	  - "586" for generic Pentium CPUs lacking the TSC
	  (time stamp counter) register.
	  - "Pentium-Classic" for the Intel Pentium.
	  - "Pentium-MMX" for the Intel Pentium MMX.
	  - "Pentium-Pro" for the Intel Pentium Pro.
	  - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
	  - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
	  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
	  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
	  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
	  - "Crusoe" for the Transmeta Crusoe series.
	  - "Efficeon" for the Transmeta Efficeon series.
	  - "Winchip-C6" for original IDT Winchip.
	  - "Winchip-2" for IDT Winchip 2.
	  - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
	  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
	  - "Geode GX/LX" For AMD Geode GX and LX processors.
	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
	  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
	  - "VIA C7" for VIA C7.

	  If you don't know what to do, choose "386".

config M486
	bool "486"
	help
	  Select this for a 486 series processor, either Intel or one of the
	  compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
	  DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
	  U5S.

config M586
	bool "586/K5/5x86/6x86/6x86MX"
	help
	  Select this for an 586 or 686 series processor such as the AMD K5,
	  the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
	  assume the RDTSC (Read Time Stamp Counter) instruction.

config M586TSC
	bool "Pentium-Classic"
	help
	  Select this for a Pentium Classic processor with the RDTSC (Read
	  Time Stamp Counter) instruction for benchmarking.

config M586MMX
	bool "Pentium-MMX"
	help
	  Select this for a Pentium with the MMX graphics/multimedia
	  extended instructions.

config M686
	bool "Pentium-Pro"
	help
	  Select this for Intel Pentium Pro chips.  This enables the use of
	  Pentium Pro extended instructions, and disables the init-time guard
	  against the f00f bug found in earlier Pentiums.

config MPENTIUMII
	bool "Pentium-II/Celeron(pre-Coppermine)"
	help
	  Select this for Intel chips based on the Pentium-II and
	  pre-Coppermine Celeron core.  This option enables an unaligned
	  copy optimization, compiles the kernel with optimization flags
	  tailored for the chip, and applies any applicable Pentium Pro
	  optimizations.

config MPENTIUMIII
	bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
	help
	  Select this for Intel chips based on the Pentium-III and
	  Celeron-Coppermine core.  This option enables use of some
	  extended prefetch instructions in addition to the Pentium II
	  extensions.

config MPENTIUMM
	bool "Pentium M"
	help
	  Select this for Intel Pentium M (not Pentium-4 M)
	  notebook chips.

config MCORE2
	bool "Core 2/newer Xeon"
	help
	  Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
	  CPUs. You can distinguish newer from older Xeons by the CPU family
	  in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)

config MPENTIUM4
	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
	help
	  Select this for Intel Pentium 4 chips.  This includes the
	  Pentium 4, Pentium D, P4-based Celeron and Xeon, and
	  Pentium-4 M (not Pentium M) chips.  This option enables compile
	  flags optimized for the chip, uses the correct cache line size, and
	  applies any applicable optimizations.

	  CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )

	  Select this for:
	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
		-Willamette
		-Northwood
		-Mobile Pentium 4
		-Mobile Pentium 4 M
		-Extreme Edition (Gallatin)
		-Prescott
		-Prescott 2M
		-Cedar Mill
		-Presler
		-Smithfiled
	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
		-Foster
		-Prestonia
		-Gallatin
		-Nocona
		-Irwindale
		-Cranford
		-Potomac
		-Paxville
		-Dempsey


config MK6
	bool "K6/K6-II/K6-III"
	help
	  Select this for an AMD K6-family processor.  Enables use of
	  some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MK7
	bool "Athlon/Duron/K7"
	help
	  Select this for an AMD Athlon K7-family processor.  Enables use of
	  some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MK8
	bool "Opteron/Athlon64/Hammer/K8"
	help
	  Select this for an AMD Opteron or Athlon64 Hammer-family processor.  Enables
	  use of some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MCRUSOE
	bool "Crusoe"
	help
	  Select this for a Transmeta Crusoe processor.  Treats the processor
	  like a 586 with TSC, and sets some GCC optimization flags (like a
	  Pentium Pro with no alignment requirements).

config MEFFICEON
	bool "Efficeon"
	help
	  Select this for a Transmeta Efficeon processor.

config MWINCHIPC6
	bool "Winchip-C6"
	help
	  Select this for an IDT Winchip C6 chip.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.

config MWINCHIP2
	bool "Winchip-2"
	help
	  Select this for an IDT Winchip-2.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.

config MWINCHIP3D
	bool "Winchip-2A/Winchip-3"
	help
	  Select this for an IDT Winchip-2A or 3.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.  Also enable out of order memory
	  stores for this CPU, which can increase performance of some
	  operations.

config MGEODEGX1
	bool "GeodeGX1"
	help
	  Select this for a Geode GX1 (Cyrix MediaGX) chip.

config MGEODE_LX
       bool "Geode GX/LX"
       help
         Select this for AMD Geode GX and LX processors.

config MCYRIXIII
	bool "CyrixIII/VIA-C3"
	help
	  Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
	  treat this chip as a generic 586. Whilst the CPU is 686 class,
	  it lacks the cmov extension which gcc assumes is present when
	  generating 686 code.
	  Note that Nehemiah (Model 9) and above will not boot with this
	  kernel due to them lacking the 3DNow! instructions used in earlier
	  incarnations of the CPU.

config MVIAC3_2
	bool "VIA C3-2 (Nehemiah)"
	help
	  Select this for a VIA C3 "Nehemiah". Selecting this enables usage
	  of SSE and tells gcc to treat the CPU as a 686.
	  Note, this kernel will not boot on older (pre model 9) C3s.

config MVIAC7
	bool "VIA C7"
	help
	  Select this for a VIA C7.  Selecting this uses the correct cache
	  shift and tells gcc to treat the CPU as a 686.

endchoice

config X86_GENERIC
       bool "Generic x86 support"
       help
	  Instead of just including optimizations for the selected
	  x86 variant (e.g. PII, Crusoe or Athlon), include some more
	  generic optimizations as well. This will make the kernel
	  perform better on x86 CPUs other than that selected.

	  This is really intended for distributors who need more
	  generic optimizations.

endif

#
# Define implied options from the CPU selection here
#
config X86_CMPXCHG
	bool
	depends on !M386
	default y

config X86_L1_CACHE_SHIFT
	int
	default "7" if MPENTIUM4 || X86_GENERIC
	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7

config X86_XADD
	bool
	depends on !M386
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	depends on !X86_XADD
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool
	depends on X86_XADD
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default n

config ARCH_HAS_ILOG2_U64
	bool
	default n

config GENERIC_CALIBRATE_DELAY
	bool
	default y

config X86_PPRO_FENCE
	bool
	depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
	default y

config X86_F00F_BUG
	bool
	depends on M586MMX || M586TSC || M586 || M486 || M386
	default y

config X86_WP_WORKS_OK
	bool
	depends on !M386
	default y

config X86_INVLPG
	bool
	depends on !M386
	default y

config X86_BSWAP
	bool
	depends on !M386
	default y

config X86_POPAD_OK
	bool
	depends on !M386
	default y

config X86_ALIGNMENT_16
	bool
	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
	default y

config X86_GOOD_APIC
	bool
	depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7
	default y

config X86_INTEL_USERCOPY
	bool
	depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
	default y

config X86_USE_PPRO_CHECKSUM
	bool
	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
	default y

config X86_USE_3DNOW
	bool
	depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
	default y

config X86_OOSTORE
	bool
	depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
	default y

config X86_TSC
	bool
	depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ
	default y

# this should be set for all -march=.. options where the compiler
# generates cmov.
config X86_CMOV
	bool
	depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7)
	default y

config X86_MINIMUM_CPU_FAMILY
	int
	default "4" if X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK
	default "3"
Commit	Line	Data
96d55b88 PBG	1	# Put here option for CPU selection and depending optimization
	2	if !X86_ELAN
	3
	4	choice
	5	prompt "Processor family"
	6	default M686
	7
	8	config M386
	9	bool "386"
1b4ad242	10	depends on !UML
96d55b88 PBG	11	---help---
	12	This is the processor type of your CPU. This information is used for
	13	optimizing purposes. In order to compile a kernel that can run on
	14	all x86 CPU types (albeit not optimally fast), you can specify
	15	"386" here.
	16
	17	The kernel will not necessarily run on earlier architectures than
	18	the one you have chosen, e.g. a Pentium optimized kernel will run on
	19	a PPro, but not necessarily on a i486.
	20
	21	Here are the settings recommended for greatest speed:
	22	- "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
	23	486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
	24	will run on a 386 class machine.
	25	- "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
	26	SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
	27	- "586" for generic Pentium CPUs lacking the TSC
	28	(time stamp counter) register.
	29	- "Pentium-Classic" for the Intel Pentium.
	30	- "Pentium-MMX" for the Intel Pentium MMX.
	31	- "Pentium-Pro" for the Intel Pentium Pro.
	32	- "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
	33	- "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
	34	- "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
	35	- "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
	36	- "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
	37	- "Crusoe" for the Transmeta Crusoe series.
	38	- "Efficeon" for the Transmeta Efficeon series.
	39	- "Winchip-C6" for original IDT Winchip.
	40	- "Winchip-2" for IDT Winchip 2.
	41	- "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
	42	- "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
f90b8116	43	- "Geode GX/LX" For AMD Geode GX and LX processors.
96d55b88	44	- "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
48a1204c	45	- "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
0949be35	46	- "VIA C7" for VIA C7.
96d55b88 PBG	47
	48	If you don't know what to do, choose "386".
	49
	50	config M486
	51	bool "486"
	52	help
	53	Select this for a 486 series processor, either Intel or one of the
	54	compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
	55	DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
	56	U5S.
	57
	58	config M586
	59	bool "586/K5/5x86/6x86/6x86MX"
	60	help
	61	Select this for an 586 or 686 series processor such as the AMD K5,
	62	the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
	63	assume the RDTSC (Read Time Stamp Counter) instruction.
	64
	65	config M586TSC
	66	bool "Pentium-Classic"
	67	help
	68	Select this for a Pentium Classic processor with the RDTSC (Read
	69	Time Stamp Counter) instruction for benchmarking.
	70
	71	config M586MMX
	72	bool "Pentium-MMX"
	73	help
	74	Select this for a Pentium with the MMX graphics/multimedia
	75	extended instructions.
	76
	77	config M686
	78	bool "Pentium-Pro"
	79	help
	80	Select this for Intel Pentium Pro chips. This enables the use of
	81	Pentium Pro extended instructions, and disables the init-time guard
	82	against the f00f bug found in earlier Pentiums.
	83
	84	config MPENTIUMII
	85	bool "Pentium-II/Celeron(pre-Coppermine)"
	86	help
	87	Select this for Intel chips based on the Pentium-II and
	88	pre-Coppermine Celeron core. This option enables an unaligned
	89	copy optimization, compiles the kernel with optimization flags
	90	tailored for the chip, and applies any applicable Pentium Pro
	91	optimizations.
	92
	93	config MPENTIUMIII
	94	bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
	95	help
	96	Select this for Intel chips based on the Pentium-III and
	97	Celeron-Coppermine core. This option enables use of some
	98	extended prefetch instructions in addition to the Pentium II
	99	extensions.
	100
	101	config MPENTIUMM
	102	bool "Pentium M"
	103	help
	104	Select this for Intel Pentium M (not Pentium-4 M)
	105	notebook chips.
	106
c55d92d1 AK	107	config MCORE2
	108	bool "Core 2/newer Xeon"
	109	help
	110	Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
3dde6ad8	111	CPUs. You can distinguish newer from older Xeons by the CPU family
75e3808b	112	in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
c55d92d1	113
96d55b88	114	config MPENTIUM4
c55d92d1	115	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
96d55b88 PBG	116	help
96d55b88 PBG	117	Select this for Intel Pentium 4 chips. This includes the
75e3808b OP	118	Pentium 4, Pentium D, P4-based Celeron and Xeon, and
	119	Pentium-4 M (not Pentium M) chips. This option enables compile
	120	flags optimized for the chip, uses the correct cache line size, and
	121	applies any applicable optimizations.
	122
	123	CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
	124
	125	Select this for:
	126	Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
	127	-Willamette
	128	-Northwood
	129	-Mobile Pentium 4
	130	-Mobile Pentium 4 M
	131	-Extreme Edition (Gallatin)
	132	-Prescott
	133	-Prescott 2M
	134	-Cedar Mill
	135	-Presler
	136	-Smithfiled
	137	Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
	138	-Foster
	139	-Prestonia
	140	-Gallatin
	141	-Nocona
	142	-Irwindale
	143	-Cranford
	144	-Potomac
	145	-Paxville
	146	-Dempsey
	147
96d55b88 PBG	148
	149	config MK6
	150	bool "K6/K6-II/K6-III"
	151	help
	152	Select this for an AMD K6-family processor. Enables use of
	153	some extended instructions, and passes appropriate optimization
	154	flags to GCC.
	155
	156	config MK7
	157	bool "Athlon/Duron/K7"
	158	help
	159	Select this for an AMD Athlon K7-family processor. Enables use of
	160	some extended instructions, and passes appropriate optimization
	161	flags to GCC.
	162
	163	config MK8
	164	bool "Opteron/Athlon64/Hammer/K8"
	165	help
	166	Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
	167	use of some extended instructions, and passes appropriate optimization
	168	flags to GCC.
	169
	170	config MCRUSOE
	171	bool "Crusoe"
	172	help
	173	Select this for a Transmeta Crusoe processor. Treats the processor
	174	like a 586 with TSC, and sets some GCC optimization flags (like a
	175	Pentium Pro with no alignment requirements).
	176
	177	config MEFFICEON
	178	bool "Efficeon"
	179	help
	180	Select this for a Transmeta Efficeon processor.
	181
	182	config MWINCHIPC6
	183	bool "Winchip-C6"
	184	help
	185	Select this for an IDT Winchip C6 chip. Linux and GCC
	186	treat this chip as a 586TSC with some extended instructions
	187	and alignment requirements.
	188
	189	config MWINCHIP2
	190	bool "Winchip-2"
	191	help
	192	Select this for an IDT Winchip-2. Linux and GCC
	193	treat this chip as a 586TSC with some extended instructions
	194	and alignment requirements.
	195
	196	config MWINCHIP3D
	197	bool "Winchip-2A/Winchip-3"
	198	help
	199	Select this for an IDT Winchip-2A or 3. Linux and GCC
	200	treat this chip as a 586TSC with some extended instructions
3dde6ad8	201	and alignment requirements. Also enable out of order memory
96d55b88 PBG	202	stores for this CPU, which can increase performance of some
	203	operations.
	204
	205	config MGEODEGX1
	206	bool "GeodeGX1"
	207	help
	208	Select this for a Geode GX1 (Cyrix MediaGX) chip.
	209
f90b8116 JC	210	config MGEODE_LX
	211	bool "Geode GX/LX"
	212	help
	213	Select this for AMD Geode GX and LX processors.
	214
96d55b88 PBG	215	config MCYRIXIII
	216	bool "CyrixIII/VIA-C3"
	217	help
	218	Select this for a Cyrix III or C3 chip. Presently Linux and GCC
	219	treat this chip as a generic 586. Whilst the CPU is 686 class,
	220	it lacks the cmov extension which gcc assumes is present when
	221	generating 686 code.
	222	Note that Nehemiah (Model 9) and above will not boot with this
	223	kernel due to them lacking the 3DNow! instructions used in earlier
	224	incarnations of the CPU.
	225
	226	config MVIAC3_2
	227	bool "VIA C3-2 (Nehemiah)"
	228	help
	229	Select this for a VIA C3 "Nehemiah". Selecting this enables usage
	230	of SSE and tells gcc to treat the CPU as a 686.
	231	Note, this kernel will not boot on older (pre model 9) C3s.
	232
0949be35 SA	233	config MVIAC7
	234	bool "VIA C7"
	235	help
	236	Select this for a VIA C7. Selecting this uses the correct cache
	237	shift and tells gcc to treat the CPU as a 686.
	238
96d55b88 PBG	239	endchoice
	240
	241	config X86_GENERIC
	242	bool "Generic x86 support"
	243	help
	244	Instead of just including optimizations for the selected
	245	x86 variant (e.g. PII, Crusoe or Athlon), include some more
	246	generic optimizations as well. This will make the kernel
	247	perform better on x86 CPUs other than that selected.
	248
	249	This is really intended for distributors who need more
	250	generic optimizations.
	251
	252	endif
	253
	254	#
	255	# Define implied options from the CPU selection here
	256	#
	257	config X86_CMPXCHG
	258	bool
	259	depends on !M386
	260	default y
	261
96d55b88 PBG	262	config X86_L1_CACHE_SHIFT
	263	int
	264	default "7" if MPENTIUM4 \|\| X86_GENERIC
f90b8116 JC	265	default "4" if X86_ELAN \|\| M486 \|\| M386 \|\| MGEODEGX1
f90b8116 JC	266	default "5" if MWINCHIP3D \|\| MWINCHIP2 \|\| MWINCHIPC6 \|\| MCRUSOE \|\| MEFFICEON \|\| MCYRIXIII \|\| MK6 \|\| MPENTIUMIII \|\| MPENTIUMII \|\| M686 \|\| M586MMX \|\| M586TSC \|\| M586 \|\| MVIAC3_2 \|\| MGEODE_LX
0949be35	267	default "6" if MK7 \|\| MK8 \|\| MPENTIUMM \|\| MCORE2 \|\| MVIAC7
96d55b88	268
c7f81c94 AK	269	config X86_XADD
	270	bool
	271	depends on !M386
	272	default y
	273
96d55b88 PBG	274	config RWSEM_GENERIC_SPINLOCK
96d55b88 PBG	275	bool
c7f81c94	276	depends on !X86_XADD
96d55b88 PBG	277	default y
	278
	279	config RWSEM_XCHGADD_ALGORITHM
	280	bool
c7f81c94	281	depends on X86_XADD
96d55b88 PBG	282	default y
96d55b88 PBG	283
f0d1b0b3 DH	284	config ARCH_HAS_ILOG2_U32
	285	bool
	286	default n
	287
	288	config ARCH_HAS_ILOG2_U64
	289	bool
	290	default n
	291
96d55b88 PBG	292	config GENERIC_CALIBRATE_DELAY
	293	bool
	294	default y
	295
	296	config X86_PPRO_FENCE
	297	bool
	298	depends on M686 \|\| M586MMX \|\| M586TSC \|\| M586 \|\| M486 \|\| M386 \|\| MGEODEGX1
	299	default y
	300
	301	config X86_F00F_BUG
	302	bool
	303	depends on M586MMX \|\| M586TSC \|\| M586 \|\| M486 \|\| M386
	304	default y
	305
	306	config X86_WP_WORKS_OK
	307	bool
	308	depends on !M386
	309	default y
	310
	311	config X86_INVLPG
	312	bool
	313	depends on !M386
	314	default y
	315
	316	config X86_BSWAP
	317	bool
	318	depends on !M386
	319	default y
	320
	321	config X86_POPAD_OK
	322	bool
	323	depends on !M386
	324	default y
	325
96d55b88 PBG	326	config X86_ALIGNMENT_16
	327	bool
	328	depends on MWINCHIP3D \|\| MWINCHIP2 \|\| MWINCHIPC6 \|\| MCYRIXIII \|\| X86_ELAN \|\| MK6 \|\| M586MMX \|\| M586TSC \|\| M586 \|\| M486 \|\| MVIAC3_2 \|\| MGEODEGX1
	329	default y
	330
	331	config X86_GOOD_APIC
	332	bool
0949be35	333	depends on MK7 \|\| MPENTIUM4 \|\| MPENTIUMM \|\| MPENTIUMIII \|\| MPENTIUMII \|\| M686 \|\| M586MMX \|\| MK8 \|\| MEFFICEON \|\| MCORE2 \|\| MVIAC7
96d55b88 PBG	334	default y
	335
	336	config X86_INTEL_USERCOPY
	337	bool
c55d92d1	338	depends on MPENTIUM4 \|\| MPENTIUMM \|\| MPENTIUMIII \|\| MPENTIUMII \|\| M586MMX \|\| X86_GENERIC \|\| MK8 \|\| MK7 \|\| MEFFICEON \|\| MCORE2
96d55b88 PBG	339	default y
	340
	341	config X86_USE_PPRO_CHECKSUM
	342	bool
c55d92d1	343	depends on MWINCHIP3D \|\| MWINCHIP2 \|\| MWINCHIPC6 \|\| MCYRIXIII \|\| MK7 \|\| MK6 \|\| MPENTIUM4 \|\| MPENTIUMM \|\| MPENTIUMIII \|\| MPENTIUMII \|\| M686 \|\| MK8 \|\| MVIAC3_2 \|\| MEFFICEON \|\| MGEODE_LX \|\| MCORE2
96d55b88 PBG	344	default y
	345
	346	config X86_USE_3DNOW
	347	bool
1b4ad242	348	depends on (MCYRIXIII \|\| MK7 \|\| MGEODE_LX) && !UML
96d55b88 PBG	349	default y
	350
	351	config X86_OOSTORE
	352	bool
	353	depends on (MWINCHIP3D \|\| MWINCHIP2 \|\| MWINCHIPC6) && MTRR
	354	default y
	355
	356	config X86_TSC
	357	bool
0949be35	358	depends on (MWINCHIP3D \|\| MWINCHIP2 \|\| MCRUSOE \|\| MEFFICEON \|\| MCYRIXIII \|\| MK7 \|\| MK6 \|\| MPENTIUM4 \|\| MPENTIUMM \|\| MPENTIUMIII \|\| MPENTIUMII \|\| M686 \|\| M586MMX \|\| M586TSC \|\| MK8 \|\| MVIAC3_2 \|\| MVIAC7 \|\| MGEODEGX1 \|\| MGEODE_LX \|\| MCORE2) && !X86_NUMAQ
96d55b88	359	default y
c7f81c94 AK	360
	361	# this should be set for all -march=.. options where the compiler
	362	# generates cmov.
	363	config X86_CMOV
	364	bool
	365	depends on (MK7 \|\| MPENTIUM4 \|\| MPENTIUMM \|\| MPENTIUMIII \|\| MPENTIUMII \|\| M686 \|\| MVIAC3_2 \|\| MVIAC7)
	366	default y
	367
de32e041	368	config X86_MINIMUM_CPU_FAMILY
c7f81c94	369	int
de32e041 PA	370	default "4" if X86_XADD \|\| X86_CMPXCHG \|\| X86_BSWAP \|\| X86_WP_WORKS_OK
de32e041 PA	371	default "3"
c7f81c94	372