[deliverable/linux.git] / arch / x86 / include / asm / dma-mapping.h

#ifndef _ASM_X86_DMA_MAPPING_H
#define _ASM_X86_DMA_MAPPING_H

/*
 * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
 * Documentation/DMA-API.txt for documentation.
 */

#include <linux/kmemcheck.h>
#include <linux/scatterlist.h>
#include <linux/dma-debug.h>
#include <linux/dma-attrs.h>
#include <asm/io.h>
#include <asm/swiotlb.h>
#include <linux/dma-contiguous.h>

#ifdef CONFIG_ISA
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
#else
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
#endif

#define DMA_ERROR_CODE	0

extern int iommu_merge;
extern struct device x86_dma_fallback_dev;
extern int panic_on_overflow;

extern struct dma_map_ops *dma_ops;

static inline struct dma_map_ops *get_dma_ops(struct device *dev)
{
#ifndef CONFIG_X86_DEV_DMA_OPS
	return dma_ops;
#else
	if (unlikely(!dev) || !dev->archdata.dma_ops)
		return dma_ops;
	else
		return dev->archdata.dma_ops;
#endif
}

bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp);
#define arch_dma_alloc_attrs arch_dma_alloc_attrs

#define HAVE_ARCH_DMA_SUPPORTED 1
extern int dma_supported(struct device *hwdev, u64 mask);

#include <asm-generic/dma-mapping-common.h>

extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
					dma_addr_t *dma_addr, gfp_t flag,
					struct dma_attrs *attrs);

extern void dma_generic_free_coherent(struct device *dev, size_t size,
				      void *vaddr, dma_addr_t dma_addr,
				      struct dma_attrs *attrs);

#ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
#else

static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
{
	if (!dev->dma_mask)
		return 0;

	return addr + size - 1 <= *dev->dma_mask;
}

static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
{
	return paddr;
}

static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
{
	return daddr;
}
#endif /* CONFIG_X86_DMA_REMAP */

static inline void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	flush_write_buffers();
}

static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
						    gfp_t gfp)
{
	unsigned long dma_mask = 0;

	dma_mask = dev->coherent_dma_mask;
	if (!dma_mask)
		dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);

	return dma_mask;
}

static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
{
	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);

	if (dma_mask <= DMA_BIT_MASK(24))
		gfp |= GFP_DMA;
#ifdef CONFIG_X86_64
	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
		gfp |= GFP_DMA32;
#endif
       return gfp;
}

#endif
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_DMA_MAPPING_H
1965aae3 PA	2	#define _ASM_X86_DMA_MAPPING_H
6f536635 GC	3
6f536635 GC	4	/*
395cf969	5	* IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
5872fb94	6	* Documentation/DMA-API.txt for documentation.
6f536635 GC	7	*/
6f536635 GC	8
d7002857	9	#include <linux/kmemcheck.h>
6f536635	10	#include <linux/scatterlist.h>
2118d0c5	11	#include <linux/dma-debug.h>
abe6602b	12	#include <linux/dma-attrs.h>
6f536635 GC	13	#include <asm/io.h>
6f536635 GC	14	#include <asm/swiotlb.h>
0a2b9a6e	15	#include <linux/dma-contiguous.h>
6f536635	16
eb647138 JB	17	#ifdef CONFIG_ISA
	18	# define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
	19	#else
	20	# define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
	21	#endif
	22
8fd524b3 FT	23	#define DMA_ERROR_CODE 0
8fd524b3 FT	24
b7107a3d	25	extern int iommu_merge;
6c505ce3	26	extern struct device x86_dma_fallback_dev;
b7107a3d	27	extern int panic_on_overflow;
7c183416	28
160c1d8e FT	29	extern struct dma_map_ops *dma_ops;
	30
	31	static inline struct dma_map_ops get_dma_ops(struct device dev)
c786df08	32	{
4692d77f	33	#ifndef CONFIG_X86_DEV_DMA_OPS
8d8bb39b FT	34	return dma_ops;
	35	#else
	36	if (unlikely(!dev) \|\| !dev->archdata.dma_ops)
	37	return dma_ops;
	38	else
	39	return dev->archdata.dma_ops;
cfb80c9e	40	#endif
8d8bb39b FT	41	}
8d8bb39b FT	42
6894258e CH	43	bool arch_dma_alloc_attrs(struct device *dev, gfp_t gfp);
	44	#define arch_dma_alloc_attrs arch_dma_alloc_attrs
	45
ee196371 CH	46	#define HAVE_ARCH_DMA_SUPPORTED 1
	47	extern int dma_supported(struct device *hwdev, u64 mask);
	48
7c095e46 FT	49	#include <asm-generic/dma-mapping-common.h>
7c095e46 FT	50
9f6ac577	51	extern void dma_generic_alloc_coherent(struct device dev, size_t size,
baa676fc AP	52	dma_addr_t *dma_addr, gfp_t flag,
baa676fc AP	53	struct dma_attrs *attrs);
9f6ac577	54
0a2b9a6e MS	55	extern void dma_generic_free_coherent(struct device *dev, size_t size,
	56	void *vaddr, dma_addr_t dma_addr,
	57	struct dma_attrs *attrs);
	58
f7219a53 AR	59	#ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
	60	extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
	61	extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
	62	extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
	63	#else
	64
99becaca FT	65	static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
	66	{
	67	if (!dev->dma_mask)
	68	return 0;
	69
ac2b3e67	70	return addr + size - 1 <= *dev->dma_mask;
99becaca FT	71	}
99becaca FT	72
8d4f5339 FT	73	static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
	74	{
	75	return paddr;
	76	}
	77
	78	static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
	79	{
	80	return daddr;
	81	}
f7219a53	82	#endif /* CONFIG_X86_DMA_REMAP */
8d4f5339	83
3cb6a917 GC	84	static inline void
	85	dma_cache_sync(struct device dev, void vaddr, size_t size,
	86	enum dma_data_direction dir)
	87	{
	88	flush_write_buffers();
	89	}
ae17a63b	90
823e7e8c FT	91	static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
	92	gfp_t gfp)
	93	{
	94	unsigned long dma_mask = 0;
b7107a3d	95
823e7e8c FT	96	dma_mask = dev->coherent_dma_mask;
823e7e8c FT	97	if (!dma_mask)
2f4f27d4	98	dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
823e7e8c FT	99
	100	return dma_mask;
	101	}
	102
	103	static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
	104	{
	105	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
	106
2f4f27d4	107	if (dma_mask <= DMA_BIT_MASK(24))
75bebb7f FT	108	gfp \|= GFP_DMA;
75bebb7f FT	109	#ifdef CONFIG_X86_64
284901a9	110	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
823e7e8c FT	111	gfp \|= GFP_DMA32;
	112	#endif
	113	return gfp;
	114	}
	115
6f536635	116	#endif