[deliverable/linux.git] / arch / x86 / include / asm / dma-mapping.h

#ifndef _ASM_X86_DMA_MAPPING_H
#define _ASM_X86_DMA_MAPPING_H

/*
 * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
 * documentation.
 */

#include <linux/scatterlist.h>
#include <linux/dma-attrs.h>
#include <asm/io.h>
#include <asm/swiotlb.h>
#include <asm-generic/dma-coherent.h>

extern dma_addr_t bad_dma_address;
extern int iommu_merge;
extern struct device x86_dma_fallback_dev;
extern int panic_on_overflow;

struct dma_mapping_ops {
	int             (*mapping_error)(struct device *dev,
					 dma_addr_t dma_addr);
	void*           (*alloc_coherent)(struct device *dev, size_t size,
				dma_addr_t *dma_handle, gfp_t gfp);
	void            (*free_coherent)(struct device *dev, size_t size,
				void *vaddr, dma_addr_t dma_handle);
	void            (*sync_single_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_range_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_single_range_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_sg_for_cpu)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	void            (*sync_sg_for_device)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
				int nents, int direction);
	void            (*unmap_sg)(struct device *hwdev,
				struct scatterlist *sg, int nents,
				int direction);
	dma_addr_t	(*map_page)(struct device *dev, struct page *page,
				    unsigned long offset, size_t size,
				    enum dma_data_direction dir,
				    struct dma_attrs *attrs);
	void 		(*unmap_page)(struct device *dev, dma_addr_t dma_handle,
				      size_t size, enum dma_data_direction dir,
				      struct dma_attrs *attrs);
	int             (*dma_supported)(struct device *hwdev, u64 mask);
	int		is_phys;
};

extern struct dma_mapping_ops *dma_ops;

static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
{
#ifdef CONFIG_X86_32
	return dma_ops;
#else
	if (unlikely(!dev) || !dev->archdata.dma_ops)
		return dma_ops;
	else
		return dev->archdata.dma_ops;
#endif
}

/* Make sure we keep the same behaviour */
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);
	if (ops->mapping_error)
		return ops->mapping_error(dev, dma_addr);

	return (dma_addr == bad_dma_address);
}

#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
#define dma_is_consistent(d, h)	(1)

extern int dma_supported(struct device *hwdev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 mask);

extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
					dma_addr_t *dma_addr, gfp_t flag);

static inline dma_addr_t
dma_map_single(struct device *hwdev, void *ptr, size_t size,
	       int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_page(hwdev, virt_to_page(ptr),
			     (unsigned long)ptr & ~PAGE_MASK, size,
			     direction, NULL);
}

static inline void
dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
		 int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->unmap_page)
		ops->unmap_page(dev, addr, size, direction, NULL);
}

static inline int
dma_map_sg(struct device *hwdev, struct scatterlist *sg,
	   int nents, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_sg(hwdev, sg, nents, direction);
}

static inline void
dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
	     int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->unmap_sg)
		ops->unmap_sg(hwdev, sg, nents, direction);
}

static inline void
dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_for_cpu)
		ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
			   size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_for_device)
		ops->sync_single_for_device(hwdev, dma_handle, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			      unsigned long offset, size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_range_for_cpu)
		ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
					       size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
				 unsigned long offset, size_t size,
				 int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_range_for_device)
		ops->sync_single_range_for_device(hwdev, dma_handle,
						  offset, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
		    int nelems, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_sg_for_cpu)
		ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
		       int nelems, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_sg_for_device)
		ops->sync_sg_for_device(hwdev, sg, nelems, direction);

	flush_write_buffers();
}

static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
				      size_t offset, size_t size,
				      int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_page(dev, page, offset, size, direction, NULL);
}

static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
				  size_t size, int direction)
{
	dma_unmap_single(dev, addr, size, direction);
}

static inline void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	flush_write_buffers();
}

static inline int dma_get_cache_alignment(void)
{
	/* no easy way to get cache size on all x86, so return the
	 * maximum possible, to be safe */
	return boot_cpu_data.x86_clflush_size;
}

static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
						    gfp_t gfp)
{
	unsigned long dma_mask = 0;

	dma_mask = dev->coherent_dma_mask;
	if (!dma_mask)
		dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;

	return dma_mask;
}

static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
{
	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);

	if (dma_mask <= DMA_24BIT_MASK)
		gfp |= GFP_DMA;
#ifdef CONFIG_X86_64
	if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
		gfp |= GFP_DMA32;
#endif
       return gfp;
}

static inline void *
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
		gfp_t gfp)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);
	void *memory;

	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);

	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
		return memory;

	if (!dev) {
		dev = &x86_dma_fallback_dev;
		gfp |= GFP_DMA;
	}

	if (!is_device_dma_capable(dev))
		return NULL;

	if (!ops->alloc_coherent)
		return NULL;

	return ops->alloc_coherent(dev, size, dma_handle,
				   dma_alloc_coherent_gfp_flags(dev, gfp));
}

static inline void dma_free_coherent(struct device *dev, size_t size,
				     void *vaddr, dma_addr_t bus)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	WARN_ON(irqs_disabled());       /* for portability */

	if (dma_release_from_coherent(dev, get_order(size), vaddr))
		return;

	if (ops->free_coherent)
		ops->free_coherent(dev, size, vaddr, bus);
}

#endif
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_DMA_MAPPING_H
1965aae3 PA	2	#define _ASM_X86_DMA_MAPPING_H
6f536635 GC	3
	4	/*
	5	* IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
	6	* documentation.
	7	*/
	8
	9	#include <linux/scatterlist.h>
abe6602b	10	#include <linux/dma-attrs.h>
6f536635 GC	11	#include <asm/io.h>
6f536635 GC	12	#include <asm/swiotlb.h>
6c505ce3	13	#include <asm-generic/dma-coherent.h>
6f536635	14
7c183416	15	extern dma_addr_t bad_dma_address;
b7107a3d	16	extern int iommu_merge;
6c505ce3	17	extern struct device x86_dma_fallback_dev;
b7107a3d	18	extern int panic_on_overflow;
7c183416	19
6f536635	20	struct dma_mapping_ops {
8d8bb39b FT	21	int (mapping_error)(struct device dev,
8d8bb39b FT	22	dma_addr_t dma_addr);
6f536635 GC	23	void* (alloc_coherent)(struct device dev, size_t size,
	24	dma_addr_t *dma_handle, gfp_t gfp);
	25	void (free_coherent)(struct device dev, size_t size,
	26	void *vaddr, dma_addr_t dma_handle);
6f536635 GC	27	void (sync_single_for_cpu)(struct device hwdev,
	28	dma_addr_t dma_handle, size_t size,
	29	int direction);
	30	void (sync_single_for_device)(struct device hwdev,
	31	dma_addr_t dma_handle, size_t size,
	32	int direction);
	33	void (sync_single_range_for_cpu)(struct device hwdev,
	34	dma_addr_t dma_handle, unsigned long offset,
	35	size_t size, int direction);
	36	void (sync_single_range_for_device)(struct device hwdev,
	37	dma_addr_t dma_handle, unsigned long offset,
	38	size_t size, int direction);
	39	void (sync_sg_for_cpu)(struct device hwdev,
	40	struct scatterlist *sg, int nelems,
	41	int direction);
	42	void (sync_sg_for_device)(struct device hwdev,
	43	struct scatterlist *sg, int nelems,
	44	int direction);
	45	int (map_sg)(struct device hwdev, struct scatterlist *sg,
	46	int nents, int direction);
	47	void (unmap_sg)(struct device hwdev,
	48	struct scatterlist *sg, int nents,
	49	int direction);
abe6602b FT	50	dma_addr_t (map_page)(struct device dev, struct page *page,
	51	unsigned long offset, size_t size,
	52	enum dma_data_direction dir,
	53	struct dma_attrs *attrs);
	54	void (unmap_page)(struct device dev, dma_addr_t dma_handle,
	55	size_t size, enum dma_data_direction dir,
	56	struct dma_attrs *attrs);
6f536635 GC	57	int (dma_supported)(struct device hwdev, u64 mask);
	58	int is_phys;
	59	};
	60
8d8bb39b	61	extern struct dma_mapping_ops *dma_ops;
22456b97	62
8d8bb39b	63	static inline struct dma_mapping_ops get_dma_ops(struct device dev)
c786df08	64	{
8d8bb39b FT	65	#ifdef CONFIG_X86_32
	66	return dma_ops;
	67	#else
	68	if (unlikely(!dev) \|\| !dev->archdata.dma_ops)
	69	return dma_ops;
	70	else
	71	return dev->archdata.dma_ops;
cfb80c9e	72	#endif
8d8bb39b FT	73	}
	74
	75	/* Make sure we keep the same behaviour */
	76	static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
	77	{
8d8bb39b FT	78	struct dma_mapping_ops *ops = get_dma_ops(dev);
	79	if (ops->mapping_error)
	80	return ops->mapping_error(dev, dma_addr);
c786df08	81
7b1dedca	82	return (dma_addr == bad_dma_address);
c786df08 GC	83	}
c786df08 GC	84
8d396ded GC	85	#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
8d396ded GC	86	#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
6c505ce3	87	#define dma_is_consistent(d, h) (1)
8d396ded	88
802c1f66 GC	89	extern int dma_supported(struct device *hwdev, u64 mask);
	90	extern int dma_set_mask(struct device *dev, u64 mask);
	91
9f6ac577 FT	92	extern void dma_generic_alloc_coherent(struct device dev, size_t size,
	93	dma_addr_t *dma_addr, gfp_t flag);
	94
22456b97 GC	95	static inline dma_addr_t
	96	dma_map_single(struct device hwdev, void ptr, size_t size,
	97	int direction)
	98	{
8d8bb39b FT	99	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	100
22456b97	101	BUG_ON(!valid_dma_direction(direction));
d7dff840 FT	102	return ops->map_page(hwdev, virt_to_page(ptr),
	103	(unsigned long)ptr & ~PAGE_MASK, size,
	104	direction, NULL);
22456b97 GC	105	}
22456b97 GC	106
0cb0ae68 GC	107	static inline void
	108	dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
	109	int direction)
	110	{
8d8bb39b FT	111	struct dma_mapping_ops *ops = get_dma_ops(dev);
8d8bb39b FT	112
0cb0ae68	113	BUG_ON(!valid_dma_direction(direction));
d7dff840 FT	114	if (ops->unmap_page)
d7dff840 FT	115	ops->unmap_page(dev, addr, size, direction, NULL);
0cb0ae68 GC	116	}
0cb0ae68 GC	117
16a3ce9b GC	118	static inline int
	119	dma_map_sg(struct device hwdev, struct scatterlist sg,
	120	int nents, int direction)
	121	{
8d8bb39b FT	122	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	123
16a3ce9b	124	BUG_ON(!valid_dma_direction(direction));
8d8bb39b	125	return ops->map_sg(hwdev, sg, nents, direction);
16a3ce9b	126	}
72c784f8 GC	127
	128	static inline void
	129	dma_unmap_sg(struct device hwdev, struct scatterlist sg, int nents,
	130	int direction)
	131	{
8d8bb39b FT	132	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	133
72c784f8	134	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	135	if (ops->unmap_sg)
8d8bb39b FT	136	ops->unmap_sg(hwdev, sg, nents, direction);
72c784f8	137	}
c01dd8cf GC	138
	139	static inline void
	140	dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	141	size_t size, int direction)
	142	{
8d8bb39b FT	143	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	144
c01dd8cf	145	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	146	if (ops->sync_single_for_cpu)
8d8bb39b FT	147	ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
c01dd8cf GC	148	flush_write_buffers();
	149	}
	150
9231b269 GC	151	static inline void
	152	dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
	153	size_t size, int direction)
	154	{
8d8bb39b FT	155	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	156
9231b269	157	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	158	if (ops->sync_single_for_device)
8d8bb39b FT	159	ops->sync_single_for_device(hwdev, dma_handle, size, direction);
9231b269 GC	160	flush_write_buffers();
	161	}
	162
627610fc GC	163	static inline void
	164	dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	165	unsigned long offset, size_t size, int direction)
	166	{
8d8bb39b	167	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
627610fc	168
8d8bb39b FT	169	BUG_ON(!valid_dma_direction(direction));
	170	if (ops->sync_single_range_for_cpu)
	171	ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
	172	size, direction);
627610fc GC	173	flush_write_buffers();
627610fc GC	174	}
71362332 GC	175
	176	static inline void
	177	dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
	178	unsigned long offset, size_t size,
	179	int direction)
	180	{
8d8bb39b	181	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
71362332	182
8d8bb39b FT	183	BUG_ON(!valid_dma_direction(direction));
	184	if (ops->sync_single_range_for_device)
	185	ops->sync_single_range_for_device(hwdev, dma_handle,
	186	offset, size, direction);
71362332 GC	187	flush_write_buffers();
	188	}
	189
ed435dee GC	190	static inline void
	191	dma_sync_sg_for_cpu(struct device hwdev, struct scatterlist sg,
	192	int nelems, int direction)
	193	{
8d8bb39b FT	194	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	195
ed435dee	196	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	197	if (ops->sync_sg_for_cpu)
8d8bb39b FT	198	ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
ed435dee GC	199	flush_write_buffers();
ed435dee GC	200	}
e7f3a913 GC	201
	202	static inline void
	203	dma_sync_sg_for_device(struct device hwdev, struct scatterlist sg,
	204	int nelems, int direction)
	205	{
8d8bb39b FT	206	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	207
e7f3a913	208	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	209	if (ops->sync_sg_for_device)
8d8bb39b FT	210	ops->sync_sg_for_device(hwdev, sg, nelems, direction);
e7f3a913 GC	211
	212	flush_write_buffers();
	213	}
4d92fbf2 GC	214
	215	static inline dma_addr_t dma_map_page(struct device dev, struct page page,
	216	size_t offset, size_t size,
	217	int direction)
	218	{
8d8bb39b FT	219	struct dma_mapping_ops *ops = get_dma_ops(dev);
8d8bb39b FT	220
2be62149	221	BUG_ON(!valid_dma_direction(direction));
d7dff840	222	return ops->map_page(dev, page, offset, size, direction, NULL);
4d92fbf2 GC	223	}
	224
	225	static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
	226	size_t size, int direction)
	227	{
	228	dma_unmap_single(dev, addr, size, direction);
	229	}
	230
3cb6a917 GC	231	static inline void
	232	dma_cache_sync(struct device dev, void vaddr, size_t size,
	233	enum dma_data_direction dir)
	234	{
	235	flush_write_buffers();
	236	}
ae17a63b	237
b7107a3d GC	238	static inline int dma_get_cache_alignment(void)
	239	{
	240	/* no easy way to get cache size on all x86, so return the
	241	* maximum possible, to be safe */
	242	return boot_cpu_data.x86_clflush_size;
	243	}
	244
823e7e8c FT	245	static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
	246	gfp_t gfp)
	247	{
	248	unsigned long dma_mask = 0;
b7107a3d	249
823e7e8c FT	250	dma_mask = dev->coherent_dma_mask;
	251	if (!dma_mask)
	252	dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
	253
	254	return dma_mask;
	255	}
	256
	257	static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
	258	{
	259	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
	260
75bebb7f FT	261	if (dma_mask <= DMA_24BIT_MASK)
	262	gfp \|= GFP_DMA;
	263	#ifdef CONFIG_X86_64
823e7e8c FT	264	if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
	265	gfp \|= GFP_DMA32;
	266	#endif
	267	return gfp;
	268	}
	269
6c505ce3 JR	270	static inline void *
	271	dma_alloc_coherent(struct device dev, size_t size, dma_addr_t dma_handle,
	272	gfp_t gfp)
	273	{
	274	struct dma_mapping_ops *ops = get_dma_ops(dev);
	275	void *memory;
	276
8a53ad67 FT	277	gfp &= ~(__GFP_DMA \| __GFP_HIGHMEM \| __GFP_DMA32);
8a53ad67 FT	278
6c505ce3 JR	279	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
	280	return memory;
	281
	282	if (!dev) {
	283	dev = &x86_dma_fallback_dev;
	284	gfp \|= GFP_DMA;
	285	}
	286
98216260	287	if (!is_device_dma_capable(dev))
de9f521f FT	288	return NULL;
de9f521f FT	289
823e7e8c FT	290	if (!ops->alloc_coherent)
	291	return NULL;
	292
	293	return ops->alloc_coherent(dev, size, dma_handle,
	294	dma_alloc_coherent_gfp_flags(dev, gfp));
6c505ce3 JR	295	}
	296
	297	static inline void dma_free_coherent(struct device *dev, size_t size,
	298	void *vaddr, dma_addr_t bus)
	299	{
	300	struct dma_mapping_ops *ops = get_dma_ops(dev);
	301
	302	WARN_ON(irqs_disabled()); /* for portability */
	303
	304	if (dma_release_from_coherent(dev, get_order(size), vaddr))
	305	return;
	306
	307	if (ops->free_coherent)
	308	ops->free_coherent(dev, size, vaddr, bus);
	309	}
b7107a3d	310
6f536635	311	#endif