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1965aae3 PA |
1 | #ifndef _ASM_X86_IRQ_VECTORS_H |
2 | #define _ASM_X86_IRQ_VECTORS_H | |
9b7dc567 TG |
3 | |
4 | #include <linux/threads.h> | |
5 | ||
6 | #define NMI_VECTOR 0x02 | |
7 | ||
8 | /* | |
9 | * IDT vectors usable for external interrupt sources start | |
10 | * at 0x20: | |
11 | */ | |
12 | #define FIRST_EXTERNAL_VECTOR 0x20 | |
13 | ||
14 | #ifdef CONFIG_X86_32 | |
15 | # define SYSCALL_VECTOR 0x80 | |
16 | #else | |
17 | # define IA32_SYSCALL_VECTOR 0x80 | |
18 | #endif | |
19 | ||
20 | /* | |
9b7dc567 | 21 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering |
497c9a19 | 22 | * cleanup after irq migration. |
9b7dc567 TG |
23 | */ |
24 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR | |
25 | ||
26 | /* | |
497c9a19 | 27 | * Vectors 0x30-0x3f are used for ISA interrupts. |
9b7dc567 TG |
28 | */ |
29 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) | |
30 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) | |
31 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) | |
32 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) | |
33 | #define IRQ4_VECTOR (IRQ0_VECTOR + 4) | |
34 | #define IRQ5_VECTOR (IRQ0_VECTOR + 5) | |
35 | #define IRQ6_VECTOR (IRQ0_VECTOR + 6) | |
36 | #define IRQ7_VECTOR (IRQ0_VECTOR + 7) | |
37 | #define IRQ8_VECTOR (IRQ0_VECTOR + 8) | |
38 | #define IRQ9_VECTOR (IRQ0_VECTOR + 9) | |
39 | #define IRQ10_VECTOR (IRQ0_VECTOR + 10) | |
40 | #define IRQ11_VECTOR (IRQ0_VECTOR + 11) | |
41 | #define IRQ12_VECTOR (IRQ0_VECTOR + 12) | |
42 | #define IRQ13_VECTOR (IRQ0_VECTOR + 13) | |
43 | #define IRQ14_VECTOR (IRQ0_VECTOR + 14) | |
44 | #define IRQ15_VECTOR (IRQ0_VECTOR + 15) | |
45 | ||
46 | /* | |
47 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | |
48 | * | |
49 | * some of the following vectors are 'rare', they are merged | |
50 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. | |
51 | * TLB, reschedule and local APIC vectors are performance-critical. | |
9b7dc567 TG |
52 | */ |
53 | #ifdef CONFIG_X86_32 | |
54 | ||
55 | # define SPURIOUS_APIC_VECTOR 0xff | |
56 | # define ERROR_APIC_VECTOR 0xfe | |
6dd01bed TH |
57 | # define RESCHEDULE_VECTOR 0xfd |
58 | # define CALL_FUNCTION_VECTOR 0xfc | |
59 | # define CALL_FUNCTION_SINGLE_VECTOR 0xfb | |
60 | # define THERMAL_APIC_VECTOR 0xfa | |
02cf94c3 TH |
61 | /* 0xf8 - 0xf9 : free */ |
62 | # define INVALIDATE_TLB_VECTOR_END 0xf7 | |
63 | # define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */ | |
64 | ||
65 | # define NUM_INVALIDATE_TLB_VECTORS 8 | |
9b7dc567 TG |
66 | |
67 | #else | |
68 | ||
6dd01bed TH |
69 | # define SPURIOUS_APIC_VECTOR 0xff |
70 | # define ERROR_APIC_VECTOR 0xfe | |
71 | # define RESCHEDULE_VECTOR 0xfd | |
72 | # define CALL_FUNCTION_VECTOR 0xfc | |
73 | # define CALL_FUNCTION_SINGLE_VECTOR 0xfb | |
74 | # define THERMAL_APIC_VECTOR 0xfa | |
75 | # define THRESHOLD_APIC_VECTOR 0xf9 | |
76 | # define UV_BAU_MESSAGE 0xf8 | |
77 | # define INVALIDATE_TLB_VECTOR_END 0xf7 | |
78 | # define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */ | |
9b7dc567 TG |
79 | |
80 | #define NUM_INVALIDATE_TLB_VECTORS 8 | |
81 | ||
82 | #endif | |
83 | ||
84 | /* | |
85 | * Local APIC timer IRQ vector is on a different priority level, | |
86 | * to work around the 'lost local interrupt if more than 2 IRQ | |
87 | * sources per level' errata. | |
88 | */ | |
89 | #define LOCAL_TIMER_VECTOR 0xef | |
90 | ||
91 | /* | |
92 | * First APIC vector available to drivers: (vectors 0x30-0xee) we | |
93 | * start at 0x31(0x41) to spread out vectors evenly between priority | |
94 | * levels. (0x80 is the syscall vector) | |
95 | */ | |
497c9a19 | 96 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) |
9b7dc567 | 97 | |
9b7dc567 TG |
98 | #define NR_VECTORS 256 |
99 | ||
100 | #define FPU_IRQ 13 | |
101 | ||
102 | #define FIRST_VM86_IRQ 3 | |
103 | #define LAST_VM86_IRQ 15 | |
104 | #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) | |
105 | ||
99d093d1 YL |
106 | #define NR_IRQS_LEGACY 16 |
107 | ||
7db282fa | 108 | #if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER) |
0b8f1efa | 109 | |
9332fccd MT |
110 | #include <asm/apicnum.h> /* need MAX_IO_APICS */ |
111 | ||
0b8f1efa | 112 | #ifndef CONFIG_SPARSE_IRQ |
3c7569b2 EB |
113 | # if NR_CPUS < MAX_IO_APICS |
114 | # define NR_IRQS (NR_VECTORS + (32 * NR_CPUS)) | |
115 | # else | |
116 | # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) | |
117 | # endif | |
0b8f1efa | 118 | #else |
9332fccd | 119 | |
4a046d17 YL |
120 | # define NR_IRQS \ |
121 | ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ? \ | |
9332fccd MT |
122 | (NR_VECTORS + (8 * NR_CPUS)) : \ |
123 | (NR_VECTORS + (32 * MAX_IO_APICS))) \ | |
124 | ||
0b8f1efa | 125 | #endif |
3c7569b2 | 126 | |
7db282fa | 127 | #elif defined(CONFIG_X86_VOYAGER) |
9b7dc567 | 128 | |
1b489768 | 129 | # define NR_IRQS 224 |
9b7dc567 | 130 | |
7db282fa | 131 | #else /* IO_APIC || VOYAGER */ |
9b7dc567 | 132 | |
1b489768 | 133 | # define NR_IRQS 16 |
9b7dc567 | 134 | |
1b489768 | 135 | #endif |
9b7dc567 TG |
136 | |
137 | /* Voyager specific defines */ | |
138 | /* These define the CPIs we use in linux */ | |
139 | #define VIC_CPI_LEVEL0 0 | |
140 | #define VIC_CPI_LEVEL1 1 | |
141 | /* now the fake CPIs */ | |
142 | #define VIC_TIMER_CPI 2 | |
143 | #define VIC_INVALIDATE_CPI 3 | |
144 | #define VIC_RESCHEDULE_CPI 4 | |
145 | #define VIC_ENABLE_IRQ_CPI 5 | |
146 | #define VIC_CALL_FUNCTION_CPI 6 | |
1a781a77 | 147 | #define VIC_CALL_FUNCTION_SINGLE_CPI 7 |
9b7dc567 TG |
148 | |
149 | /* Now the QIC CPIs: Since we don't need the two initial levels, | |
150 | * these are 2 less than the VIC CPIs */ | |
151 | #define QIC_CPI_OFFSET 1 | |
152 | #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) | |
153 | #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) | |
154 | #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) | |
155 | #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) | |
156 | #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) | |
1a781a77 | 157 | #define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET) |
9b7dc567 TG |
158 | |
159 | #define VIC_START_FAKE_CPI VIC_TIMER_CPI | |
1a781a77 | 160 | #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI |
9b7dc567 TG |
161 | |
162 | /* this is the SYS_INT CPI. */ | |
163 | #define VIC_SYS_INT 8 | |
164 | #define VIC_CMN_INT 15 | |
165 | ||
166 | /* This is the boot CPI for alternate processors. It gets overwritten | |
167 | * by the above once the system has activated all available processors */ | |
168 | #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 | |
169 | #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) | |
170 | ||
171 | ||
1965aae3 | 172 | #endif /* _ASM_X86_IRQ_VECTORS_H */ |