[deliverable/linux.git] / arch / x86 / include / asm / kexec.h

#ifndef _ASM_X86_KEXEC_H
#define _ASM_X86_KEXEC_H

#ifdef CONFIG_X86_32
# define PA_CONTROL_PAGE	0
# define VA_CONTROL_PAGE	1
# define PA_PGD			2
# define PA_SWAP_PAGE		3
# define PAGES_NR		4
#else
# define PA_CONTROL_PAGE	0
# define VA_CONTROL_PAGE	1
# define PA_PGD			2
# define VA_PGD			3
# define PA_PUD_0		4
# define VA_PUD_0		5
# define PA_PMD_0		6
# define VA_PMD_0		7
# define PA_PTE_0		8
# define VA_PTE_0		9
# define PA_PUD_1		10
# define VA_PUD_1		11
# define PA_PMD_1		12
# define VA_PMD_1		13
# define PA_PTE_1		14
# define VA_PTE_1		15
# define PA_TABLE_PAGE		16
# define PAGES_NR		17
#endif

#ifdef CONFIG_X86_32
# define KEXEC_CONTROL_CODE_MAX_SIZE	2048
#endif

#ifndef __ASSEMBLY__

#include <linux/string.h>

#include <asm/page.h>
#include <asm/ptrace.h>

/*
 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
 * I.e. Maximum page that is mapped directly into kernel memory,
 * and kmap is not required.
 *
 * So far x86_64 is limited to 40 physical address bits.
 */
#ifdef CONFIG_X86_32
/* Maximum physical address we can use pages from */
# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
/* Maximum address we can reach in physical address mode */
# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
/* Maximum address we can use for the control code buffer */
# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE

# define KEXEC_CONTROL_PAGE_SIZE	4096

/* The native architecture */
# define KEXEC_ARCH KEXEC_ARCH_386

/* We can also handle crash dumps from 64 bit kernel. */
# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
#else
/* Maximum physical address we can use pages from */
# define KEXEC_SOURCE_MEMORY_LIMIT      (0xFFFFFFFFFFUL)
/* Maximum address we can reach in physical address mode */
# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
/* Maximum address we can use for the control pages */
# define KEXEC_CONTROL_MEMORY_LIMIT     (0xFFFFFFFFFFUL)

/* Allocate one page for the pdp and the second for the code */
# define KEXEC_CONTROL_PAGE_SIZE  (4096UL + 4096UL)

/* The native architecture */
# define KEXEC_ARCH KEXEC_ARCH_X86_64
#endif

/*
 * CPU does not save ss and sp on stack if execution is already
 * running in kernel mode at the time of NMI occurrence. This code
 * fixes it.
 */
static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
				      struct pt_regs *oldregs)
{
#ifdef CONFIG_X86_32
	newregs->sp = (unsigned long)&(oldregs->sp);
	asm volatile("xorl %%eax, %%eax\n\t"
		     "movw %%ss, %%ax\n\t"
		     :"=a"(newregs->ss));
#endif
}

/*
 * This function is responsible for capturing register states if coming
 * via panic otherwise just fix up the ss and sp if coming via kernel
 * mode exception.
 */
static inline void crash_setup_regs(struct pt_regs *newregs,
				    struct pt_regs *oldregs)
{
	if (oldregs) {
		memcpy(newregs, oldregs, sizeof(*newregs));
		crash_fixup_ss_esp(newregs, oldregs);
	} else {
#ifdef CONFIG_X86_32
		asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
		asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
		asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
		asm volatile("movl %%esi,%0" : "=m"(newregs->si));
		asm volatile("movl %%edi,%0" : "=m"(newregs->di));
		asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
		asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
		asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
		asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
		asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
		asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
		asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
		asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
#else
		asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
		asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
		asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
		asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
		asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
		asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
		asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
		asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
		asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
		asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
		asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
		asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
		asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
		asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
		asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
		asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
		asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
		asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
		asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
#endif
		newregs->ip = (unsigned long)current_text_addr();
	}
}

#ifdef CONFIG_X86_32
asmlinkage unsigned long
relocate_kernel(unsigned long indirection_page,
		unsigned long control_page,
		unsigned long start_address,
		unsigned int has_pae,
		unsigned int preserve_context);
#else
NORET_TYPE void
relocate_kernel(unsigned long indirection_page,
		unsigned long page_list,
		unsigned long start_address) ATTRIB_NORET;
#endif

#ifdef CONFIG_X86_32
#define ARCH_HAS_KIMAGE_ARCH

struct kimage_arch {
	pgd_t *pgd;
#ifdef CONFIG_X86_PAE
	pmd_t *pmd0;
	pmd_t *pmd1;
#endif
	pte_t *pte0;
	pte_t *pte1;
};
#endif

#endif /* __ASSEMBLY__ */

#endif /* _ASM_X86_KEXEC_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_KEXEC_H
1965aae3 PA	2	#define _ASM_X86_KEXEC_H
3c233d13	3
96a388de	4	#ifdef CONFIG_X86_32
3c233d13 HH	5	# define PA_CONTROL_PAGE 0
	6	# define VA_CONTROL_PAGE 1
	7	# define PA_PGD 2
9868ee63 HY	8	# define PA_SWAP_PAGE 3
9868ee63 HY	9	# define PAGES_NR 4
96a388de	10	#else
3c233d13 HH	11	# define PA_CONTROL_PAGE 0
	12	# define VA_CONTROL_PAGE 1
	13	# define PA_PGD 2
	14	# define VA_PGD 3
	15	# define PA_PUD_0 4
	16	# define VA_PUD_0 5
	17	# define PA_PMD_0 6
	18	# define VA_PMD_0 7
	19	# define PA_PTE_0 8
	20	# define VA_PTE_0 9
	21	# define PA_PUD_1 10
	22	# define VA_PUD_1 11
	23	# define PA_PMD_1 12
	24	# define VA_PMD_1 13
	25	# define PA_PTE_1 14
	26	# define VA_PTE_1 15
	27	# define PA_TABLE_PAGE 16
	28	# define PAGES_NR 17
96a388de	29	#endif
3c233d13	30
fb45daa6 HY	31	#ifdef CONFIG_X86_32
	32	# define KEXEC_CONTROL_CODE_MAX_SIZE 2048
	33	#endif
	34
3c233d13 HH	35	#ifndef __ASSEMBLY__
	36
	37	#include <linux/string.h>
	38
	39	#include <asm/page.h>
	40	#include <asm/ptrace.h>
	41
	42	/*
	43	* KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
	44	* I.e. Maximum page that is mapped directly into kernel memory,
	45	* and kmap is not required.
	46	*
	47	* So far x86_64 is limited to 40 physical address bits.
	48	*/
	49	#ifdef CONFIG_X86_32
	50	/* Maximum physical address we can use pages from */
	51	# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
	52	/* Maximum address we can reach in physical address mode */
	53	# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
	54	/* Maximum address we can use for the control code buffer */
	55	# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
	56
163f6876	57	# define KEXEC_CONTROL_PAGE_SIZE 4096
3c233d13 HH	58
	59	/* The native architecture */
	60	# define KEXEC_ARCH KEXEC_ARCH_386
	61
	62	/* We can also handle crash dumps from 64 bit kernel. */
	63	# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
	64	#else
	65	/* Maximum physical address we can use pages from */
	66	# define KEXEC_SOURCE_MEMORY_LIMIT (0xFFFFFFFFFFUL)
	67	/* Maximum address we can reach in physical address mode */
	68	# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
	69	/* Maximum address we can use for the control pages */
	70	# define KEXEC_CONTROL_MEMORY_LIMIT (0xFFFFFFFFFFUL)
	71
	72	/* Allocate one page for the pdp and the second for the code */
163f6876	73	# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL)
3c233d13 HH	74
	75	/* The native architecture */
	76	# define KEXEC_ARCH KEXEC_ARCH_X86_64
	77	#endif
	78
	79	/*
	80	* CPU does not save ss and sp on stack if execution is already
	81	* running in kernel mode at the time of NMI occurrence. This code
	82	* fixes it.
	83	*/
	84	static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
	85	struct pt_regs *oldregs)
	86	{
	87	#ifdef CONFIG_X86_32
	88	newregs->sp = (unsigned long)&(oldregs->sp);
b69a3f9d JP	89	asm volatile("xorl %%eax, %%eax\n\t"
	90	"movw %%ss, %%ax\n\t"
	91	:"=a"(newregs->ss));
3c233d13 HH	92	#endif
	93	}
	94
	95	/*
	96	* This function is responsible for capturing register states if coming
	97	* via panic otherwise just fix up the ss and sp if coming via kernel
	98	* mode exception.
	99	*/
	100	static inline void crash_setup_regs(struct pt_regs *newregs,
	101	struct pt_regs *oldregs)
	102	{
	103	if (oldregs) {
	104	memcpy(newregs, oldregs, sizeof(*newregs));
	105	crash_fixup_ss_esp(newregs, oldregs);
	106	} else {
	107	#ifdef CONFIG_X86_32
b69a3f9d JP	108	asm volatile("movl %%ebx,%0" : "=m"(newregs->bx));
	109	asm volatile("movl %%ecx,%0" : "=m"(newregs->cx));
	110	asm volatile("movl %%edx,%0" : "=m"(newregs->dx));
	111	asm volatile("movl %%esi,%0" : "=m"(newregs->si));
	112	asm volatile("movl %%edi,%0" : "=m"(newregs->di));
	113	asm volatile("movl %%ebp,%0" : "=m"(newregs->bp));
	114	asm volatile("movl %%eax,%0" : "=m"(newregs->ax));
	115	asm volatile("movl %%esp,%0" : "=m"(newregs->sp));
	116	asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
	117	asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
	118	asm volatile("movl %%ds, %%eax;" :"=a"(newregs->ds));
	119	asm volatile("movl %%es, %%eax;" :"=a"(newregs->es));
	120	asm volatile("pushfl; popl %0" :"=m"(newregs->flags));
3c233d13	121	#else
b69a3f9d JP	122	asm volatile("movq %%rbx,%0" : "=m"(newregs->bx));
	123	asm volatile("movq %%rcx,%0" : "=m"(newregs->cx));
	124	asm volatile("movq %%rdx,%0" : "=m"(newregs->dx));
	125	asm volatile("movq %%rsi,%0" : "=m"(newregs->si));
	126	asm volatile("movq %%rdi,%0" : "=m"(newregs->di));
	127	asm volatile("movq %%rbp,%0" : "=m"(newregs->bp));
	128	asm volatile("movq %%rax,%0" : "=m"(newregs->ax));
	129	asm volatile("movq %%rsp,%0" : "=m"(newregs->sp));
	130	asm volatile("movq %%r8,%0" : "=m"(newregs->r8));
	131	asm volatile("movq %%r9,%0" : "=m"(newregs->r9));
	132	asm volatile("movq %%r10,%0" : "=m"(newregs->r10));
	133	asm volatile("movq %%r11,%0" : "=m"(newregs->r11));
	134	asm volatile("movq %%r12,%0" : "=m"(newregs->r12));
	135	asm volatile("movq %%r13,%0" : "=m"(newregs->r13));
	136	asm volatile("movq %%r14,%0" : "=m"(newregs->r14));
	137	asm volatile("movq %%r15,%0" : "=m"(newregs->r15));
	138	asm volatile("movl %%ss, %%eax;" :"=a"(newregs->ss));
	139	asm volatile("movl %%cs, %%eax;" :"=a"(newregs->cs));
	140	asm volatile("pushfq; popq %0" :"=m"(newregs->flags));
3c233d13 HH	141	#endif
	142	newregs->ip = (unsigned long)current_text_addr();
	143	}
	144	}
	145
	146	#ifdef CONFIG_X86_32
3ab83521	147	asmlinkage unsigned long
3c233d13 HH	148	relocate_kernel(unsigned long indirection_page,
	149	unsigned long control_page,
	150	unsigned long start_address,
3ab83521 HY	151	unsigned int has_pae,
3ab83521 HY	152	unsigned int preserve_context);
3c233d13 HH	153	#else
	154	NORET_TYPE void
	155	relocate_kernel(unsigned long indirection_page,
	156	unsigned long page_list,
	157	unsigned long start_address) ATTRIB_NORET;
	158	#endif
	159
92be3d6b HY	160	#ifdef CONFIG_X86_32
	161	#define ARCH_HAS_KIMAGE_ARCH
	162
	163	struct kimage_arch {
	164	pgd_t *pgd;
	165	#ifdef CONFIG_X86_PAE
	166	pmd_t *pmd0;
	167	pmd_t *pmd1;
	168	#endif
	169	pte_t *pte0;
	170	pte_t *pte1;
	171	};
	172	#endif
	173
3c233d13 HH	174	#endif /* __ASSEMBLY__ */
3c233d13 HH	175
1965aae3	176	#endif /* _ASM_X86_KEXEC_H */