Commit | Line | Data |
---|---|---|
a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
1965aae3 PA |
11 | #ifndef _ASM_X86_KVM_HOST_H |
12 | #define _ASM_X86_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
34c16eec ZX |
17 | |
18 | #include <linux/kvm.h> | |
19 | #include <linux/kvm_para.h> | |
edf88417 | 20 | #include <linux/kvm_types.h> |
34c16eec | 21 | |
50d0a0f9 | 22 | #include <asm/pvclock-abi.h> |
e01a1b57 | 23 | #include <asm/desc.h> |
0bed3b56 | 24 | #include <asm/mtrr.h> |
9962d032 | 25 | #include <asm/msr-index.h> |
e01a1b57 | 26 | |
69a9f69b AK |
27 | #define KVM_MAX_VCPUS 16 |
28 | #define KVM_MEMORY_SLOTS 32 | |
29 | /* memory slots that does not exposed to userspace */ | |
30 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
31 | ||
32 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 33 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 34 | |
cd6e8f87 ZX |
35 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
36 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
37 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
38 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 39 | |
7d76b4d3 | 40 | #define KVM_GUEST_CR0_MASK \ |
cd6e8f87 ZX |
41 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
42 | | X86_CR0_NW | X86_CR0_CD) | |
7d76b4d3 | 43 | #define KVM_VM_CR0_ALWAYS_ON \ |
cd6e8f87 ZX |
44 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
45 | | X86_CR0_MP) | |
7d76b4d3 | 46 | #define KVM_GUEST_CR4_MASK \ |
cd6e8f87 ZX |
47 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
48 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
49 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
50 | ||
51 | #define INVALID_PAGE (~(hpa_t)0) | |
52 | #define UNMAPPED_GVA (~(gpa_t)0) | |
53 | ||
05da4558 MT |
54 | /* shadow tables are PAE even on non-PAE hosts */ |
55 | #define KVM_HPAGE_SHIFT 21 | |
56 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | |
57 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | |
58 | ||
59 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | |
60 | ||
cd6e8f87 | 61 | #define DE_VECTOR 0 |
19bd8afd | 62 | #define DB_VECTOR 1 |
77ab6db0 JK |
63 | #define BP_VECTOR 3 |
64 | #define OF_VECTOR 4 | |
65 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
66 | #define UD_VECTOR 6 |
67 | #define NM_VECTOR 7 | |
68 | #define DF_VECTOR 8 | |
69 | #define TS_VECTOR 10 | |
70 | #define NP_VECTOR 11 | |
71 | #define SS_VECTOR 12 | |
72 | #define GP_VECTOR 13 | |
73 | #define PF_VECTOR 14 | |
77ab6db0 | 74 | #define MF_VECTOR 16 |
53371b50 | 75 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
76 | |
77 | #define SELECTOR_TI_MASK (1 << 2) | |
78 | #define SELECTOR_RPL_MASK 0x03 | |
79 | ||
80 | #define IOPL_SHIFT 12 | |
81 | ||
d69fb81f ZX |
82 | #define KVM_ALIAS_SLOTS 4 |
83 | ||
d657a98e ZX |
84 | #define KVM_PERMILLE_MMU_PAGES 20 |
85 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
86 | #define KVM_MMU_HASH_SHIFT 10 |
87 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
88 | #define KVM_MIN_FREE_MMU_PAGES 5 |
89 | #define KVM_REFILL_PAGES 25 | |
90 | #define KVM_MAX_CPUID_ENTRIES 40 | |
0bed3b56 | 91 | #define KVM_NR_FIXED_MTRR_REGION 88 |
9ba075a6 | 92 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 93 | |
e9b11c17 ZX |
94 | extern spinlock_t kvm_lock; |
95 | extern struct list_head vm_list; | |
96 | ||
d657a98e ZX |
97 | struct kvm_vcpu; |
98 | struct kvm; | |
99 | ||
5fdbf976 | 100 | enum kvm_reg { |
2b3ccfa0 ZX |
101 | VCPU_REGS_RAX = 0, |
102 | VCPU_REGS_RCX = 1, | |
103 | VCPU_REGS_RDX = 2, | |
104 | VCPU_REGS_RBX = 3, | |
105 | VCPU_REGS_RSP = 4, | |
106 | VCPU_REGS_RBP = 5, | |
107 | VCPU_REGS_RSI = 6, | |
108 | VCPU_REGS_RDI = 7, | |
109 | #ifdef CONFIG_X86_64 | |
110 | VCPU_REGS_R8 = 8, | |
111 | VCPU_REGS_R9 = 9, | |
112 | VCPU_REGS_R10 = 10, | |
113 | VCPU_REGS_R11 = 11, | |
114 | VCPU_REGS_R12 = 12, | |
115 | VCPU_REGS_R13 = 13, | |
116 | VCPU_REGS_R14 = 14, | |
117 | VCPU_REGS_R15 = 15, | |
118 | #endif | |
5fdbf976 | 119 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
120 | NR_VCPU_REGS |
121 | }; | |
122 | ||
123 | enum { | |
81609e3e | 124 | VCPU_SREG_ES, |
2b3ccfa0 | 125 | VCPU_SREG_CS, |
81609e3e | 126 | VCPU_SREG_SS, |
2b3ccfa0 | 127 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
128 | VCPU_SREG_FS, |
129 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
130 | VCPU_SREG_TR, |
131 | VCPU_SREG_LDTR, | |
132 | }; | |
133 | ||
edf88417 | 134 | #include <asm/kvm_x86_emulate.h> |
2b3ccfa0 | 135 | |
d657a98e ZX |
136 | #define KVM_NR_MEM_OBJS 40 |
137 | ||
42dbaa5a JK |
138 | #define KVM_NR_DB_REGS 4 |
139 | ||
140 | #define DR6_BD (1 << 13) | |
141 | #define DR6_BS (1 << 14) | |
142 | #define DR6_FIXED_1 0xffff0ff0 | |
143 | #define DR6_VOLATILE 0x0000e00f | |
144 | ||
145 | #define DR7_BP_EN_MASK 0x000000ff | |
146 | #define DR7_GE (1 << 9) | |
147 | #define DR7_GD (1 << 13) | |
148 | #define DR7_FIXED_1 0x00000400 | |
149 | #define DR7_VOLATILE 0xffff23ff | |
150 | ||
d657a98e ZX |
151 | /* |
152 | * We don't want allocation failures within the mmu code, so we preallocate | |
153 | * enough memory for a single page fault in a cache. | |
154 | */ | |
155 | struct kvm_mmu_memory_cache { | |
156 | int nobjs; | |
157 | void *objects[KVM_NR_MEM_OBJS]; | |
158 | }; | |
159 | ||
160 | #define NR_PTE_CHAIN_ENTRIES 5 | |
161 | ||
162 | struct kvm_pte_chain { | |
163 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
164 | struct hlist_node link; | |
165 | }; | |
166 | ||
167 | /* | |
168 | * kvm_mmu_page_role, below, is defined as: | |
169 | * | |
170 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
171 | * bits 4:7 - page table level for this shadow (1-4) | |
172 | * bits 8:9 - page table quadrant for 2-level guests | |
f6e2c02b AK |
173 | * bit 16 - direct mapping of virtual to physical mapping at gfn |
174 | * used for real mode and two-dimensional paging | |
d657a98e ZX |
175 | * bits 17:19 - common access permissions for all ptes in this shadow page |
176 | */ | |
177 | union kvm_mmu_page_role { | |
178 | unsigned word; | |
179 | struct { | |
7d76b4d3 JP |
180 | unsigned glevels:4; |
181 | unsigned level:4; | |
182 | unsigned quadrant:2; | |
183 | unsigned pad_for_nice_hex_output:6; | |
f6e2c02b | 184 | unsigned direct:1; |
7d76b4d3 | 185 | unsigned access:3; |
2e53d63a | 186 | unsigned invalid:1; |
2f0b3d60 | 187 | unsigned cr4_pge:1; |
d657a98e ZX |
188 | }; |
189 | }; | |
190 | ||
191 | struct kvm_mmu_page { | |
192 | struct list_head link; | |
193 | struct hlist_node hash_link; | |
194 | ||
6cffe8ca MT |
195 | struct list_head oos_link; |
196 | ||
d657a98e ZX |
197 | /* |
198 | * The following two entries are used to key the shadow page in the | |
199 | * hash table. | |
200 | */ | |
201 | gfn_t gfn; | |
202 | union kvm_mmu_page_role role; | |
203 | ||
204 | u64 *spt; | |
205 | /* hold the gfn of each spte inside spt */ | |
206 | gfn_t *gfns; | |
291f26bc SY |
207 | /* |
208 | * One bit set per slot which has memory | |
209 | * in this shadow page. | |
210 | */ | |
211 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | |
d657a98e ZX |
212 | int multimapped; /* More than one parent_pte? */ |
213 | int root_count; /* Currently serving as active root */ | |
4731d4c7 | 214 | bool unsync; |
6cffe8ca | 215 | bool global; |
60c8aec6 | 216 | unsigned int unsync_children; |
d657a98e ZX |
217 | union { |
218 | u64 *parent_pte; /* !multimapped */ | |
219 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
220 | }; | |
0074ff63 | 221 | DECLARE_BITMAP(unsync_child_bitmap, 512); |
d657a98e ZX |
222 | }; |
223 | ||
6ad18fba DH |
224 | struct kvm_pv_mmu_op_buffer { |
225 | void *ptr; | |
226 | unsigned len; | |
227 | unsigned processed; | |
228 | char buf[512] __aligned(sizeof(long)); | |
229 | }; | |
230 | ||
1c08364c AK |
231 | struct kvm_pio_request { |
232 | unsigned long count; | |
233 | int cur_count; | |
234 | gva_t guest_gva; | |
235 | int in; | |
236 | int port; | |
237 | int size; | |
238 | int string; | |
239 | int down; | |
240 | int rep; | |
241 | }; | |
242 | ||
d657a98e ZX |
243 | /* |
244 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
245 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
246 | * mode. | |
247 | */ | |
248 | struct kvm_mmu { | |
249 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
250 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
251 | void (*free)(struct kvm_vcpu *vcpu); | |
252 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
253 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
254 | struct kvm_mmu_page *page); | |
e8bc217a MT |
255 | int (*sync_page)(struct kvm_vcpu *vcpu, |
256 | struct kvm_mmu_page *sp); | |
a7052897 | 257 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); |
d657a98e ZX |
258 | hpa_t root_hpa; |
259 | int root_level; | |
260 | int shadow_root_level; | |
a770f6f2 | 261 | union kvm_mmu_page_role base_role; |
d657a98e ZX |
262 | |
263 | u64 *pae_root; | |
82725b20 | 264 | u64 rsvd_bits_mask[2][4]; |
d657a98e ZX |
265 | }; |
266 | ||
ad312c7c | 267 | struct kvm_vcpu_arch { |
34c16eec ZX |
268 | u64 host_tsc; |
269 | int interrupt_window_open; | |
270 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | |
271 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | |
5fdbf976 MT |
272 | /* |
273 | * rip and regs accesses must go through | |
274 | * kvm_{register,rip}_{read,write} functions. | |
275 | */ | |
276 | unsigned long regs[NR_VCPU_REGS]; | |
277 | u32 regs_avail; | |
278 | u32 regs_dirty; | |
34c16eec ZX |
279 | |
280 | unsigned long cr0; | |
281 | unsigned long cr2; | |
282 | unsigned long cr3; | |
283 | unsigned long cr4; | |
284 | unsigned long cr8; | |
1371d904 | 285 | u32 hflags; |
34c16eec ZX |
286 | u64 pdptrs[4]; /* pae */ |
287 | u64 shadow_efer; | |
288 | u64 apic_base; | |
289 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
e1035715 | 290 | int32_t apic_arb_prio; |
34c16eec ZX |
291 | int mp_state; |
292 | int sipi_vector; | |
293 | u64 ia32_misc_enable_msr; | |
b209749f | 294 | bool tpr_access_reporting; |
34c16eec ZX |
295 | |
296 | struct kvm_mmu mmu; | |
6ad18fba DH |
297 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
298 | * put it here to avoid allocation */ | |
299 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
300 | |
301 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
302 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
303 | struct kvm_mmu_memory_cache mmu_page_cache; | |
304 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
305 | ||
306 | gfn_t last_pt_write_gfn; | |
307 | int last_pt_write_count; | |
308 | u64 *last_pte_updated; | |
1b7fcd32 | 309 | gfn_t last_pte_gfn; |
34c16eec | 310 | |
d7824fff | 311 | struct { |
35149e21 AL |
312 | gfn_t gfn; /* presumed gfn during guest pte update */ |
313 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
05da4558 | 314 | int largepage; |
e930bffe | 315 | unsigned long mmu_seq; |
d7824fff AK |
316 | } update_pte; |
317 | ||
34c16eec ZX |
318 | struct i387_fxsave_struct host_fx_image; |
319 | struct i387_fxsave_struct guest_fx_image; | |
320 | ||
321 | gva_t mmio_fault_cr2; | |
322 | struct kvm_pio_request pio; | |
323 | void *pio_data; | |
324 | ||
298101da AK |
325 | struct kvm_queued_exception { |
326 | bool pending; | |
327 | bool has_error_code; | |
328 | u8 nr; | |
329 | u32 error_code; | |
330 | } exception; | |
331 | ||
937a7eae AK |
332 | struct kvm_queued_interrupt { |
333 | bool pending; | |
334 | u8 nr; | |
335 | } interrupt; | |
336 | ||
34c16eec ZX |
337 | struct { |
338 | int active; | |
339 | u8 save_iopl; | |
340 | struct kvm_save_segment { | |
341 | u16 selector; | |
342 | unsigned long base; | |
343 | u32 limit; | |
344 | u32 ar; | |
345 | } tr, es, ds, fs, gs; | |
346 | } rmode; | |
347 | int halt_request; /* real mode on Intel only */ | |
348 | ||
349 | int cpuid_nent; | |
07716717 | 350 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
351 | /* emulate context */ |
352 | ||
353 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
354 | |
355 | gpa_t time; | |
50d0a0f9 GH |
356 | struct pvclock_vcpu_time_info hv_clock; |
357 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
358 | unsigned int time_offset; |
359 | struct page *time_page; | |
3419ffc8 SY |
360 | |
361 | bool nmi_pending; | |
668f612f | 362 | bool nmi_injected; |
33f089ca | 363 | bool nmi_window_open; |
9ba075a6 | 364 | |
0bed3b56 SY |
365 | struct mtrr_state_type mtrr_state; |
366 | u32 pat; | |
42dbaa5a JK |
367 | |
368 | int switch_db_regs; | |
369 | unsigned long host_db[KVM_NR_DB_REGS]; | |
370 | unsigned long host_dr6; | |
371 | unsigned long host_dr7; | |
372 | unsigned long db[KVM_NR_DB_REGS]; | |
373 | unsigned long dr6; | |
374 | unsigned long dr7; | |
375 | unsigned long eff_db[KVM_NR_DB_REGS]; | |
34c16eec ZX |
376 | }; |
377 | ||
d69fb81f ZX |
378 | struct kvm_mem_alias { |
379 | gfn_t base_gfn; | |
380 | unsigned long npages; | |
381 | gfn_t target_gfn; | |
382 | }; | |
383 | ||
384 | struct kvm_arch{ | |
385 | int naliases; | |
386 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
387 | |
388 | unsigned int n_free_mmu_pages; | |
389 | unsigned int n_requested_mmu_pages; | |
390 | unsigned int n_alloc_mmu_pages; | |
391 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
392 | /* | |
393 | * Hash table of struct kvm_mmu_page. | |
394 | */ | |
395 | struct list_head active_mmu_pages; | |
4d5c5d0f | 396 | struct list_head assigned_dev_head; |
6cffe8ca | 397 | struct list_head oos_global_pages; |
19de40a8 | 398 | struct iommu_domain *iommu_domain; |
d7deeeb0 ZX |
399 | struct kvm_pic *vpic; |
400 | struct kvm_ioapic *vioapic; | |
7837699f | 401 | struct kvm_pit *vpit; |
564f1537 | 402 | struct hlist_head irq_ack_notifier_list; |
cc6e462c | 403 | int vapics_in_nmi_mode; |
bfc6d222 | 404 | |
bfc6d222 ZX |
405 | unsigned int tss_addr; |
406 | struct page *apic_access_page; | |
18068523 GOC |
407 | |
408 | gpa_t wall_clock; | |
b7ebfb05 SY |
409 | |
410 | struct page *ept_identity_pagetable; | |
411 | bool ept_identity_pagetable_done; | |
5550af4d SY |
412 | |
413 | unsigned long irq_sources_bitmap; | |
414 | unsigned long irq_states[KVM_IOAPIC_NUM_PINS]; | |
53f658b3 | 415 | u64 vm_init_tsc; |
d69fb81f ZX |
416 | }; |
417 | ||
0711456c ZX |
418 | struct kvm_vm_stat { |
419 | u32 mmu_shadow_zapped; | |
420 | u32 mmu_pte_write; | |
421 | u32 mmu_pte_updated; | |
422 | u32 mmu_pde_zapped; | |
423 | u32 mmu_flooded; | |
424 | u32 mmu_recycled; | |
dfc5aa00 | 425 | u32 mmu_cache_miss; |
4731d4c7 | 426 | u32 mmu_unsync; |
6cffe8ca | 427 | u32 mmu_unsync_global; |
0711456c | 428 | u32 remote_tlb_flush; |
05da4558 | 429 | u32 lpages; |
0711456c ZX |
430 | }; |
431 | ||
77b4c255 ZX |
432 | struct kvm_vcpu_stat { |
433 | u32 pf_fixed; | |
434 | u32 pf_guest; | |
435 | u32 tlb_flush; | |
436 | u32 invlpg; | |
437 | ||
438 | u32 exits; | |
439 | u32 io_exits; | |
440 | u32 mmio_exits; | |
441 | u32 signal_exits; | |
442 | u32 irq_window_exits; | |
f08864b4 | 443 | u32 nmi_window_exits; |
77b4c255 ZX |
444 | u32 halt_exits; |
445 | u32 halt_wakeup; | |
446 | u32 request_irq_exits; | |
c4abb7c9 | 447 | u32 request_nmi_exits; |
77b4c255 ZX |
448 | u32 irq_exits; |
449 | u32 host_state_reload; | |
450 | u32 efer_reload; | |
451 | u32 fpu_reload; | |
452 | u32 insn_emulation; | |
453 | u32 insn_emulation_fail; | |
f11c3a8d | 454 | u32 hypercalls; |
fa89a817 | 455 | u32 irq_injections; |
c4abb7c9 | 456 | u32 nmi_injections; |
77b4c255 | 457 | }; |
ad312c7c | 458 | |
e01a1b57 HB |
459 | struct descriptor_table { |
460 | u16 limit; | |
461 | unsigned long base; | |
462 | } __attribute__((packed)); | |
463 | ||
ea4a5ff8 ZX |
464 | struct kvm_x86_ops { |
465 | int (*cpu_has_kvm_support)(void); /* __init */ | |
466 | int (*disabled_by_bios)(void); /* __init */ | |
467 | void (*hardware_enable)(void *dummy); /* __init */ | |
468 | void (*hardware_disable)(void *dummy); | |
469 | void (*check_processor_compatibility)(void *rtn); | |
470 | int (*hardware_setup)(void); /* __init */ | |
471 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 472 | bool (*cpu_has_accelerated_tpr)(void); |
ea4a5ff8 ZX |
473 | |
474 | /* Create, but do not attach this VCPU */ | |
475 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
476 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
477 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
478 | ||
479 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
480 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
481 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
482 | |
483 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
d0bfb940 | 484 | struct kvm_guest_debug *dbg); |
ea4a5ff8 ZX |
485 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); |
486 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
487 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
488 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
489 | struct kvm_segment *var, int seg); | |
2e4d2653 | 490 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
491 | void (*set_segment)(struct kvm_vcpu *vcpu, |
492 | struct kvm_segment *var, int seg); | |
493 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
494 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
495 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
496 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
497 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
498 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
499 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
500 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
501 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
502 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
503 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
504 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
505 | int *exception); | |
5fdbf976 | 506 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
507 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
508 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
509 | ||
510 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 511 | |
ea4a5ff8 ZX |
512 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
513 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
514 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
515 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
516 | unsigned char *hypercall_addr); | |
517 | int (*get_irq)(struct kvm_vcpu *vcpu); | |
518 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | |
298101da AK |
519 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
520 | bool has_error_code, u32 error_code); | |
521 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
522 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); |
523 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | |
524 | struct kvm_run *run); | |
78646121 | 525 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); |
ea4a5ff8 | 526 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); |
67253af5 | 527 | int (*get_tdp_level)(void); |
64d4d521 | 528 | int (*get_mt_mask_shift)(void); |
ea4a5ff8 ZX |
529 | }; |
530 | ||
97896d04 ZX |
531 | extern struct kvm_x86_ops *kvm_x86_ops; |
532 | ||
54f1585a ZX |
533 | int kvm_mmu_module_init(void); |
534 | void kvm_mmu_module_exit(void); | |
535 | ||
536 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
537 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
538 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
539 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
540 | void kvm_mmu_set_base_ptes(u64 base_pte); |
541 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
64d4d521 | 542 | u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask); |
54f1585a ZX |
543 | |
544 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
545 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
546 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 547 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
548 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
549 | ||
cc4b6871 JR |
550 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
551 | ||
3200f405 | 552 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 553 | const void *val, int bytes); |
2f333bcb MT |
554 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
555 | gpa_t addr, unsigned long *ret); | |
556 | ||
557 | extern bool tdp_enabled; | |
9f811285 | 558 | |
54f1585a ZX |
559 | enum emulation_result { |
560 | EMULATE_DONE, /* no further processing */ | |
561 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
562 | EMULATE_FAIL, /* can't emulate this instruction */ | |
563 | }; | |
564 | ||
571008da SY |
565 | #define EMULTYPE_NO_DECODE (1 << 0) |
566 | #define EMULTYPE_TRAP_UD (1 << 1) | |
54f1585a | 567 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, |
571008da | 568 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
569 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
570 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
571 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
572 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
573 | unsigned long *rflags); | |
574 | ||
575 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
576 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
577 | unsigned long *rflags); | |
f2b4b7dd | 578 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
579 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
580 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
581 | ||
582 | struct x86_emulate_ctxt; | |
583 | ||
584 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
585 | int size, unsigned port); | |
586 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
587 | int size, unsigned long count, int down, | |
588 | gva_t address, int rep, unsigned port); | |
589 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
590 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
591 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
592 | int emulate_clts(struct kvm_vcpu *vcpu); | |
593 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
594 | unsigned long *dest); | |
595 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
596 | unsigned long value); | |
597 | ||
3e6e0aab GT |
598 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
599 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | |
600 | int type_bits, int seg); | |
601 | ||
37817f29 IE |
602 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
603 | ||
2d3ad1f4 | 604 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
605 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
606 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
607 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
608 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
609 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
610 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
611 | ||
612 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
613 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
614 | ||
298101da AK |
615 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
616 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
617 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
618 | u32 error_code); | |
298101da | 619 | |
4925663a | 620 | int kvm_pic_set_irq(void *opaque, int irq, int level); |
3de42dc0 | 621 | |
3419ffc8 SY |
622 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
623 | ||
54f1585a ZX |
624 | void fx_init(struct kvm_vcpu *vcpu); |
625 | ||
54f1585a ZX |
626 | int emulator_write_emulated(unsigned long addr, |
627 | const void *val, | |
628 | unsigned int bytes, | |
629 | struct kvm_vcpu *vcpu); | |
630 | ||
631 | unsigned long segment_base(u16 selector); | |
632 | ||
d835dfec | 633 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a | 634 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
635 | const u8 *new, int bytes, |
636 | bool guest_initiated); | |
54f1585a ZX |
637 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
638 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
639 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
640 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
0ba73cda | 641 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); |
6cffe8ca | 642 | void kvm_mmu_sync_global(struct kvm_vcpu *vcpu); |
54f1585a ZX |
643 | |
644 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
645 | ||
646 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
647 | ||
3067714c | 648 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
a7052897 | 649 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); |
34c16eec | 650 | |
18552672 | 651 | void kvm_enable_tdp(void); |
5f4cb662 | 652 | void kvm_disable_tdp(void); |
18552672 | 653 | |
a03490ed | 654 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 655 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d | 656 | |
2843099f IE |
657 | struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn); |
658 | ||
ec6d273d ZX |
659 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) |
660 | { | |
661 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
662 | ||
663 | return (struct kvm_mmu_page *)page_private(page); | |
664 | } | |
665 | ||
d6e88aec | 666 | static inline u16 kvm_read_fs(void) |
ec6d273d ZX |
667 | { |
668 | u16 seg; | |
669 | asm("mov %%fs, %0" : "=g"(seg)); | |
670 | return seg; | |
671 | } | |
672 | ||
d6e88aec | 673 | static inline u16 kvm_read_gs(void) |
ec6d273d ZX |
674 | { |
675 | u16 seg; | |
676 | asm("mov %%gs, %0" : "=g"(seg)); | |
677 | return seg; | |
678 | } | |
679 | ||
d6e88aec | 680 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
681 | { |
682 | u16 ldt; | |
683 | asm("sldt %0" : "=g"(ldt)); | |
684 | return ldt; | |
685 | } | |
686 | ||
d6e88aec | 687 | static inline void kvm_load_fs(u16 sel) |
ec6d273d ZX |
688 | { |
689 | asm("mov %0, %%fs" : : "rm"(sel)); | |
690 | } | |
691 | ||
d6e88aec | 692 | static inline void kvm_load_gs(u16 sel) |
ec6d273d ZX |
693 | { |
694 | asm("mov %0, %%gs" : : "rm"(sel)); | |
695 | } | |
696 | ||
d6e88aec | 697 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
698 | { |
699 | asm("lldt %0" : : "rm"(sel)); | |
700 | } | |
ec6d273d | 701 | |
d6e88aec | 702 | static inline void kvm_get_idt(struct descriptor_table *table) |
ec6d273d ZX |
703 | { |
704 | asm("sidt %0" : "=m"(*table)); | |
705 | } | |
706 | ||
d6e88aec | 707 | static inline void kvm_get_gdt(struct descriptor_table *table) |
ec6d273d ZX |
708 | { |
709 | asm("sgdt %0" : "=m"(*table)); | |
710 | } | |
711 | ||
d6e88aec | 712 | static inline unsigned long kvm_read_tr_base(void) |
ec6d273d ZX |
713 | { |
714 | u16 tr; | |
715 | asm("str %0" : "=g"(tr)); | |
716 | return segment_base(tr); | |
717 | } | |
718 | ||
719 | #ifdef CONFIG_X86_64 | |
720 | static inline unsigned long read_msr(unsigned long msr) | |
721 | { | |
722 | u64 value; | |
723 | ||
724 | rdmsrl(msr, value); | |
725 | return value; | |
726 | } | |
727 | #endif | |
728 | ||
d6e88aec | 729 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
ec6d273d ZX |
730 | { |
731 | asm("fxsave (%0)":: "r" (image)); | |
732 | } | |
733 | ||
d6e88aec | 734 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
ec6d273d ZX |
735 | { |
736 | asm("fxrstor (%0)":: "r" (image)); | |
737 | } | |
738 | ||
d6e88aec | 739 | static inline void kvm_fx_finit(void) |
ec6d273d ZX |
740 | { |
741 | asm("finit"); | |
742 | } | |
743 | ||
744 | static inline u32 get_rdx_init_val(void) | |
745 | { | |
746 | return 0x600; /* P6 family */ | |
747 | } | |
748 | ||
c1a5d4f9 AK |
749 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
750 | { | |
751 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
752 | } | |
753 | ||
ec6d273d ZX |
754 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 |
755 | ||
756 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
757 | #define TSS_BASE_SIZE 0x68 | |
758 | #define TSS_IOPB_SIZE (65536 / 8) | |
759 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
760 | #define RMODE_TSS_SIZE \ |
761 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 762 | |
37817f29 IE |
763 | enum { |
764 | TASK_SWITCH_CALL = 0, | |
765 | TASK_SWITCH_IRET = 1, | |
766 | TASK_SWITCH_JMP = 2, | |
767 | TASK_SWITCH_GATE = 3, | |
768 | }; | |
769 | ||
1371d904 | 770 | #define HF_GIF_MASK (1 << 0) |
3d6368ef AG |
771 | #define HF_HIF_MASK (1 << 1) |
772 | #define HF_VINTR_MASK (1 << 2) | |
1371d904 | 773 | |
4ecac3fd AK |
774 | /* |
775 | * Hardware virtualization extension instructions may fault if a | |
776 | * reboot turns off virtualization while processes are running. | |
777 | * Trap the fault and ignore the instruction if that happens. | |
778 | */ | |
779 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
780 | ||
781 | #define __kvm_handle_fault_on_reboot(insn) \ | |
782 | "666: " insn "\n\t" \ | |
18b13e54 | 783 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 784 | "667: \n\t" \ |
8ceed347 | 785 | __ASM_SIZE(push) " $666b \n\t" \ |
4ecac3fd AK |
786 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
787 | ".popsection \n\t" \ | |
788 | ".pushsection __ex_table, \"a\" \n\t" \ | |
8ceed347 | 789 | _ASM_PTR " 666b, 667b \n\t" \ |
4ecac3fd AK |
790 | ".popsection" |
791 | ||
e930bffe AA |
792 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
793 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
794 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
82725b20 | 795 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); |
e930bffe | 796 | |
1965aae3 | 797 | #endif /* _ASM_X86_KVM_HOST_H */ |